[llvm] [X86][RA] Add two address hints for compressible NDD instructions. (PR #98603)

[Freddy Ye via llvm-commits]

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@@ -1082,8 +1088,52 @@ bool X86RegisterInfo::getRegAllocationHints(Register VirtReg,
       VirtReg, Order, Hints, MF, VRM, Matrix);
 
   unsigned ID = RC.getID();
-  if (ID != X86::TILERegClassID)
+
+  if (!VRM)
+    return BaseImplRetVal;
+
+  if (ID != X86::TILERegClassID) {
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FreddyLeaf wrote:

[4ce24cc](https://github.com/llvm/llvm-project/pull/98603/commits/4ce24cc7e550e34c28f31c046241f857ce5a03ba)

https://github.com/llvm/llvm-project/pull/98603