[llvm] [RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (PR #84965)
Michael Maitland via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 23 09:33:28 PDT 2024
================
@@ -651,6 +687,62 @@ bool RISCVLegalizerInfo::legalizeExt(MachineInstr &MI,
return true;
}
+bool RISCVLegalizerInfo::legalizeLoadStore(MachineInstr &MI,
+ LegalizerHelper &Helper,
+ MachineIRBuilder &MIB) const {
+ MachineRegisterInfo &MRI = *MIB.getMRI();
+ MachineFunction *MF = MI.getMF();
+ const DataLayout &DL = MIB.getDataLayout();
+ LLVMContext &Ctx = MF->getFunction().getContext();
+
+ Register DstReg = MI.getOperand(0).getReg();
+ Register PtrReg = MI.getOperand(1).getReg();
+ LLT DataTy = MRI.getType(DstReg);
+ if (!DataTy.isVector())
+ return false;
+
+ if (!(STI.hasVInstructions() &&
----------------
michaelmaitland wrote:
Should we move this into the `customIf` statement? We know this information at the time of `customIf`. This stuff does not depend on `MI`.
https://github.com/llvm/llvm-project/pull/84965
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