[llvm] [AMDGPU] Set register bank for i1 register copies (PR #96155)

[Matt Arsenault via llvm-commits]

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@@ -3742,6 +3742,18 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
     const RegisterBank *SrcBank = getRegBank(MI.getOperand(1).getReg(), MRI,
                                              *TRI);
     assert(SrcBank && "src bank should have been assigned already");
+
+    // For copy from a physical reg to s1 dest, the call of getRegBank() above
+    // gives incorrect result. We set both src and dst banks to VCCRegBank.
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arsenm wrote:

This should explain why it's incorrect. getRegBank only looks at the register in isolation, and expects the LLT to disambiguate the SGPRs. In the virtual<->physical copy case, we have to look at the other register's type. You could also do this by calling getRegBankFromRegClass directly with the other operand's type.

You should also do this case instead of the default getRegBankAbove 



https://github.com/llvm/llvm-project/pull/96155