[llvm] [AMDGPU] Set register bank for i1 register copies (PR #96155)

[Matt Arsenault via llvm-commits]

================
@@ -3742,6 +3742,18 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
     const RegisterBank *SrcBank = getRegBank(MI.getOperand(1).getReg(), MRI,
                                              *TRI);
     assert(SrcBank && "src bank should have been assigned already");
+
+    // For copy from a physical reg to s1 dest, the call of getRegBank() above
+    // gives incorrect result. We set both src and dst banks to VCCRegBank.
+    if (!MI.getOperand(1).getReg().isVirtual() && !DstBank &&
+        MRI.getType(MI.getOperand(0).getReg()) == LLT::scalar(1))
+      DstBank = SrcBank = &AMDGPU::VCCRegBank;
+    // For copy from s1 src to a physical reg, we set both src and dst banks to
+    // VCCRegBank.
+    else if (!MI.getOperand(0).getReg().isVirtual() &&
----------------
arsenm wrote:

```suggestion
        MRI.getType(MI.getOperand(0).getReg()) == LLT::scalar(1)) {
      DstBank = SrcBank = &AMDGPU::VCCRegBank;
    // For copy from s1 src to a physical reg, we set both src and dst banks to
    // VCCRegBank.
    } else if (!MI.getOperand(0).getReg().isVirtual() &&
```

https://github.com/llvm/llvm-project/pull/96155