[llvm] [AArch64] Fix lowring error for masked load/store integer scalable ve… (PR #99354)

[Sander de Smalen via llvm-commits]

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@@ -6940,11 +6940,8 @@ SDValue DAGTypeLegalizer::WidenVecOp_MSTORE(SDNode *N, unsigned OpNo) {
     StVal = ModifyToType(StVal, WideVT);
   }
 
-  assert((VT.isScalableVector() ? Mask.getValueType().getVectorMinNumElements()
-                                : Mask.getValueType().getVectorNumElements()) ==
-             (VT.isScalableVector()
-                  ? StVal.getValueType().getVectorMinNumElements()
-                  : StVal.getValueType().getVectorNumElements()) &&
+  assert(Mask.getValueType().getVectorMinNumElements() ==
+          StVal.getValueType().getVectorMinNumElements() &&
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sdesmalen-arm wrote:

Sorry I made a mistake, it should be:
```suggestion
  assert(Mask.getValueType().getVectorElementCount() ==
          StVal.getValueType().getVectorElementCount() &&
```

https://github.com/llvm/llvm-project/pull/99354