[llvm] 6235698 - [CVP] Add tests for range return attributes (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 19 02:09:59 PDT 2024
Author: Nikita Popov
Date: 2024-07-19T11:09:50+02:00
New Revision: 6235698f47828747d3b1b0418e547e2e4ff9138f
URL: https://github.com/llvm/llvm-project/commit/6235698f47828747d3b1b0418e547e2e4ff9138f
DIFF: https://github.com/llvm/llvm-project/commit/6235698f47828747d3b1b0418e547e2e4ff9138f.diff
LOG: [CVP] Add tests for range return attributes (NFC)
Added:
Modified:
llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/CorrelatedValuePropagation/basic.ll b/llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
index a3b1c89634835..c529bab4ef4a7 100644
--- a/llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
+++ b/llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
@@ -1,10 +1,11 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; RUN: opt < %s -passes=correlated-propagation -S | FileCheck %s
; PR2581
define i32 @test1(i1 %C) {
-; CHECK-LABEL: @test1(
-; CHECK-NEXT: br i1 [[C:%.*]], label [[EXIT:%.*]], label [[BODY:%.*]]
+; CHECK-LABEL: define i32 @test1
+; CHECK-SAME: (i1 [[C:%.*]]) {
+; CHECK-NEXT: br i1 [[C]], label [[EXIT:%.*]], label [[BODY:%.*]]
; CHECK: body:
; CHECK-NEXT: ret i32 11
; CHECK: exit:
@@ -23,7 +24,7 @@ exit: ; preds = %0
; PR4420
declare i1 @ext()
define i1 @test2() {
-; CHECK-LABEL: @test2(
+; CHECK-LABEL: define i1 @test2() {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[COND:%.*]] = tail call i1 @ext()
; CHECK-NEXT: br i1 [[COND]], label [[BB1:%.*]], label [[BB2:%.*]]
@@ -56,9 +57,10 @@ bb3:
; PR4855
@gv = internal constant i8 7
define i8 @test3(ptr %a) nounwind {
-; CHECK-LABEL: @test3(
+; CHECK-LABEL: define i8 @test3
+; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[COND:%.*]] = icmp eq ptr [[A:%.*]], @gv
+; CHECK-NEXT: [[COND:%.*]] = icmp eq ptr [[A]], @gv
; CHECK-NEXT: br i1 [[COND]], label [[BB2:%.*]], label [[BB:%.*]]
; CHECK: bb:
; CHECK-NEXT: ret i8 0
@@ -80,9 +82,10 @@ bb2:
; PR1757
define i32 @test4(i32) {
-; CHECK-LABEL: @test4(
+; CHECK-LABEL: define i32 @test4
+; CHECK-SAME: (i32 [[TMP0:%.*]]) {
; CHECK-NEXT: EntryBlock:
-; CHECK-NEXT: [[DOTDEMORGAN:%.*]] = icmp sgt i32 [[TMP0:%.*]], 2
+; CHECK-NEXT: [[DOTDEMORGAN:%.*]] = icmp sgt i32 [[TMP0]], 2
; CHECK-NEXT: br i1 [[DOTDEMORGAN]], label [[GREATERTHANTWO:%.*]], label [[LESSTHANOREQUALTOTWO:%.*]]
; CHECK: GreaterThanTwo:
; CHECK-NEXT: br i1 false, label [[IMPOSSIBLE:%.*]], label [[NOTTWOANDGREATERTHANTWO:%.*]]
@@ -113,14 +116,15 @@ LessThanOrEqualToTwo:
declare ptr @f(ptr)
define void @test5(ptr %x, ptr %y) {
-; CHECK-LABEL: @test5(
+; CHECK-LABEL: define void @test5
+; CHECK-SAME: (ptr [[X:%.*]], ptr [[Y:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[PRE:%.*]] = icmp eq ptr [[X:%.*]], null
+; CHECK-NEXT: [[PRE:%.*]] = icmp eq ptr [[X]], null
; CHECK-NEXT: br i1 [[PRE]], label [[RETURN:%.*]], label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[PHI:%.*]] = phi ptr [ [[F:%.*]], [[LOOP]] ], [ [[X]], [[ENTRY:%.*]] ]
; CHECK-NEXT: [[F]] = tail call ptr @f(ptr [[PHI]])
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ne ptr [[F]], [[Y:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne ptr [[F]], [[Y]]
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP1]], ptr [[F]], ptr null
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq ptr [[SEL]], null
; CHECK-NEXT: br i1 [[CMP2]], label [[RETURN]], label [[LOOP]]
@@ -145,13 +149,14 @@ return:
; "false" case for CorrelatedValuePropagation
define void @loop1(ptr %x, ptr %y) {
-; CHECK-LABEL: @loop1(
+; CHECK-LABEL: define void @loop1
+; CHECK-SAME: (ptr [[X:%.*]], ptr [[Y:%.*]]) {
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
-; CHECK-NEXT: [[PHI:%.*]] = phi ptr [ [[F:%.*]], [[LOOP]] ], [ [[X:%.*]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[PHI:%.*]] = phi ptr [ [[F:%.*]], [[LOOP]] ], [ [[X]], [[ENTRY:%.*]] ]
; CHECK-NEXT: [[F]] = tail call ptr @f(ptr [[PHI]])
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ne ptr [[F]], [[Y:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne ptr [[F]], [[Y]]
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP1]], ptr [[F]], ptr null
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq ptr [[SEL]], null
; CHECK-NEXT: br i1 [[CMP2]], label [[RETURN:%.*]], label [[LOOP]]
@@ -175,13 +180,14 @@ return:
; "true" case for CorrelatedValuePropagation
define void @loop2(ptr %x, ptr %y) {
-; CHECK-LABEL: @loop2(
+; CHECK-LABEL: define void @loop2
+; CHECK-SAME: (ptr [[X:%.*]], ptr [[Y:%.*]]) {
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
-; CHECK-NEXT: [[PHI:%.*]] = phi ptr [ [[F:%.*]], [[LOOP]] ], [ [[X:%.*]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[PHI:%.*]] = phi ptr [ [[F:%.*]], [[LOOP]] ], [ [[X]], [[ENTRY:%.*]] ]
; CHECK-NEXT: [[F]] = tail call ptr @f(ptr [[PHI]])
-; CHECK-NEXT: [[CMP1:%.*]] = icmp eq ptr [[F]], [[Y:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq ptr [[F]], [[Y]]
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP1]], ptr null, ptr [[F]]
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq ptr [[SEL]], null
; CHECK-NEXT: br i1 [[CMP2]], label [[RETURN:%.*]], label [[LOOP]]
@@ -204,9 +210,10 @@ return:
}
define i32 @switch1(i32 %s) {
-; CHECK-LABEL: @switch1(
+; CHECK-LABEL: define i32 @switch1
+; CHECK-SAME: (i32 [[S:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[S:%.*]], 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[S]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[NEGATIVE:%.*]], label [[OUT:%.*]]
; CHECK: negative:
; CHECK-NEXT: switch i32 [[S]], label [[OUT]] [
@@ -243,9 +250,10 @@ next:
}
define i32 @switch2(i32 %s) {
-; CHECK-LABEL: @switch2(
+; CHECK-LABEL: define i32 @switch2
+; CHECK-SAME: (i32 [[S:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[S:%.*]], 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[S]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[POSITIVE:%.*]], label [[OUT:%.*]]
; CHECK: positive:
; CHECK-NEXT: br label [[OUT]]
@@ -276,9 +284,10 @@ next:
}
define i32 @switch3(i32 %s) {
-; CHECK-LABEL: @switch3(
+; CHECK-LABEL: define i32 @switch3
+; CHECK-SAME: (i32 [[S:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[S:%.*]], 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[S]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[POSITIVE:%.*]], label [[OUT:%.*]]
; CHECK: positive:
; CHECK-NEXT: br label [[OUT]]
@@ -309,9 +318,10 @@ next:
}
define void @switch4(i32 %s) {
-; CHECK-LABEL: @switch4(
+; CHECK-LABEL: define void @switch4
+; CHECK-SAME: (i32 [[S:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[S:%.*]], 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[S]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[ZERO:%.*]], label [[OUT:%.*]]
; CHECK: zero:
; CHECK-NEXT: br label [[NEXT:%.*]]
@@ -339,9 +349,10 @@ next:
}
define void @switch_nonzero_zext(i8 %s) {
-; CHECK-LABEL: @switch_nonzero_zext(
+; CHECK-LABEL: define void @switch_nonzero_zext
+; CHECK-SAME: (i8 [[S:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[S:%.*]], 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[S]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[SWITCH:%.*]], label [[EXIT:%.*]]
; CHECK: switch:
; CHECK-NEXT: [[S_EXT:%.*]] = zext i8 [[S]] to i32
@@ -371,9 +382,10 @@ unreachable:
}
define void @switch_assume_nonzero(i32 %s) {
-; CHECK-LABEL: @switch_assume_nonzero(
+; CHECK-LABEL: define void @switch_assume_nonzero
+; CHECK-SAME: (i32 [[S:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[S:%.*]], 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[S]], 0
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: exit:
@@ -398,9 +410,10 @@ unreachable:
}
define void @switch_nonzero_phi(i1 %cond) {
-; CHECK-LABEL: @switch_nonzero_phi(
+; CHECK-LABEL: define void @switch_nonzero_phi
+; CHECK-SAME: (i1 [[COND:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF:%.*]], label [[ELSE:%.*]]
+; CHECK-NEXT: br i1 [[COND]], label [[IF:%.*]], label [[ELSE:%.*]]
; CHECK: if:
; CHECK-NEXT: br label [[SWITCH:%.*]]
; CHECK: else:
@@ -438,9 +451,10 @@ unreachable:
}
define i32 @switch_range(i32 %cond) {
-; CHECK-LABEL: @switch_range(
+; CHECK-LABEL: define i32 @switch_range
+; CHECK-SAME: (i32 [[COND:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[S:%.*]] = urem i32 [[COND:%.*]], 3
+; CHECK-NEXT: [[S:%.*]] = urem i32 [[COND]], 3
; CHECK-NEXT: [[S1:%.*]] = add nuw nsw i32 [[S]], 1
; CHECK-NEXT: switch i32 [[S1]], label [[DEFAULT_UNREACHABLE:%.*]] [
; CHECK-NEXT: i32 1, label [[EXIT1:%.*]]
@@ -477,9 +491,10 @@ unreachable:
; switch condition, we should not change the default.
define i32 @switch_range_not_full(i32 %cond) {
-; CHECK-LABEL: @switch_range_not_full(
+; CHECK-LABEL: define i32 @switch_range_not_full
+; CHECK-SAME: (i32 [[COND:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[S:%.*]] = urem i32 [[COND:%.*]], 3
+; CHECK-NEXT: [[S:%.*]] = urem i32 [[COND]], 3
; CHECK-NEXT: [[S1:%.*]] = add nuw nsw i32 [[S]], 1
; CHECK-NEXT: switch i32 [[S1]], label [[UNREACHABLE:%.*]] [
; CHECK-NEXT: i32 1, label [[EXIT1:%.*]]
@@ -511,9 +526,10 @@ unreachable:
; PR51531
define i8 @switch_defaultdest_multipleuse(i8 %t0) {
-; CHECK-LABEL: @switch_defaultdest_multipleuse(
+; CHECK-LABEL: define i8 @switch_defaultdest_multipleuse
+; CHECK-SAME: (i8 [[T0:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[O:%.*]] = or i8 [[T0:%.*]], 1
+; CHECK-NEXT: [[O:%.*]] = or i8 [[T0]], 1
; CHECK-NEXT: [[R:%.*]] = srem i8 1, [[O]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: default.unreachable:
@@ -534,7 +550,8 @@ exit:
}
define i1 @arg_attribute(ptr nonnull %a) {
-; CHECK-LABEL: @arg_attribute(
+; CHECK-LABEL: define i1 @arg_attribute
+; CHECK-SAME: (ptr nonnull [[A:%.*]]) {
; CHECK-NEXT: ret i1 false
;
%cmp = icmp eq ptr %a, null
@@ -543,7 +560,7 @@ define i1 @arg_attribute(ptr nonnull %a) {
declare nonnull ptr @return_nonnull()
define i1 @call_attribute() {
-; CHECK-LABEL: @call_attribute(
+; CHECK-LABEL: define i1 @call_attribute() {
; CHECK-NEXT: [[A:%.*]] = call ptr @return_nonnull()
; CHECK-NEXT: ret i1 false
;
@@ -553,12 +570,13 @@ define i1 @call_attribute() {
}
define i1 @umin(i32 %a, i32 %b) {
-; CHECK-LABEL: @umin(
+; CHECK-LABEL: define i1 @umin
+; CHECK-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A:%.*]], 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A]], 5
; CHECK-NEXT: br i1 [[CMP]], label [[A_GUARD:%.*]], label [[OUT:%.*]]
; CHECK: a_guard:
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[B:%.*]], 20
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[B]], 20
; CHECK-NEXT: br i1 [[CMP2]], label [[B_GUARD:%.*]], label [[OUT]]
; CHECK: b_guard:
; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp ult i32 [[A]], [[B]]
@@ -585,12 +603,13 @@ out:
}
define i1 @smin(i32 %a, i32 %b) {
-; CHECK-LABEL: @smin(
+; CHECK-LABEL: define i1 @smin
+; CHECK-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A:%.*]], 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A]], 5
; CHECK-NEXT: br i1 [[CMP]], label [[A_GUARD:%.*]], label [[OUT:%.*]]
; CHECK: a_guard:
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[B:%.*]], 20
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[B]], 20
; CHECK-NEXT: br i1 [[CMP2]], label [[B_GUARD:%.*]], label [[OUT]]
; CHECK: b_guard:
; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp ule i32 [[A]], [[B]]
@@ -617,12 +636,13 @@ out:
}
define i1 @smax(i32 %a, i32 %b) {
-; CHECK-LABEL: @smax(
+; CHECK-LABEL: define i1 @smax
+; CHECK-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], 5
; CHECK-NEXT: br i1 [[CMP]], label [[A_GUARD:%.*]], label [[OUT:%.*]]
; CHECK: a_guard:
-; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[B:%.*]], 20
+; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[B]], 20
; CHECK-NEXT: br i1 [[CMP2]], label [[B_GUARD:%.*]], label [[OUT]]
; CHECK: b_guard:
; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp uge i32 [[A]], [[B]]
@@ -649,12 +669,13 @@ out:
}
define i1 @umax(i32 %a, i32 %b) {
-; CHECK-LABEL: @umax(
+; CHECK-LABEL: define i1 @umax
+; CHECK-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], 5
; CHECK-NEXT: br i1 [[CMP]], label [[A_GUARD:%.*]], label [[OUT:%.*]]
; CHECK: a_guard:
-; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[B:%.*]], 20
+; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[B]], 20
; CHECK-NEXT: br i1 [[CMP2]], label [[B_GUARD:%.*]], label [[OUT]]
; CHECK: b_guard:
; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp uge i32 [[A]], [[B]]
@@ -681,8 +702,9 @@ out:
}
define i1 @umin_lhs_overdefined_rhs_const(i32 %a) {
-; CHECK-LABEL: @umin_lhs_overdefined_rhs_const(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A:%.*]], 42
+; CHECK-LABEL: define i1 @umin_lhs_overdefined_rhs_const
+; CHECK-SAME: (i32 [[A:%.*]]) {
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A]], 42
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[A]], i32 42
; CHECK-NEXT: ret i1 true
;
@@ -693,8 +715,9 @@ define i1 @umin_lhs_overdefined_rhs_const(i32 %a) {
}
define i1 @umin_rhs_overdefined_lhs_const(i32 %a) {
-; CHECK-LABEL: @umin_rhs_overdefined_lhs_const(
-; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[A:%.*]], 42
+; CHECK-LABEL: define i1 @umin_rhs_overdefined_lhs_const
+; CHECK-SAME: (i32 [[A:%.*]]) {
+; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[A]], 42
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 42, i32 [[A]]
; CHECK-NEXT: ret i1 true
;
@@ -705,10 +728,11 @@ define i1 @umin_rhs_overdefined_lhs_const(i32 %a) {
}
define i1 @umin_lhs_overdefined_rhs_range(i32 %a, i32 %b) {
-; CHECK-LABEL: @umin_lhs_overdefined_rhs_range(
-; CHECK-NEXT: [[ASSUME:%.*]] = icmp ult i32 [[B:%.*]], 42
+; CHECK-LABEL: define i1 @umin_lhs_overdefined_rhs_range
+; CHECK-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) {
+; CHECK-NEXT: [[ASSUME:%.*]] = icmp ult i32 [[B]], 42
; CHECK-NEXT: call void @llvm.assume(i1 [[ASSUME]])
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A:%.*]], [[B]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A]], [[B]]
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[B]]
; CHECK-NEXT: ret i1 true
;
@@ -721,10 +745,11 @@ define i1 @umin_lhs_overdefined_rhs_range(i32 %a, i32 %b) {
}
define i1 @umin_rhs_overdefined_lhs_range(i32 %a, i32 %b) {
-; CHECK-LABEL: @umin_rhs_overdefined_lhs_range(
-; CHECK-NEXT: [[ASSUME:%.*]] = icmp ult i32 [[B:%.*]], 42
+; CHECK-LABEL: define i1 @umin_rhs_overdefined_lhs_range
+; CHECK-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) {
+; CHECK-NEXT: [[ASSUME:%.*]] = icmp ult i32 [[B]], 42
; CHECK-NEXT: call void @llvm.assume(i1 [[ASSUME]])
-; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[A:%.*]], [[B]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[A]], [[B]]
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[B]], i32 [[A]]
; CHECK-NEXT: ret i1 true
;
@@ -737,9 +762,10 @@ define i1 @umin_rhs_overdefined_lhs_range(i32 %a, i32 %b) {
}
define i1 @clamp_low1(i32 noundef %a) {
-; CHECK-LABEL: @clamp_low1(
+; CHECK-LABEL: define i1 @clamp_low1
+; CHECK-SAME: (i32 noundef [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[A:%.*]], 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[A]], 5
; CHECK-NEXT: br i1 [[CMP]], label [[A_GUARD:%.*]], label [[OUT:%.*]]
; CHECK: a_guard:
; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp eq i32 [[A]], 5
@@ -764,9 +790,10 @@ out:
}
define i1 @clamp_low2(i32 noundef %a) {
-; CHECK-LABEL: @clamp_low2(
+; CHECK-LABEL: define i1 @clamp_low2
+; CHECK-SAME: (i32 noundef [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[A:%.*]], 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[A]], 5
; CHECK-NEXT: br i1 [[CMP]], label [[A_GUARD:%.*]], label [[OUT:%.*]]
; CHECK: a_guard:
; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp ne i32 [[A]], 5
@@ -791,9 +818,10 @@ out:
}
define i1 @clamp_low3(i32 noundef %a) {
-; CHECK-LABEL: @clamp_low3(
+; CHECK-LABEL: define i1 @clamp_low3
+; CHECK-SAME: (i32 noundef [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[A:%.*]], 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[A]], 5
; CHECK-NEXT: br i1 [[CMP]], label [[A_GUARD:%.*]], label [[OUT:%.*]]
; CHECK: a_guard:
; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp ugt i32 [[A]], 5
@@ -818,9 +846,10 @@ out:
}
define i1 @clamp_low4(i32 noundef %a) {
-; CHECK-LABEL: @clamp_low4(
+; CHECK-LABEL: define i1 @clamp_low4
+; CHECK-SAME: (i32 noundef [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[A:%.*]], 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[A]], 5
; CHECK-NEXT: br i1 [[CMP]], label [[A_GUARD:%.*]], label [[OUT:%.*]]
; CHECK: a_guard:
; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp ule i32 [[A]], 5
@@ -845,9 +874,10 @@ out:
}
define i1 @clamp_high1(i32 noundef %a) {
-; CHECK-LABEL: @clamp_high1(
+; CHECK-LABEL: define i1 @clamp_high1
+; CHECK-SAME: (i32 noundef [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[A:%.*]], 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[A]], 5
; CHECK-NEXT: br i1 [[CMP]], label [[A_GUARD:%.*]], label [[OUT:%.*]]
; CHECK: a_guard:
; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp eq i32 [[A]], 5
@@ -872,9 +902,10 @@ out:
}
define i1 @clamp_high1_or(i32 noundef %a) {
-; CHECK-LABEL: @clamp_high1_or(
+; CHECK-LABEL: define i1 @clamp_high1_or
+; CHECK-SAME: (i32 noundef [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[A:%.*]], 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[A]], 5
; CHECK-NEXT: br i1 [[CMP]], label [[A_GUARD:%.*]], label [[OUT:%.*]]
; CHECK: a_guard:
; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp eq i32 [[A]], 5
@@ -899,9 +930,10 @@ out:
}
define i1 @clamp_high2(i32 noundef %a) {
-; CHECK-LABEL: @clamp_high2(
+; CHECK-LABEL: define i1 @clamp_high2
+; CHECK-SAME: (i32 noundef [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[A:%.*]], 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[A]], 5
; CHECK-NEXT: br i1 [[CMP]], label [[A_GUARD:%.*]], label [[OUT:%.*]]
; CHECK: a_guard:
; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp ne i32 [[A]], 5
@@ -927,9 +959,10 @@ out:
define i1 @clamp_high2_or_disjoint(i32 noundef %a) {
-; CHECK-LABEL: @clamp_high2_or_disjoint(
+; CHECK-LABEL: define i1 @clamp_high2_or_disjoint
+; CHECK-SAME: (i32 noundef [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[A:%.*]], 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[A]], 5
; CHECK-NEXT: br i1 [[CMP]], label [[A_GUARD:%.*]], label [[OUT:%.*]]
; CHECK: a_guard:
; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp ne i32 [[A]], 5
@@ -955,9 +988,10 @@ out:
define i1 @clamp_high3(i32 noundef %a) {
-; CHECK-LABEL: @clamp_high3(
+; CHECK-LABEL: define i1 @clamp_high3
+; CHECK-SAME: (i32 noundef [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[A:%.*]], 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[A]], 5
; CHECK-NEXT: br i1 [[CMP]], label [[A_GUARD:%.*]], label [[OUT:%.*]]
; CHECK: a_guard:
; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp slt i32 [[A]], 5
@@ -982,9 +1016,10 @@ out:
}
define i1 @clamp_high4(i32 noundef %a) {
-; CHECK-LABEL: @clamp_high4(
+; CHECK-LABEL: define i1 @clamp_high4
+; CHECK-SAME: (i32 noundef [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[A:%.*]], 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[A]], 5
; CHECK-NEXT: br i1 [[CMP]], label [[A_GUARD:%.*]], label [[OUT:%.*]]
; CHECK: a_guard:
; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp sge i32 [[A]], 5
@@ -1010,9 +1045,10 @@ out:
; Just showing arbitrary constants work, not really a clamp
define i1 @not_clamp_high(i32 noundef %a) {
-; CHECK-LABEL: @not_clamp_high(
+; CHECK-LABEL: define i1 @not_clamp_high
+; CHECK-SAME: (i32 noundef [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[A:%.*]], 5
+; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[A]], 5
; CHECK-NEXT: br i1 [[CMP]], label [[A_GUARD:%.*]], label [[OUT:%.*]]
; CHECK: a_guard:
; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp ne i32 [[A]], 5
@@ -1037,9 +1073,10 @@ out:
}
define void @abs1(i32 %a, ptr %p) {
-; CHECK-LABEL: @abs1(
+; CHECK-LABEL: define void @abs1
+; CHECK-SAME: (i32 [[A:%.*]], ptr [[P:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A:%.*]], 10
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A]], 10
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[A]], -20
; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP1]], [[CMP2]]
; CHECK-NEXT: br i1 [[AND]], label [[GUARD:%.*]], label [[EXIT:%.*]]
@@ -1047,7 +1084,7 @@ define void @abs1(i32 %a, ptr %p) {
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[A]]
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0
; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[A]]
-; CHECK-NEXT: store i1 true, ptr [[P:%.*]], align 1
+; CHECK-NEXT: store i1 true, ptr [[P]], align 1
; CHECK-NEXT: [[C2:%.*]] = icmp ult i32 [[ABS]], 19
; CHECK-NEXT: store i1 [[C2]], ptr [[P]], align 1
; CHECK-NEXT: store i1 true, ptr [[P]], align 1
@@ -1082,9 +1119,10 @@ exit:
}
define void @abs2(i32 %a, ptr %p) {
-; CHECK-LABEL: @abs2(
+; CHECK-LABEL: define void @abs2
+; CHECK-SAME: (i32 [[A:%.*]], ptr [[P:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A:%.*]], 10
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A]], 10
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[A]], -20
; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP1]], [[CMP2]]
; CHECK-NEXT: br i1 [[AND]], label [[GUARD:%.*]], label [[EXIT:%.*]]
@@ -1092,7 +1130,7 @@ define void @abs2(i32 %a, ptr %p) {
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[A]]
; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[A]], 0
; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[SUB]]
-; CHECK-NEXT: store i1 true, ptr [[P:%.*]], align 1
+; CHECK-NEXT: store i1 true, ptr [[P]], align 1
; CHECK-NEXT: [[C2:%.*]] = icmp ult i32 [[ABS]], 19
; CHECK-NEXT: store i1 [[C2]], ptr [[P]], align 1
; CHECK-NEXT: store i1 true, ptr [[P]], align 1
@@ -1127,9 +1165,10 @@ exit:
}
define void @nabs1(i32 %a, ptr %p) {
-; CHECK-LABEL: @nabs1(
+; CHECK-LABEL: define void @nabs1
+; CHECK-SAME: (i32 [[A:%.*]], ptr [[P:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A:%.*]], 10
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A]], 10
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[A]], -20
; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP1]], [[CMP2]]
; CHECK-NEXT: br i1 [[AND]], label [[GUARD:%.*]], label [[EXIT:%.*]]
@@ -1137,7 +1176,7 @@ define void @nabs1(i32 %a, ptr %p) {
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[A]]
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], 0
; CHECK-NEXT: [[NABS:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[A]]
-; CHECK-NEXT: store i1 true, ptr [[P:%.*]], align 1
+; CHECK-NEXT: store i1 true, ptr [[P]], align 1
; CHECK-NEXT: [[C2:%.*]] = icmp sgt i32 [[NABS]], -19
; CHECK-NEXT: store i1 [[C2]], ptr [[P]], align 1
; CHECK-NEXT: store i1 true, ptr [[P]], align 1
@@ -1172,9 +1211,10 @@ exit:
}
define void @nabs2(i32 %a, ptr %p) {
-; CHECK-LABEL: @nabs2(
+; CHECK-LABEL: define void @nabs2
+; CHECK-SAME: (i32 [[A:%.*]], ptr [[P:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A:%.*]], 10
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A]], 10
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[A]], -20
; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP1]], [[CMP2]]
; CHECK-NEXT: br i1 [[AND]], label [[GUARD:%.*]], label [[EXIT:%.*]]
@@ -1182,7 +1222,7 @@ define void @nabs2(i32 %a, ptr %p) {
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[A]]
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0
; CHECK-NEXT: [[NABS:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[SUB]]
-; CHECK-NEXT: store i1 true, ptr [[P:%.*]], align 1
+; CHECK-NEXT: store i1 true, ptr [[P]], align 1
; CHECK-NEXT: [[C2:%.*]] = icmp sgt i32 [[NABS]], -19
; CHECK-NEXT: store i1 [[C2]], ptr [[P]], align 1
; CHECK-NEXT: store i1 true, ptr [[P]], align 1
@@ -1217,9 +1257,10 @@ exit:
}
define i1 @zext_unknown(i8 %a) {
-; CHECK-LABEL: @zext_unknown(
+; CHECK-LABEL: define i1 @zext_unknown
+; CHECK-SAME: (i8 [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[A32:%.*]] = zext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[A32:%.*]] = zext i8 [[A]] to i32
; CHECK-NEXT: ret i1 true
;
entry:
@@ -1229,9 +1270,10 @@ entry:
}
define i1 @trunc_unknown(i32 %a) {
-; CHECK-LABEL: @trunc_unknown(
+; CHECK-LABEL: define i1 @trunc_unknown
+; CHECK-SAME: (i32 [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[A8:%.*]] = trunc i32 [[A:%.*]] to i8
+; CHECK-NEXT: [[A8:%.*]] = trunc i32 [[A]] to i8
; CHECK-NEXT: [[A32:%.*]] = sext i8 [[A8]] to i32
; CHECK-NEXT: ret i1 true
;
@@ -1243,12 +1285,13 @@ entry:
}
define void @trunc_icmp_ule(i32 %x, ptr %p) {
-; CHECK-LABEL: @trunc_icmp_ule(
-; CHECK-NEXT: [[T:%.*]] = trunc i32 [[X:%.*]] to i8
+; CHECK-LABEL: define void @trunc_icmp_ule
+; CHECK-SAME: (i32 [[X:%.*]], ptr [[P:%.*]]) {
+; CHECK-NEXT: [[T:%.*]] = trunc i32 [[X]] to i8
; CHECK-NEXT: [[C:%.*]] = icmp uge i8 [[T]], 5
; CHECK-NEXT: br i1 [[C]], label [[TRUE:%.*]], label [[FALSE:%.*]]
; CHECK: true:
-; CHECK-NEXT: store i1 true, ptr [[P:%.*]], align 1
+; CHECK-NEXT: store i1 true, ptr [[P]], align 1
; CHECK-NEXT: [[C2:%.*]] = icmp ugt i32 [[X]], 5
; CHECK-NEXT: store i1 [[C2]], ptr [[P]], align 1
; CHECK-NEXT: [[C3:%.*]] = icmp ule i32 [[X]], 5
@@ -1294,12 +1337,13 @@ false:
}
define void @trunc_icmp_eq(i32 %x, ptr %p) {
-; CHECK-LABEL: @trunc_icmp_eq(
-; CHECK-NEXT: [[T:%.*]] = trunc i32 [[X:%.*]] to i8
+; CHECK-LABEL: define void @trunc_icmp_eq
+; CHECK-SAME: (i32 [[X:%.*]], ptr [[P:%.*]]) {
+; CHECK-NEXT: [[T:%.*]] = trunc i32 [[X]] to i8
; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[T]], 5
; CHECK-NEXT: br i1 [[C]], label [[TRUE:%.*]], label [[FALSE:%.*]]
; CHECK: true:
-; CHECK-NEXT: store i1 true, ptr [[P:%.*]], align 1
+; CHECK-NEXT: store i1 true, ptr [[P]], align 1
; CHECK-NEXT: [[C2:%.*]] = icmp ugt i32 [[X]], 5
; CHECK-NEXT: store i1 [[C2]], ptr [[P]], align 1
; CHECK-NEXT: [[C3:%.*]] = icmp ule i32 [[X]], 5
@@ -1347,9 +1391,10 @@ false:
; TODO: missed optimization
; Make sure we exercise non-integer inputs to unary operators (i.e. crash check).
define i1 @bitcast_unknown(float %a) {
-; CHECK-LABEL: @bitcast_unknown(
+; CHECK-LABEL: define i1 @bitcast_unknown
+; CHECK-SAME: (float [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[A32:%.*]] = bitcast float [[A:%.*]] to i32
+; CHECK-NEXT: [[A32:%.*]] = bitcast float [[A]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[A32]], 128
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -1360,9 +1405,10 @@ entry:
}
define i1 @bitcast_unknown2(ptr %p) {
-; CHECK-LABEL: @bitcast_unknown2(
+; CHECK-LABEL: define i1 @bitcast_unknown2
+; CHECK-SAME: (ptr [[P:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[P64:%.*]] = ptrtoint ptr [[P:%.*]] to i64
+; CHECK-NEXT: [[P64:%.*]] = ptrtoint ptr [[P]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp sle i64 [[P64]], 128
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -1374,9 +1420,10 @@ entry:
define i1 @and_unknown(i32 %a) {
-; CHECK-LABEL: @and_unknown(
+; CHECK-LABEL: define i1 @and_unknown
+; CHECK-SAME: (i32 [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 128
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[A]], 128
; CHECK-NEXT: ret i1 true
;
entry:
@@ -1386,9 +1433,10 @@ entry:
}
define i1 @lshr_unknown(i32 %a) {
-; CHECK-LABEL: @lshr_unknown(
+; CHECK-LABEL: define i1 @lshr_unknown
+; CHECK-SAME: (i32 [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[AND:%.*]] = lshr i32 [[A:%.*]], 30
+; CHECK-NEXT: [[AND:%.*]] = lshr i32 [[A]], 30
; CHECK-NEXT: ret i1 true
;
entry:
@@ -1398,9 +1446,10 @@ entry:
}
define i1 @urem_unknown(i32 %a) {
-; CHECK-LABEL: @urem_unknown(
+; CHECK-LABEL: define i1 @urem_unknown
+; CHECK-SAME: (i32 [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[UREM:%.*]] = urem i32 [[A:%.*]], 30
+; CHECK-NEXT: [[UREM:%.*]] = urem i32 [[A]], 30
; CHECK-NEXT: ret i1 true
;
entry:
@@ -1410,9 +1459,10 @@ entry:
}
define i1 @srem_unknown(i32 %a) {
-; CHECK-LABEL: @srem_unknown(
+; CHECK-LABEL: define i1 @srem_unknown
+; CHECK-SAME: (i32 [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SREM:%.*]] = srem i32 [[A:%.*]], 30
+; CHECK-NEXT: [[SREM:%.*]] = srem i32 [[A]], 30
; CHECK-NEXT: br i1 undef, label [[EXIT1:%.*]], label [[EXIT2:%.*]]
; CHECK: exit1:
; CHECK-NEXT: ret i1 true
@@ -1431,9 +1481,10 @@ exit2:
}
define i1 @sdiv_unknown(i32 %a) {
-; CHECK-LABEL: @sdiv_unknown(
+; CHECK-LABEL: define i1 @sdiv_unknown
+; CHECK-SAME: (i32 [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SREM:%.*]] = sdiv i32 [[A:%.*]], 123
+; CHECK-NEXT: [[SREM:%.*]] = sdiv i32 [[A]], 123
; CHECK-NEXT: br i1 undef, label [[EXIT1:%.*]], label [[EXIT2:%.*]]
; CHECK: exit1:
; CHECK-NEXT: ret i1 true
@@ -1452,9 +1503,10 @@ exit2:
}
define i1 @uadd_sat_unknown(i32 %a) {
-; CHECK-LABEL: @uadd_sat_unknown(
+; CHECK-LABEL: define i1 @uadd_sat_unknown
+; CHECK-SAME: (i32 [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[VAL:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[A:%.*]], i32 100)
+; CHECK-NEXT: [[VAL:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[A]], i32 100)
; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[VAL]], 100
; CHECK-NEXT: br i1 undef, label [[EXIT1:%.*]], label [[EXIT2:%.*]]
; CHECK: exit1:
@@ -1474,9 +1526,10 @@ exit2:
}
define i1 @usub_sat_unknown(i32 %a) {
-; CHECK-LABEL: @usub_sat_unknown(
+; CHECK-LABEL: define i1 @usub_sat_unknown
+; CHECK-SAME: (i32 [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[VAL:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[A:%.*]], i32 100)
+; CHECK-NEXT: [[VAL:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[A]], i32 100)
; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[VAL]], -101
; CHECK-NEXT: br i1 undef, label [[EXIT1:%.*]], label [[EXIT2:%.*]]
; CHECK: exit1:
@@ -1496,9 +1549,10 @@ exit2:
}
define i1 @sadd_sat_unknown(i32 %a) {
-; CHECK-LABEL: @sadd_sat_unknown(
+; CHECK-LABEL: define i1 @sadd_sat_unknown
+; CHECK-SAME: (i32 [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[VAL:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[A:%.*]], i32 100)
+; CHECK-NEXT: [[VAL:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[A]], i32 100)
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[VAL]], -2147483548
; CHECK-NEXT: br i1 undef, label [[EXIT1:%.*]], label [[EXIT2:%.*]]
; CHECK: exit1:
@@ -1518,9 +1572,10 @@ exit2:
}
define i1 @ssub_sat_unknown(i32 %a) {
-; CHECK-LABEL: @ssub_sat_unknown(
+; CHECK-LABEL: define i1 @ssub_sat_unknown
+; CHECK-SAME: (i32 [[A:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[VAL:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[A:%.*]], i32 100)
+; CHECK-NEXT: [[VAL:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[A]], i32 100)
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[VAL]], 2147483547
; CHECK-NEXT: br i1 undef, label [[EXIT1:%.*]], label [[EXIT2:%.*]]
; CHECK: exit1:
@@ -1540,14 +1595,15 @@ exit2:
}
define void @select_and(i32 %a, ptr %p) {
-; CHECK-LABEL: @select_and(
+; CHECK-LABEL: define void @select_and
+; CHECK-SAME: (i32 [[A:%.*]], ptr [[P:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[A:%.*]], -10
+; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[A]], -10
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[A]], 10
; CHECK-NEXT: [[AND:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 false
; CHECK-NEXT: br i1 [[AND]], label [[GUARD:%.*]], label [[EXIT:%.*]]
; CHECK: guard:
-; CHECK-NEXT: store i1 false, ptr [[P:%.*]], align 1
+; CHECK-NEXT: store i1 false, ptr [[P]], align 1
; CHECK-NEXT: store i1 false, ptr [[P]], align 1
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
@@ -1571,15 +1627,16 @@ exit:
}
define void @select_and_wrong_const(i32 %a, ptr %p) {
-; CHECK-LABEL: @select_and_wrong_const(
+; CHECK-LABEL: define void @select_and_wrong_const
+; CHECK-SAME: (i32 [[A:%.*]], ptr [[P:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[A:%.*]], -10
+; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[A]], -10
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[A]], 10
; CHECK-NEXT: [[AND:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 true
; CHECK-NEXT: br i1 [[AND]], label [[GUARD:%.*]], label [[EXIT:%.*]]
; CHECK: guard:
; CHECK-NEXT: [[C1:%.*]] = icmp sgt i32 [[A]], 20
-; CHECK-NEXT: store i1 [[C1]], ptr [[P:%.*]], align 1
+; CHECK-NEXT: store i1 [[C1]], ptr [[P]], align 1
; CHECK-NEXT: [[C2:%.*]] = icmp slt i32 [[A]], -20
; CHECK-NEXT: store i1 [[C2]], ptr [[P]], align 1
; CHECK-NEXT: br label [[EXIT]]
@@ -1604,15 +1661,16 @@ exit:
}
define void @select_and_wrong_operand(i32 %a, ptr %p) {
-; CHECK-LABEL: @select_and_wrong_operand(
+; CHECK-LABEL: define void @select_and_wrong_operand
+; CHECK-SAME: (i32 [[A:%.*]], ptr [[P:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[A:%.*]], -10
+; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[A]], -10
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[A]], 10
; CHECK-NEXT: [[AND:%.*]] = select i1 [[CMP1]], i1 false, i1 [[CMP2]]
; CHECK-NEXT: br i1 [[AND]], label [[GUARD:%.*]], label [[EXIT:%.*]]
; CHECK: guard:
; CHECK-NEXT: [[C1:%.*]] = icmp sgt i32 [[A]], 20
-; CHECK-NEXT: store i1 [[C1]], ptr [[P:%.*]], align 1
+; CHECK-NEXT: store i1 [[C1]], ptr [[P]], align 1
; CHECK-NEXT: [[C2:%.*]] = icmp slt i32 [[A]], -20
; CHECK-NEXT: store i1 [[C2]], ptr [[P]], align 1
; CHECK-NEXT: br label [[EXIT]]
@@ -1637,14 +1695,15 @@ exit:
}
define void @select_or(i32 %a, ptr %p) {
-; CHECK-LABEL: @select_or(
+; CHECK-LABEL: define void @select_or
+; CHECK-SAME: (i32 [[A:%.*]], ptr [[P:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A:%.*]], -10
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A]], -10
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[A]], 10
; CHECK-NEXT: [[OR:%.*]] = select i1 [[CMP1]], i1 true, i1 [[CMP2]]
; CHECK-NEXT: br i1 [[OR]], label [[EXIT:%.*]], label [[GUARD:%.*]]
; CHECK: guard:
-; CHECK-NEXT: store i1 false, ptr [[P:%.*]], align 1
+; CHECK-NEXT: store i1 false, ptr [[P]], align 1
; CHECK-NEXT: store i1 false, ptr [[P]], align 1
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
@@ -1668,15 +1727,16 @@ exit:
}
define void @select_or_wrong_const(i32 %a, ptr %p) {
-; CHECK-LABEL: @select_or_wrong_const(
+; CHECK-LABEL: define void @select_or_wrong_const
+; CHECK-SAME: (i32 [[A:%.*]], ptr [[P:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A:%.*]], -10
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A]], -10
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[A]], 10
; CHECK-NEXT: [[OR:%.*]] = select i1 [[CMP1]], i1 false, i1 [[CMP2]]
; CHECK-NEXT: br i1 [[OR]], label [[EXIT:%.*]], label [[GUARD:%.*]]
; CHECK: guard:
; CHECK-NEXT: [[C1:%.*]] = icmp sgt i32 [[A]], 20
-; CHECK-NEXT: store i1 [[C1]], ptr [[P:%.*]], align 1
+; CHECK-NEXT: store i1 [[C1]], ptr [[P]], align 1
; CHECK-NEXT: [[C2:%.*]] = icmp slt i32 [[A]], -20
; CHECK-NEXT: store i1 [[C2]], ptr [[P]], align 1
; CHECK-NEXT: br label [[EXIT]]
@@ -1701,15 +1761,16 @@ exit:
}
define void @select_or_wrong_operand(i32 %a, ptr %p) {
-; CHECK-LABEL: @select_or_wrong_operand(
+; CHECK-LABEL: define void @select_or_wrong_operand
+; CHECK-SAME: (i32 [[A:%.*]], ptr [[P:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A:%.*]], -10
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A]], -10
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[A]], 10
; CHECK-NEXT: [[OR:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 true
; CHECK-NEXT: br i1 [[OR]], label [[EXIT:%.*]], label [[GUARD:%.*]]
; CHECK: guard:
; CHECK-NEXT: [[C1:%.*]] = icmp sgt i32 [[A]], 20
-; CHECK-NEXT: store i1 [[C1]], ptr [[P:%.*]], align 1
+; CHECK-NEXT: store i1 [[C1]], ptr [[P]], align 1
; CHECK-NEXT: [[C2:%.*]] = icmp slt i32 [[A]], -20
; CHECK-NEXT: store i1 [[C2]], ptr [[P]], align 1
; CHECK-NEXT: br label [[EXIT]]
@@ -1734,13 +1795,14 @@ exit:
}
define void @or_union(i32 %a, ptr %p) {
-; CHECK-LABEL: @or_union(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[A:%.*]], 10
+; CHECK-LABEL: define void @or_union
+; CHECK-SAME: (i32 [[A:%.*]], ptr [[P:%.*]]) {
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[A]], 10
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[A]], 12
; CHECK-NEXT: [[OR:%.*]] = or i1 [[CMP1]], [[CMP2]]
; CHECK-NEXT: br i1 [[OR]], label [[GUARD:%.*]], label [[EXIT:%.*]]
; CHECK: guard:
-; CHECK-NEXT: store i1 false, ptr [[P:%.*]], align 1
+; CHECK-NEXT: store i1 false, ptr [[P]], align 1
; CHECK-NEXT: [[C2:%.*]] = icmp eq i32 [[A]], 10
; CHECK-NEXT: store i1 [[C2]], ptr [[P]], align 1
; CHECK-NEXT: [[C3:%.*]] = icmp eq i32 [[A]], 11
@@ -1775,9 +1837,10 @@ exit:
}
define i1 @or_union_unknown_cond(i32 %a, i1 %c) {
-; CHECK-LABEL: @or_union_unknown_cond(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[A:%.*]], 10
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[CMP1]], [[C:%.*]]
+; CHECK-LABEL: define i1 @or_union_unknown_cond
+; CHECK-SAME: (i32 [[A:%.*]], i1 [[C:%.*]]) {
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[A]], 10
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CMP1]], [[C]]
; CHECK-NEXT: br i1 [[OR]], label [[GUARD:%.*]], label [[EXIT:%.*]]
; CHECK: guard:
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[A]], 10
@@ -1798,13 +1861,14 @@ exit:
}
define void @and_union(i32 %a, ptr %p) {
-; CHECK-LABEL: @and_union(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i32 [[A:%.*]], 10
+; CHECK-LABEL: define void @and_union
+; CHECK-SAME: (i32 [[A:%.*]], ptr [[P:%.*]]) {
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i32 [[A]], 10
; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i32 [[A]], 12
; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP1]], [[CMP2]]
; CHECK-NEXT: br i1 [[AND]], label [[EXIT:%.*]], label [[GUARD:%.*]]
; CHECK: guard:
-; CHECK-NEXT: store i1 false, ptr [[P:%.*]], align 1
+; CHECK-NEXT: store i1 false, ptr [[P]], align 1
; CHECK-NEXT: [[C2:%.*]] = icmp eq i32 [[A]], 10
; CHECK-NEXT: store i1 [[C2]], ptr [[P]], align 1
; CHECK-NEXT: [[C3:%.*]] = icmp eq i32 [[A]], 11
@@ -1839,9 +1903,10 @@ exit:
}
define i1 @and_union_unknown_cond(i32 %a, i1 %c) {
-; CHECK-LABEL: @and_union_unknown_cond(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i32 [[A:%.*]], 10
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP1]], [[C:%.*]]
+; CHECK-LABEL: define i1 @and_union_unknown_cond
+; CHECK-SAME: (i32 [[A:%.*]], i1 [[C:%.*]]) {
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i32 [[A]], 10
+; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP1]], [[C]]
; CHECK-NEXT: br i1 [[AND]], label [[EXIT:%.*]], label [[GUARD:%.*]]
; CHECK: guard:
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[A]], 10
@@ -1862,14 +1927,15 @@ exit:
}
define void @select_assume(i32 %a, i32 %b, i1 %c, ptr %p) {
-; CHECK-LABEL: @select_assume(
-; CHECK-NEXT: [[C1:%.*]] = icmp ult i32 [[A:%.*]], 10
+; CHECK-LABEL: define void @select_assume
+; CHECK-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i1 [[C:%.*]], ptr [[P:%.*]]) {
+; CHECK-NEXT: [[C1:%.*]] = icmp ult i32 [[A]], 10
; CHECK-NEXT: call void @llvm.assume(i1 [[C1]])
-; CHECK-NEXT: [[C2:%.*]] = icmp ult i32 [[B:%.*]], 20
+; CHECK-NEXT: [[C2:%.*]] = icmp ult i32 [[B]], 20
; CHECK-NEXT: call void @llvm.assume(i1 [[C2]])
-; CHECK-NEXT: [[S:%.*]] = select i1 [[C:%.*]], i32 [[A]], i32 [[B]]
+; CHECK-NEXT: [[S:%.*]] = select i1 [[C]], i32 [[A]], i32 [[B]]
; CHECK-NEXT: [[C3:%.*]] = icmp ult i32 [[S]], 19
-; CHECK-NEXT: store i1 [[C3]], ptr [[P:%.*]], align 1
+; CHECK-NEXT: store i1 [[C3]], ptr [[P]], align 1
; CHECK-NEXT: store i1 true, ptr [[P]], align 1
; CHECK-NEXT: ret void
;
@@ -1886,10 +1952,11 @@ define void @select_assume(i32 %a, i32 %b, i1 %c, ptr %p) {
}
define void @xor(i8 %a, ptr %p) {
-; CHECK-LABEL: @xor(
-; CHECK-NEXT: [[A_MASK:%.*]] = and i8 [[A:%.*]], 15
+; CHECK-LABEL: define void @xor
+; CHECK-SAME: (i8 [[A:%.*]], ptr [[P:%.*]]) {
+; CHECK-NEXT: [[A_MASK:%.*]] = and i8 [[A]], 15
; CHECK-NEXT: [[XOR:%.*]] = xor i8 [[A_MASK]], -86
-; CHECK-NEXT: store i1 true, ptr [[P:%.*]], align 1
+; CHECK-NEXT: store i1 true, ptr [[P]], align 1
; CHECK-NEXT: [[C2:%.*]] = icmp ugt i8 [[XOR]], -96
; CHECK-NEXT: store i1 [[C2]], ptr [[P]], align 1
; CHECK-NEXT: store i1 true, ptr [[P]], align 1
@@ -1911,8 +1978,9 @@ define void @xor(i8 %a, ptr %p) {
}
define i1 @xor_neg_cond(i32 %a) {
-; CHECK-LABEL: @xor_neg_cond(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[A:%.*]], 10
+; CHECK-LABEL: define i1 @xor_neg_cond
+; CHECK-SAME: (i32 [[A:%.*]]) {
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[A]], 10
; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[CMP1]], true
; CHECK-NEXT: br i1 [[XOR]], label [[EXIT:%.*]], label [[GUARD:%.*]]
; CHECK: guard:
@@ -1933,8 +2001,9 @@ exit:
}
define i1 @xor_approx(i32 %a) {
-; CHECK-LABEL: @xor_approx(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 [[A:%.*]], 2
+; CHECK-LABEL: define i1 @xor_approx
+; CHECK-SAME: (i32 [[A:%.*]]) {
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 [[A]], 2
; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[A]], 5
; CHECK-NEXT: [[CMP3:%.*]] = icmp ugt i32 [[A]], 7
; CHECK-NEXT: [[CMP4:%.*]] = icmp ult i32 [[A]], 9
@@ -1968,8 +2037,9 @@ exit:
}
define i1 @binop_eval_order(i32 %x) {
-; CHECK-LABEL: @binop_eval_order(
-; CHECK-NEXT: [[A:%.*]] = add nuw nsw i32 [[X:%.*]], 1
+; CHECK-LABEL: define i1 @binop_eval_order
+; CHECK-SAME: (i32 [[X:%.*]]) {
+; CHECK-NEXT: [[A:%.*]] = add nuw nsw i32 [[X]], 1
; CHECK-NEXT: [[B:%.*]] = add nuw nsw i32 [[A]], 1
; CHECK-NEXT: [[C:%.*]] = add nuw nsw i32 [[A]], [[B]]
; CHECK-NEXT: ret i1 true
@@ -1981,6 +2051,46 @@ define i1 @binop_eval_order(i32 %x) {
ret i1 %d
}
+define range(i32 0, 1024) i32 @range_larger(i8 %x) {
+; CHECK-LABEL: define range(i32 0, 1024) i32 @range_larger
+; CHECK-SAME: (i8 [[X:%.*]]) {
+; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[X]] to i32
+; CHECK-NEXT: ret i32 [[ZEXT]]
+;
+ %zext = zext i8 %x to i32
+ ret i32 %zext
+}
+
+define range(i32 0, 128) i32 @range_smaller(i8 %x) {
+; CHECK-LABEL: define range(i32 0, 128) i32 @range_smaller
+; CHECK-SAME: (i8 [[X:%.*]]) {
+; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[X]] to i32
+; CHECK-NEXT: ret i32 [[ZEXT]]
+;
+ %zext = zext i8 %x to i32
+ ret i32 %zext
+}
+
+define range(i32 128, 512) i32 @range_intersect(i8 %x) {
+; CHECK-LABEL: define range(i32 128, 512) i32 @range_intersect
+; CHECK-SAME: (i8 [[X:%.*]]) {
+; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[X]] to i32
+; CHECK-NEXT: ret i32 [[ZEXT]]
+;
+ %zext = zext i8 %x to i32
+ ret i32 %zext
+}
+
+define range(i32 512, 1024) i32 @range_non_overlapping(i8 %x) {
+; CHECK-LABEL: define range(i32 512, 1024) i32 @range_non_overlapping
+; CHECK-SAME: (i8 [[X:%.*]]) {
+; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[X]] to i32
+; CHECK-NEXT: ret i32 [[ZEXT]]
+;
+ %zext = zext i8 %x to i32
+ ret i32 %zext
+}
+
declare i32 @llvm.uadd.sat.i32(i32, i32)
declare i32 @llvm.usub.sat.i32(i32, i32)
declare i32 @llvm.sadd.sat.i32(i32, i32)
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