[llvm] d2e8b1d - [CVP] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 19 02:09:58 PDT 2024
Author: Nikita Popov
Date: 2024-07-19T11:09:50+02:00
New Revision: d2e8b1d717c465ed122e6135810a834c9626bfad
URL: https://github.com/llvm/llvm-project/commit/d2e8b1d717c465ed122e6135810a834c9626bfad
DIFF: https://github.com/llvm/llvm-project/commit/d2e8b1d717c465ed122e6135810a834c9626bfad.diff
LOG: [CVP] Regenerate test checks (NFC)
Added:
Modified:
llvm/test/Transforms/CorrelatedValuePropagation/ashr.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/CorrelatedValuePropagation/ashr.ll b/llvm/test/Transforms/CorrelatedValuePropagation/ashr.ll
index a5fb924404611..25bec18a5dbf3 100644
--- a/llvm/test/Transforms/CorrelatedValuePropagation/ashr.ll
+++ b/llvm/test/Transforms/CorrelatedValuePropagation/ashr.ll
@@ -1,13 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt < %s -passes=correlated-propagation -S | FileCheck %s
-; Check that debug locations are preserved. For more info see:
-; https://llvm.org/docs/SourceLevelDebugging.html#fixing-errors
-; RUN: opt < %s -enable-debugify -passes=correlated-propagation -S 2>&1 | \
-; RUN: FileCheck %s -check-prefix=DEBUG
-; DEBUG: CheckModuleDebugify: PASS
-
-; CHECK-LABEL: @test1
define void @test1(i32 %n) {
+; CHECK-LABEL: define void @test1(
+; CHECK-SAME: i32 [[N:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_COND:.*]]
+; CHECK: [[FOR_COND]]:
+; CHECK-NEXT: [[A:%.*]] = phi i32 [ [[N]], %[[ENTRY]] ], [ [[SHR:%.*]], %[[FOR_BODY:.*]] ]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], 1
+; CHECK-NEXT: br i1 [[CMP]], label %[[FOR_BODY]], label %[[FOR_END:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[SHR]] = lshr i32 [[A]], 5
+; CHECK-NEXT: br label %[[FOR_COND]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.cond
@@ -17,7 +25,6 @@ for.cond: ; preds = %for.body, %entry
br i1 %cmp, label %for.body, label %for.end
for.body: ; preds = %for.cond
-; CHECK: lshr i32 %a, 5
%shr = ashr i32 %a, 5
br label %for.cond
@@ -26,8 +33,21 @@ for.end: ; preds = %for.cond
}
;; Negative test to show transform doesn't happen unless n > 0.
-; CHECK-LABEL: @test2
define void @test2(i32 %n) {
+; CHECK-LABEL: define void @test2(
+; CHECK-SAME: i32 [[N:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_COND:.*]]
+; CHECK: [[FOR_COND]]:
+; CHECK-NEXT: [[A:%.*]] = phi i32 [ [[N]], %[[ENTRY]] ], [ [[SHR:%.*]], %[[FOR_BODY:.*]] ]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], -2
+; CHECK-NEXT: br i1 [[CMP]], label %[[FOR_BODY]], label %[[FOR_END:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[SHR]] = ashr i32 [[A]], 2
+; CHECK-NEXT: br label %[[FOR_COND]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.cond
@@ -37,7 +57,6 @@ for.cond: ; preds = %for.body, %entry
br i1 %cmp, label %for.body, label %for.end
for.body: ; preds = %for.cond
-; CHECK: ashr i32 %a, 2
%shr = ashr i32 %a, 2
br label %for.cond
@@ -46,14 +65,23 @@ for.end: ; preds = %for.cond
}
;; Non looping test case.
-; CHECK-LABEL: @test3
define void @test3(i32 %n) {
+; CHECK-LABEL: define void @test3(
+; CHECK-SAME: i32 [[N:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N]], 0
+; CHECK-NEXT: br i1 [[CMP]], label %[[BB:.*]], label %[[EXIT:.*]]
+; CHECK: [[BB]]:
+; CHECK-NEXT: [[SHR:%.*]] = lshr exact i32 [[N]], 4
+; CHECK-NEXT: br label %[[EXIT]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
entry:
%cmp = icmp sgt i32 %n, 0
br i1 %cmp, label %bb, label %exit
bb:
-; CHECK: lshr exact i32 %n, 4
%shr = ashr exact i32 %n, 4
br label %exit
@@ -65,14 +93,26 @@ exit:
; at the point of ashr, we know that the operand is always greater than 0,
; because of the guard before it, so we can transform it to lshr.
declare void @llvm.experimental.guard(i1,...)
-; CHECK-LABEL: @test4
define void @test4(i32 %n) {
+; CHECK-LABEL: define void @test4(
+; CHECK-SAME: i32 [[N:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N]], 0
+; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP:.*]], label %[[EXIT:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[A:%.*]] = phi i32 [ [[N]], %[[ENTRY]] ], [ [[SHR:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[COND:%.*]] = icmp sgt i32 [[A]], 2
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[COND]]) [ "deopt"() ]
+; CHECK-NEXT: [[SHR]] = lshr i32 [[A]], 1
+; CHECK-NEXT: br i1 [[COND]], label %[[LOOP]], label %[[EXIT]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
entry:
%cmp = icmp sgt i32 %n, 0
br i1 %cmp, label %loop, label %exit
loop:
-; CHECK: lshr i32 %a, 1
%a = phi i32 [ %n, %entry ], [ %shr, %loop ]
%cond = icmp sgt i32 %a, 2
call void(i1,...) @llvm.experimental.guard(i1 %cond) [ "deopt"() ]
@@ -85,14 +125,27 @@ exit:
; same test as above with assume instead of guard.
declare void @llvm.assume(i1)
-; CHECK-LABEL: @test5
define void @test5(i32 %n) {
+; CHECK-LABEL: define void @test5(
+; CHECK-SAME: i32 [[N:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N]], 0
+; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP:.*]], label %[[EXIT:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[A:%.*]] = phi i32 [ [[N]], %[[ENTRY]] ], [ [[SHR:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[COND:%.*]] = icmp ugt i32 [[A]], 4
+; CHECK-NEXT: call void @llvm.assume(i1 [[COND]])
+; CHECK-NEXT: [[SHR]] = lshr i32 [[A]], 1
+; CHECK-NEXT: [[LOOPCOND:%.*]] = icmp ugt i32 [[SHR]], 8
+; CHECK-NEXT: br i1 [[LOOPCOND]], label %[[LOOP]], label %[[EXIT]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
entry:
%cmp = icmp sgt i32 %n, 0
br i1 %cmp, label %loop, label %exit
loop:
-; CHECK: lshr i32 %a, 1
%a = phi i32 [ %n, %entry ], [ %shr, %loop ]
%cond = icmp sgt i32 %a, 4
call void @llvm.assume(i1 %cond)
@@ -105,54 +158,72 @@ exit:
}
; check that ashr of -1 or 0 is optimized away
-; CHECK-LABEL: @test6
define i32 @test6(i32 %f, i32 %g) {
+; CHECK-LABEL: define i32 @test6(
+; CHECK-SAME: i32 [[F:%.*]], i32 [[G:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[F]], 1
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[TMP0]], 2
+; CHECK-NEXT: tail call void @llvm.assume(i1 [[TMP1]])
+; CHECK-NEXT: ret i32 [[F]]
+;
entry:
%0 = add i32 %f, 1
%1 = icmp ult i32 %0, 2
tail call void @llvm.assume(i1 %1)
-; CHECK: ret i32 %f
%shr = ashr i32 %f, %g
ret i32 %shr
}
; same test as above with
diff erent numbers
-; CHECK-LABEL: @test7
define i32 @test7(i32 %f, i32 %g) {
+; CHECK-LABEL: define i32 @test7(
+; CHECK-SAME: i32 [[F:%.*]], i32 [[G:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[F]], -2
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 6
+; CHECK-NEXT: tail call void @llvm.assume(i1 [[TMP1]])
+; CHECK-NEXT: [[SUB:%.*]] = add nsw i32 [[F]], -7
+; CHECK-NEXT: ret i32 [[SUB]]
+;
entry:
%0 = and i32 %f, -2
%1 = icmp eq i32 %0, 6
tail call void @llvm.assume(i1 %1)
%sub = add nsw i32 %f, -7
-; CHECK: ret i32 %sub
%shr = ashr i32 %sub, %g
ret i32 %shr
}
; check that ashr of -2 or 1 is not optimized away
-; CHECK-LABEL: @test8
define i32 @test8(i32 %f, i32 %g, i1 %s) {
+; CHECK-LABEL: define i32 @test8(
+; CHECK-SAME: i32 [[F:%.*]], i32 [[G:%.*]], i1 [[S:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP0:%.*]] = ashr i32 -2, [[F]]
+; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 1, [[G]]
+; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[S]], i32 [[TMP0]], i32 [[TMP1]]
+; CHECK-NEXT: ret i32 [[TMP2]]
+;
entry:
-; CHECK: ashr i32 -2, %f
%0 = ashr i32 -2, %f
-; CHECK: lshr i32 1, %g
%1 = ashr i32 1, %g
%2 = select i1 %s, i32 %0, i32 %1
ret i32 %2
}
define i32 @may_including_undef(i1 %c.1, i1 %c.2) {
-; CHECK-LABEL: define i32 @may_including_undef
-; CHECK-SAME: (i1 [[C_1:%.*]], i1 [[C_2:%.*]]) {
-; CHECK-NEXT: br i1 [[C_1]], label [[TRUE_1:%.*]], label [[FALSE:%.*]]
-; CHECK: true.1:
-; CHECK-NEXT: br i1 [[C_2]], label [[TRUE_2:%.*]], label [[EXIT:%.*]]
-; CHECK: true.2:
-; CHECK-NEXT: br label [[EXIT]]
-; CHECK: false:
-; CHECK-NEXT: br label [[EXIT]]
-; CHECK: exit:
-; CHECK-NEXT: [[P:%.*]] = phi i32 [ 2, [[TRUE_1]] ], [ 4, [[TRUE_2]] ], [ undef, [[FALSE]] ]
+; CHECK-LABEL: define i32 @may_including_undef(
+; CHECK-SAME: i1 [[C_1:%.*]], i1 [[C_2:%.*]]) {
+; CHECK-NEXT: br i1 [[C_1]], label %[[TRUE_1:.*]], label %[[FALSE:.*]]
+; CHECK: [[TRUE_1]]:
+; CHECK-NEXT: br i1 [[C_2]], label %[[TRUE_2:.*]], label %[[EXIT:.*]]
+; CHECK: [[TRUE_2]]:
+; CHECK-NEXT: br label %[[EXIT]]
+; CHECK: [[FALSE]]:
+; CHECK-NEXT: br label %[[EXIT]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: [[P:%.*]] = phi i32 [ 2, %[[TRUE_1]] ], [ 4, %[[TRUE_2]] ], [ undef, %[[FALSE]] ]
; CHECK-NEXT: [[R:%.*]] = ashr i32 [[P]], 1
; CHECK-NEXT: ret i32 [[R]]
;
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