[llvm] [PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)
Stefan Pintilie via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 18 13:03:06 PDT 2024
https://github.com/stefanp-ibm updated https://github.com/llvm/llvm-project/pull/94628
>From 48d0e840f7dd61d4d7db4019b4212c2def8ef2b4 Mon Sep 17 00:00:00 2001
From: Stefan Pintilie <stefanp at ca.ibm.com>
Date: Wed, 26 Jun 2024 21:38:26 -0500
Subject: [PATCH 01/10] [RegisterCoalescer] Fix issue in the RegisterCoalescer.
Two tests are added to this fix. The X86 test fails without the patch.
The PowerPC test passes with and without the patch but is added as a way
track future possible failures when register classes are changed in a
future patch.
---
llvm/lib/CodeGen/RegisterCoalescer.cpp | 8 ++
.../test/CodeGen/PowerPC/subreg-coalescer.mir | 26 ++++
llvm/test/CodeGen/X86/subreg-fail.mir | 124 ++++++++++++++++++
3 files changed, 158 insertions(+)
create mode 100644 llvm/test/CodeGen/PowerPC/subreg-coalescer.mir
create mode 100644 llvm/test/CodeGen/X86/subreg-fail.mir
diff --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp
index 1c35a88b4dc4a..5d6ab88be64ad 100644
--- a/llvm/lib/CodeGen/RegisterCoalescer.cpp
+++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp
@@ -3671,6 +3671,14 @@ bool RegisterCoalescer::joinVirtRegs(CoalescerPair &CP) {
// having stale segments.
LHSVals.pruneMainSegments(LHS, ShrinkMainRange);
+ LHSVals.pruneSubRegValues(LHS, ShrinkMask);
+ RHSVals.pruneSubRegValues(LHS, ShrinkMask);
+ } else if (TrackSubRegLiveness && !CP.getDstIdx() && CP.getSrcIdx()) {
+ LHS.createSubRangeFrom(LIS->getVNInfoAllocator(),
+ CP.getNewRC()->getLaneMask(), LHS);
+ mergeSubRangeInto(LHS, RHS, TRI->getSubRegIndexLaneMask(CP.getSrcIdx()), CP,
+ CP.getDstIdx());
+ LHSVals.pruneMainSegments(LHS, ShrinkMainRange);
LHSVals.pruneSubRegValues(LHS, ShrinkMask);
RHSVals.pruneSubRegValues(LHS, ShrinkMask);
}
diff --git a/llvm/test/CodeGen/PowerPC/subreg-coalescer.mir b/llvm/test/CodeGen/PowerPC/subreg-coalescer.mir
new file mode 100644
index 0000000000000..8b04997ff335f
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/subreg-coalescer.mir
@@ -0,0 +1,26 @@
+# RUN: llc -mtriple powerpc64le-unknown-linux-gnu -mcpu=pwr8 -x mir < %s \
+# RUN: -verify-machineinstrs --run-pass=register-coalescer -o - | FileCheck %s
+
+---
+name: check_subregs
+alignment: 16
+tracksRegLiveness: true
+body: |
+ bb.0.entry:
+ liveins: $x3
+
+ %0:g8rc_and_g8rc_nox0 = COPY $x3
+ %3:f8rc, %4:g8rc_and_g8rc_nox0 = LFSUX %0, %0
+ %5:f4rc = FRSP killed %3, implicit $rm
+ %22:vslrc = SUBREG_TO_REG 1, %5, %subreg.sub_64
+ %11:vrrc = XVCVDPSP killed %22, implicit $rm
+ $v2 = COPY %11
+ BLR8 implicit $lr8, implicit $rm, implicit $v2
+...
+
+# CHECK: %0:g8rc_and_g8rc_nox0 = COPY $x3
+# CHECK-NEXT: %1:f8rc, dead %2:g8rc_and_g8rc_nox0 = LFSUX %0, %0
+# CHECK-NEXT: undef %4.sub_64:vslrc = FRSP %1, implicit $rm
+# CHECK-NEXT: %5:vrrc = XVCVDPSP %4, implicit $rm
+# CHECK-NEXT: $v2 = COPY %5
+# CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $v2
diff --git a/llvm/test/CodeGen/X86/subreg-fail.mir b/llvm/test/CodeGen/X86/subreg-fail.mir
new file mode 100644
index 0000000000000..a563141d59c9f
--- /dev/null
+++ b/llvm/test/CodeGen/X86/subreg-fail.mir
@@ -0,0 +1,124 @@
+# RUN: llc -mtriple x86_64-unknown-unknown -x mir < %s \
+# RUN: -verify-machineinstrs -enable-subreg-liveness=true \
+# RUN: --run-pass=register-coalescer -o - | FileCheck %s
+
+--- |
+ target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
+ target triple = "x86_64-unknown-unknown"
+
+ %pair = type { i64, double }
+ %t21 = type { ptr }
+ %t13 = type { ptr, %t15, %t15 }
+ %t15 = type { i8, i32, i32 }
+
+ @__force_order = external hidden global i32, align 4
+ @.str = private unnamed_addr constant { [1 x i8], [63 x i8] } zeroinitializer, align 32
+ @a = external global i32, align 4
+ @fn1.g = private unnamed_addr constant [9 x ptr] [ptr null, ptr @a, ptr null, ptr null, ptr null, ptr null, ptr null, ptr null, ptr null], align 16
+ @e = external global i32, align 4
+ @__stack_chk_guard = external dso_local global ptr
+
+ ; Function Attrs: nounwind ssp
+ define i32 @test1() #0 {
+ entry:
+ %tmp5.i = load volatile i32, ptr undef, align 4
+ %conv.i = zext i32 %tmp5.i to i64
+ %tmp12.i = load volatile i32, ptr undef, align 4
+ %conv13.i = zext i32 %tmp12.i to i64
+ %shl.i = shl i64 %conv13.i, 32
+ %or.i = or i64 %shl.i, %conv.i
+ %add16.i = add i64 %or.i, 256
+ %shr.i = lshr i64 %add16.i, 8
+ %conv19.i = trunc i64 %shr.i to i32
+ store volatile i32 %conv19.i, ptr undef, align 4
+ ret i32 undef
+ }
+...
+---
+name: test1
+alignment: 16
+exposesReturnsTwice: false
+legalized: false
+regBankSelected: false
+selected: false
+failedISel: false
+tracksRegLiveness: true
+hasWinCFI: false
+callsEHReturn: false
+callsUnwindInit: false
+hasEHCatchret: false
+hasEHScopes: false
+hasEHFunclets: false
+isOutlined: false
+debugInstrRef: true
+failsVerification: false
+tracksDebugUserValues: false
+registers:
+ - { id: 0, class: gr32, preferred-register: '' }
+ - { id: 1, class: gr64, preferred-register: '' }
+ - { id: 2, class: gr64_nosp, preferred-register: '' }
+ - { id: 3, class: gr32, preferred-register: '' }
+ - { id: 4, class: gr64, preferred-register: '' }
+ - { id: 5, class: gr64, preferred-register: '' }
+ - { id: 6, class: gr64, preferred-register: '' }
+ - { id: 7, class: gr64, preferred-register: '' }
+ - { id: 8, class: gr64, preferred-register: '' }
+ - { id: 9, class: gr32, preferred-register: '' }
+ - { id: 10, class: gr64, preferred-register: '' }
+ - { id: 11, class: gr32, preferred-register: '' }
+liveins: []
+frameInfo:
+ isFrameAddressTaken: false
+ isReturnAddressTaken: false
+ hasStackMap: false
+ hasPatchPoint: false
+ stackSize: 0
+ offsetAdjustment: 0
+ maxAlignment: 1
+ adjustsStack: false
+ hasCalls: false
+ stackProtector: ''
+ functionContext: ''
+ maxCallFrameSize: 4294967295
+ cvBytesOfCalleeSavedRegisters: 0
+ hasOpaqueSPAdjustment: false
+ hasVAStart: false
+ hasMustTailInVarArgFunc: false
+ hasTailCall: false
+ isCalleeSavedInfoValid: false
+ localFrameSize: 0
+ savePoint: ''
+ restorePoint: ''
+fixedStack: []
+stack: []
+entry_values: []
+callSites: []
+debugValueSubstitutions: []
+constants: []
+machineFunctionInfo:
+ amxProgModel: None
+body: |
+ bb.0.entry:
+ %0:gr32 = MOV32rm undef %1:gr64, 1, $noreg, 0, $noreg :: (volatile load (s32) from `ptr undef`)
+ %2:gr64_nosp = SUBREG_TO_REG 0, killed %0, %subreg.sub_32bit
+ %3:gr32 = MOV32rm undef %4:gr64, 1, $noreg, 0, $noreg :: (volatile load (s32) from `ptr undef`)
+ %5:gr64 = SUBREG_TO_REG 0, killed %3, %subreg.sub_32bit
+ %6:gr64 = COPY killed %5
+ %6:gr64 = SHL64ri %6, 32, implicit-def dead $eflags
+ %7:gr64 = LEA64r killed %6, 1, killed %2, 256, $noreg
+ %8:gr64 = COPY killed %7
+ %8:gr64 = SHR64ri %8, 8, implicit-def dead $eflags
+ %9:gr32 = COPY killed %8.sub_32bit
+ MOV32mr undef %10:gr64, 1, $noreg, 0, $noreg, killed %9 :: (volatile store (s32) into `ptr undef`)
+ RET 0, undef $eax
+
+...
+
+# CHECK: undef %2.sub_32bit:gr64_nosp = MOV32rm undef %1:gr64, 1, $noreg, 0, $noreg :: (volatile load (s32) from `ptr undef`)
+# CHECK-NEXT: undef %6.sub_32bit:gr64_with_sub_8bit = MOV32rm undef %4:gr64, 1, $noreg, 0, $noreg :: (volatile load (s32) from `ptr undef`)
+# CHECK-NEXT: %6:gr64_with_sub_8bit = SHL64ri %6, 32, implicit-def dead $eflags
+# CHECK-NEXT: %8:gr64_with_sub_8bit = LEA64r %6, 1, %2, 256, $noreg
+# CHECK-NEXT: %8:gr64_with_sub_8bit = SHR64ri %8, 8, implicit-def dead $eflags
+# CHECK-NEXT: MOV32mr undef %10:gr64, 1, $noreg, 0, $noreg, %8.sub_32bit :: (volatile store (s32) into `ptr undef`)
+# CHECK-NEXT: RET 0, undef $eax
+
>From ed85c8756f876a19c647341e0de4083364f9968e Mon Sep 17 00:00:00 2001
From: Stefan Pintilie <stefanp at ca.ibm.com>
Date: Thu, 27 Jun 2024 13:34:24 -0500
Subject: [PATCH 02/10] Updated and cleaned up test cases.
---
llvm/lib/CodeGen/RegisterCoalescer.cpp | 1 -
.../test/CodeGen/PowerPC/subreg-coalescer.mir | 30 +++--
llvm/test/CodeGen/X86/subreg-fail.mir | 113 ++----------------
3 files changed, 28 insertions(+), 116 deletions(-)
diff --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp
index 5d6ab88be64ad..043ea20191487 100644
--- a/llvm/lib/CodeGen/RegisterCoalescer.cpp
+++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp
@@ -3680,7 +3680,6 @@ bool RegisterCoalescer::joinVirtRegs(CoalescerPair &CP) {
CP.getDstIdx());
LHSVals.pruneMainSegments(LHS, ShrinkMainRange);
LHSVals.pruneSubRegValues(LHS, ShrinkMask);
- RHSVals.pruneSubRegValues(LHS, ShrinkMask);
}
// The merging algorithm in LiveInterval::join() can't handle conflicting
diff --git a/llvm/test/CodeGen/PowerPC/subreg-coalescer.mir b/llvm/test/CodeGen/PowerPC/subreg-coalescer.mir
index 8b04997ff335f..f58a0d0cd96a6 100644
--- a/llvm/test/CodeGen/PowerPC/subreg-coalescer.mir
+++ b/llvm/test/CodeGen/PowerPC/subreg-coalescer.mir
@@ -1,26 +1,30 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple powerpc64le-unknown-linux-gnu -mcpu=pwr8 -x mir < %s \
-# RUN: -verify-machineinstrs --run-pass=register-coalescer -o - | FileCheck %s
+# RUN: -verify-coalescing --run-pass=register-coalescer -o - | FileCheck %s
---
name: check_subregs
alignment: 16
tracksRegLiveness: true
body: |
- bb.0.entry:
+ bb.0:
liveins: $x3
+ ; CHECK-LABEL: name: check_subregs
+ ; CHECK: liveins: $x3
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x3
+ ; CHECK-NEXT: [[LFSUX:%[0-9]+]]:f8rc, dead [[LFSUX1:%[0-9]+]]:g8rc_and_g8rc_nox0 = LFSUX [[COPY]], [[COPY]]
+ ; CHECK-NEXT: undef [[FRSP:%[0-9]+]].sub_64:vslrc = FRSP [[LFSUX]], implicit $rm
+ ; CHECK-NEXT: [[XVCVDPSP:%[0-9]+]]:vrrc = XVCVDPSP [[FRSP]], implicit $rm
+ ; CHECK-NEXT: $v2 = COPY [[XVCVDPSP]]
+ ; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $v2
%0:g8rc_and_g8rc_nox0 = COPY $x3
- %3:f8rc, %4:g8rc_and_g8rc_nox0 = LFSUX %0, %0
- %5:f4rc = FRSP killed %3, implicit $rm
- %22:vslrc = SUBREG_TO_REG 1, %5, %subreg.sub_64
- %11:vrrc = XVCVDPSP killed %22, implicit $rm
- $v2 = COPY %11
+ %1:f8rc, %2:g8rc_and_g8rc_nox0 = LFSUX %0, %0
+ %3:f4rc = FRSP killed %1, implicit $rm
+ %4:vslrc = SUBREG_TO_REG 1, %3, %subreg.sub_64
+ %5:vrrc = XVCVDPSP killed %4, implicit $rm
+ $v2 = COPY %5
BLR8 implicit $lr8, implicit $rm, implicit $v2
...
-# CHECK: %0:g8rc_and_g8rc_nox0 = COPY $x3
-# CHECK-NEXT: %1:f8rc, dead %2:g8rc_and_g8rc_nox0 = LFSUX %0, %0
-# CHECK-NEXT: undef %4.sub_64:vslrc = FRSP %1, implicit $rm
-# CHECK-NEXT: %5:vrrc = XVCVDPSP %4, implicit $rm
-# CHECK-NEXT: $v2 = COPY %5
-# CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $v2
diff --git a/llvm/test/CodeGen/X86/subreg-fail.mir b/llvm/test/CodeGen/X86/subreg-fail.mir
index a563141d59c9f..7e91bbf350866 100644
--- a/llvm/test/CodeGen/X86/subreg-fail.mir
+++ b/llvm/test/CodeGen/X86/subreg-fail.mir
@@ -1,104 +1,22 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple x86_64-unknown-unknown -x mir < %s \
-# RUN: -verify-machineinstrs -enable-subreg-liveness=true \
+# RUN: -verify-coalescing -enable-subreg-liveness=true \
# RUN: --run-pass=register-coalescer -o - | FileCheck %s
---- |
- target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
- target triple = "x86_64-unknown-unknown"
-
- %pair = type { i64, double }
- %t21 = type { ptr }
- %t13 = type { ptr, %t15, %t15 }
- %t15 = type { i8, i32, i32 }
-
- @__force_order = external hidden global i32, align 4
- @.str = private unnamed_addr constant { [1 x i8], [63 x i8] } zeroinitializer, align 32
- @a = external global i32, align 4
- @fn1.g = private unnamed_addr constant [9 x ptr] [ptr null, ptr @a, ptr null, ptr null, ptr null, ptr null, ptr null, ptr null, ptr null], align 16
- @e = external global i32, align 4
- @__stack_chk_guard = external dso_local global ptr
-
- ; Function Attrs: nounwind ssp
- define i32 @test1() #0 {
- entry:
- %tmp5.i = load volatile i32, ptr undef, align 4
- %conv.i = zext i32 %tmp5.i to i64
- %tmp12.i = load volatile i32, ptr undef, align 4
- %conv13.i = zext i32 %tmp12.i to i64
- %shl.i = shl i64 %conv13.i, 32
- %or.i = or i64 %shl.i, %conv.i
- %add16.i = add i64 %or.i, 256
- %shr.i = lshr i64 %add16.i, 8
- %conv19.i = trunc i64 %shr.i to i32
- store volatile i32 %conv19.i, ptr undef, align 4
- ret i32 undef
- }
-...
---
name: test1
alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
tracksRegLiveness: true
-hasWinCFI: false
-callsEHReturn: false
-callsUnwindInit: false
-hasEHCatchret: false
-hasEHScopes: false
-hasEHFunclets: false
-isOutlined: false
-debugInstrRef: true
-failsVerification: false
-tracksDebugUserValues: false
-registers:
- - { id: 0, class: gr32, preferred-register: '' }
- - { id: 1, class: gr64, preferred-register: '' }
- - { id: 2, class: gr64_nosp, preferred-register: '' }
- - { id: 3, class: gr32, preferred-register: '' }
- - { id: 4, class: gr64, preferred-register: '' }
- - { id: 5, class: gr64, preferred-register: '' }
- - { id: 6, class: gr64, preferred-register: '' }
- - { id: 7, class: gr64, preferred-register: '' }
- - { id: 8, class: gr64, preferred-register: '' }
- - { id: 9, class: gr32, preferred-register: '' }
- - { id: 10, class: gr64, preferred-register: '' }
- - { id: 11, class: gr32, preferred-register: '' }
-liveins: []
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 1
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- functionContext: ''
- maxCallFrameSize: 4294967295
- cvBytesOfCalleeSavedRegisters: 0
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- hasTailCall: false
- isCalleeSavedInfoValid: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack: []
-stack: []
-entry_values: []
-callSites: []
-debugValueSubstitutions: []
-constants: []
-machineFunctionInfo:
- amxProgModel: None
body: |
- bb.0.entry:
+ bb.0:
+ ; CHECK-LABEL: name: test1
+ ; CHECK: undef [[MOV32rm:%[0-9]+]].sub_32bit:gr64_nosp = MOV32rm undef %1:gr64, 1, $noreg, 0, $noreg :: (volatile load (s32) from `ptr undef`)
+ ; CHECK-NEXT: undef [[MOV32rm1:%[0-9]+]].sub_32bit:gr64_with_sub_8bit = MOV32rm undef %4:gr64, 1, $noreg, 0, $noreg :: (volatile load (s32) from `ptr undef`)
+ ; CHECK-NEXT: [[MOV32rm1:%[0-9]+]]:gr64_with_sub_8bit = SHL64ri [[MOV32rm1]], 32, implicit-def dead $eflags
+ ; CHECK-NEXT: [[LEA64r:%[0-9]+]]:gr64_with_sub_8bit = LEA64r [[MOV32rm1]], 1, [[MOV32rm]], 256, $noreg
+ ; CHECK-NEXT: [[LEA64r:%[0-9]+]]:gr64_with_sub_8bit = SHR64ri [[LEA64r]], 8, implicit-def dead $eflags
+ ; CHECK-NEXT: MOV32mr undef %10:gr64, 1, $noreg, 0, $noreg, [[LEA64r]].sub_32bit :: (volatile store (s32) into `ptr undef`)
+ ; CHECK-NEXT: RET 0, undef $eax
%0:gr32 = MOV32rm undef %1:gr64, 1, $noreg, 0, $noreg :: (volatile load (s32) from `ptr undef`)
%2:gr64_nosp = SUBREG_TO_REG 0, killed %0, %subreg.sub_32bit
%3:gr32 = MOV32rm undef %4:gr64, 1, $noreg, 0, $noreg :: (volatile load (s32) from `ptr undef`)
@@ -113,12 +31,3 @@ body: |
RET 0, undef $eax
...
-
-# CHECK: undef %2.sub_32bit:gr64_nosp = MOV32rm undef %1:gr64, 1, $noreg, 0, $noreg :: (volatile load (s32) from `ptr undef`)
-# CHECK-NEXT: undef %6.sub_32bit:gr64_with_sub_8bit = MOV32rm undef %4:gr64, 1, $noreg, 0, $noreg :: (volatile load (s32) from `ptr undef`)
-# CHECK-NEXT: %6:gr64_with_sub_8bit = SHL64ri %6, 32, implicit-def dead $eflags
-# CHECK-NEXT: %8:gr64_with_sub_8bit = LEA64r %6, 1, %2, 256, $noreg
-# CHECK-NEXT: %8:gr64_with_sub_8bit = SHR64ri %8, 8, implicit-def dead $eflags
-# CHECK-NEXT: MOV32mr undef %10:gr64, 1, $noreg, 0, $noreg, %8.sub_32bit :: (volatile store (s32) into `ptr undef`)
-# CHECK-NEXT: RET 0, undef $eax
-
>From 6c707edffd1e368461cf50cc0068f2c29ece56d8 Mon Sep 17 00:00:00 2001
From: Stefan Pintilie <stefanp at ca.ibm.com>
Date: Thu, 27 Jun 2024 16:23:55 -0500
Subject: [PATCH 03/10] Added little comment to each test.
---
llvm/test/CodeGen/PowerPC/subreg-coalescer.mir | 4 ++++
llvm/test/CodeGen/X86/subreg-fail.mir | 4 ++++
2 files changed, 8 insertions(+)
diff --git a/llvm/test/CodeGen/PowerPC/subreg-coalescer.mir b/llvm/test/CodeGen/PowerPC/subreg-coalescer.mir
index f58a0d0cd96a6..818a5e2340722 100644
--- a/llvm/test/CodeGen/PowerPC/subreg-coalescer.mir
+++ b/llvm/test/CodeGen/PowerPC/subreg-coalescer.mir
@@ -2,6 +2,10 @@
# RUN: llc -mtriple powerpc64le-unknown-linux-gnu -mcpu=pwr8 -x mir < %s \
# RUN: -verify-coalescing --run-pass=register-coalescer -o - | FileCheck %s
+# Check that the register coalescer correctly handles merging live ranges over
+# SUBREG_TO_REG on PowerPC. The -verify-coalescing option will give an error if
+# this is incorrect.
+
---
name: check_subregs
alignment: 16
diff --git a/llvm/test/CodeGen/X86/subreg-fail.mir b/llvm/test/CodeGen/X86/subreg-fail.mir
index 7e91bbf350866..ba6fd90cf811d 100644
--- a/llvm/test/CodeGen/X86/subreg-fail.mir
+++ b/llvm/test/CodeGen/X86/subreg-fail.mir
@@ -3,6 +3,10 @@
# RUN: -verify-coalescing -enable-subreg-liveness=true \
# RUN: --run-pass=register-coalescer -o - | FileCheck %s
+# Check that the register coalescer correctly handles merging live ranges over
+# SUBREG_TO_REG on X86. The -verify-coalescing option will give an error if
+# this is incorrect.
+
---
name: test1
alignment: 16
>From eb1114803fe42498f308805cb83a33164a175074 Mon Sep 17 00:00:00 2001
From: Stefan Pintilie <stefanp at ca.ibm.com>
Date: Thu, 6 Jun 2024 10:07:00 -0500
Subject: [PATCH 04/10] [WIP][PowerPC] Add phony subregisters to cover the high
half of the VSX registers.
On PowerPC we have VSX registers which overlap with floating point registers.
However, the floating point registers only overlap with half of each VSX
register while the other half is never used alone. This patch adds phony
registers for the other half of the VSX registers in order to fully cover them
and to make sure that the lane masks are not the same for the VSX and the
floating point register.
Note: This patch is still Work in Progress as there are a number of LIT
failures that need to be investigated.
---
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 86 ++++++++++++++++++-
llvm/lib/Target/PowerPC/PPCRegisterInfo.td | 31 +++++--
llvm/test/CodeGen/PowerPC/frem.ll | 5 --
.../test/CodeGen/PowerPC/subreg-lanemasks.mir | 23 +++--
4 files changed, 117 insertions(+), 28 deletions(-)
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 9e8da59615dfb..a2d089f32cabf 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -435,7 +435,91 @@ BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
}
}
- assert(checkAllSuperRegsMarked(Reserved));
+ // Mark phony regsiters for the VSR high bits as reserved so that they are
+ // not used.
+ Reserved.set(PPC::FH0);
+ Reserved.set(PPC::FH1);
+ Reserved.set(PPC::FH2);
+ Reserved.set(PPC::FH3);
+ Reserved.set(PPC::FH4);
+ Reserved.set(PPC::FH5);
+ Reserved.set(PPC::FH6);
+ Reserved.set(PPC::FH7);
+ Reserved.set(PPC::FH8);
+ Reserved.set(PPC::FH9);
+ Reserved.set(PPC::FH10);
+ Reserved.set(PPC::FH11);
+ Reserved.set(PPC::FH12);
+ Reserved.set(PPC::FH13);
+ Reserved.set(PPC::FH14);
+ Reserved.set(PPC::FH15);
+ Reserved.set(PPC::FH16);
+ Reserved.set(PPC::FH17);
+ Reserved.set(PPC::FH18);
+ Reserved.set(PPC::FH19);
+ Reserved.set(PPC::FH20);
+ Reserved.set(PPC::FH21);
+ Reserved.set(PPC::FH22);
+ Reserved.set(PPC::FH23);
+ Reserved.set(PPC::FH24);
+ Reserved.set(PPC::FH25);
+ Reserved.set(PPC::FH26);
+ Reserved.set(PPC::FH27);
+ Reserved.set(PPC::FH28);
+ Reserved.set(PPC::FH29);
+ Reserved.set(PPC::FH30);
+ Reserved.set(PPC::FH31);
+
+ Reserved.set(PPC::VFH0);
+ Reserved.set(PPC::VFH1);
+ Reserved.set(PPC::VFH2);
+ Reserved.set(PPC::VFH3);
+ Reserved.set(PPC::VFH4);
+ Reserved.set(PPC::VFH5);
+ Reserved.set(PPC::VFH6);
+ Reserved.set(PPC::VFH7);
+ Reserved.set(PPC::VFH8);
+ Reserved.set(PPC::VFH9);
+ Reserved.set(PPC::VFH10);
+ Reserved.set(PPC::VFH11);
+ Reserved.set(PPC::VFH12);
+ Reserved.set(PPC::VFH13);
+ Reserved.set(PPC::VFH14);
+ Reserved.set(PPC::VFH15);
+ Reserved.set(PPC::VFH16);
+ Reserved.set(PPC::VFH17);
+ Reserved.set(PPC::VFH18);
+ Reserved.set(PPC::VFH19);
+ Reserved.set(PPC::VFH20);
+ Reserved.set(PPC::VFH21);
+ Reserved.set(PPC::VFH22);
+ Reserved.set(PPC::VFH23);
+ Reserved.set(PPC::VFH24);
+ Reserved.set(PPC::VFH25);
+ Reserved.set(PPC::VFH26);
+ Reserved.set(PPC::VFH27);
+ Reserved.set(PPC::VFH28);
+ Reserved.set(PPC::VFH29);
+ Reserved.set(PPC::VFH30);
+ Reserved.set(PPC::VFH31);
+
+ assert(checkAllSuperRegsMarked(Reserved,
+ {PPC::FH0, PPC::FH1, PPC::FH2, PPC::FH3,
+ PPC::FH4, PPC::FH5, PPC::FH6, PPC::FH7,
+ PPC::FH8, PPC::FH9, PPC::FH10, PPC::FH11,
+ PPC::FH12, PPC::FH13, PPC::FH14, PPC::FH15,
+ PPC::FH16, PPC::FH17, PPC::FH18, PPC::FH19,
+ PPC::FH20, PPC::FH21, PPC::FH22, PPC::FH23,
+ PPC::FH24, PPC::FH25, PPC::FH26, PPC::FH27,
+ PPC::FH28, PPC::FH29, PPC::FH30, PPC::FH31,
+ PPC::VFH0, PPC::VFH1, PPC::VFH2, PPC::VFH3,
+ PPC::VFH4, PPC::VFH5, PPC::VFH6, PPC::VFH7,
+ PPC::VFH8, PPC::VFH9, PPC::VFH10, PPC::VFH11,
+ PPC::VFH12, PPC::VFH13, PPC::VFH14, PPC::VFH15,
+ PPC::VFH16, PPC::VFH17, PPC::VFH18, PPC::VFH19,
+ PPC::VFH20, PPC::VFH21, PPC::VFH22, PPC::VFH23,
+ PPC::VFH24, PPC::VFH25, PPC::VFH26, PPC::VFH27,
+ PPC::VFH28, PPC::VFH29, PPC::VFH30, PPC::VFH31}));
return Reserved;
}
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.td b/llvm/lib/Target/PowerPC/PPCRegisterInfo.td
index fdbdc14736c86..2fe7d284897d9 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.td
@@ -17,6 +17,7 @@ def sub_un : SubRegIndex<1, 3>;
def sub_32 : SubRegIndex<32>;
def sub_32_hi_phony : SubRegIndex<32,32>;
def sub_64 : SubRegIndex<64>;
+def sub_64_hi_phony : SubRegIndex<64,64>;
def sub_vsx0 : SubRegIndex<128>;
def sub_vsx1 : SubRegIndex<128, 128>;
def sub_gp8_x0 : SubRegIndex<64>;
@@ -77,19 +78,19 @@ class VF<bits<5> num, string n> : PPCReg<n> {
}
// VR - One of the 32 128-bit vector registers
-class VR<VF SubReg, string n> : PPCReg<n> {
+class VR<VF SubReg, VF SubRegH, string n> : PPCReg<n> {
let HWEncoding{4-0} = SubReg.HWEncoding{4-0};
let HWEncoding{5} = 0;
- let SubRegs = [SubReg];
- let SubRegIndices = [sub_64];
+ let SubRegs = [SubReg, SubRegH];
+ let SubRegIndices = [sub_64, sub_64_hi_phony];
}
// VSRL - One of the 32 128-bit VSX registers that overlap with the scalar
// floating-point registers.
-class VSRL<FPR SubReg, string n> : PPCReg<n> {
+class VSRL<FPR SubReg, FPR SubRegH, string n> : PPCReg<n> {
let HWEncoding = SubReg.HWEncoding;
- let SubRegs = [SubReg];
- let SubRegIndices = [sub_64];
+ let SubRegs = [SubReg, SubRegH];
+ let SubRegIndices = [sub_64, sub_64_hi_phony];
}
// VSXReg - One of the VSX registers in the range vs32-vs63 with numbering
@@ -155,6 +156,12 @@ foreach Index = 0-31 in {
DwarfRegNum<[!add(Index, 32), !add(Index, 32)]>;
}
+let isArtificial = 1 in {
+ foreach Index = 0-31 in {
+ def FH#Index : FPR<-1, "">;
+ }
+}
+
// Floating-point pair registers
foreach Index = { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30 } in {
def Fpair#Index : FPPair<"fp"#Index, Index>;
@@ -168,15 +175,21 @@ foreach Index = 0-31 in {
DwarfRegNum<[!add(Index, 77), !add(Index, 77)]>;
}
+let isArtificial = 1 in {
+ foreach Index = 0-31 in {
+ def VFH#Index : VF<-1, "">;
+ }
+}
+
// Vector registers
foreach Index = 0-31 in {
- def V#Index : VR<!cast<VF>("VF"#Index), "v"#Index>,
- DwarfRegNum<[!add(Index, 77), !add(Index, 77)]>;
+ def V#Index : VR<!cast<VF>("VF"#Index), !cast<VF>("VFH"#Index), "v"#Index>,
+ DwarfRegNum<[!add(Index, 77)]>;
}
// VSX registers
foreach Index = 0-31 in {
- def VSL#Index : VSRL<!cast<FPR>("F"#Index), "vs"#Index>,
+ def VSL#Index : VSRL<!cast<FPR>("F"#Index), !cast<FPR>("FH"#Index), "vs"#Index>,
DwarfRegAlias<!cast<FPR>("F"#Index)>;
}
diff --git a/llvm/test/CodeGen/PowerPC/frem.ll b/llvm/test/CodeGen/PowerPC/frem.ll
index 8cb68e60f7f9b..19b4b1c9cdf95 100644
--- a/llvm/test/CodeGen/PowerPC/frem.ll
+++ b/llvm/test/CodeGen/PowerPC/frem.ll
@@ -70,7 +70,6 @@ define <4 x float> @frem4x32(<4 x float> %a, <4 x float> %b) {
; CHECK-NEXT: xscvspdpn 2, 0
; CHECK-NEXT: bl fmodf
; CHECK-NEXT: nop
-; CHECK-NEXT: # kill: def $f1 killed $f1 def $vsl1
; CHECK-NEXT: xxmrghd 0, 1, 61
; CHECK-NEXT: xscvspdpn 1, 62
; CHECK-NEXT: xscvspdpn 2, 63
@@ -84,7 +83,6 @@ define <4 x float> @frem4x32(<4 x float> %a, <4 x float> %b) {
; CHECK-NEXT: xscvspdpn 2, 0
; CHECK-NEXT: bl fmodf
; CHECK-NEXT: nop
-; CHECK-NEXT: # kill: def $f1 killed $f1 def $vsl1
; CHECK-NEXT: xxmrghd 0, 61, 1
; CHECK-NEXT: lxv 63, 80(1) # 16-byte Folded Reload
; CHECK-NEXT: lxv 62, 64(1) # 16-byte Folded Reload
@@ -124,11 +122,8 @@ define <2 x double> @frem2x64(<2 x double> %a, <2 x double> %b) {
; CHECK-NEXT: xscpsgndp 61, 1, 1
; CHECK-NEXT: xxswapd 1, 62
; CHECK-NEXT: xxswapd 2, 63
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; CHECK-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; CHECK-NEXT: bl fmod
; CHECK-NEXT: nop
-; CHECK-NEXT: # kill: def $f1 killed $f1 def $vsl1
; CHECK-NEXT: xxmrghd 34, 61, 1
; CHECK-NEXT: lxv 63, 64(1) # 16-byte Folded Reload
; CHECK-NEXT: lxv 62, 48(1) # 16-byte Folded Reload
diff --git a/llvm/test/CodeGen/PowerPC/subreg-lanemasks.mir b/llvm/test/CodeGen/PowerPC/subreg-lanemasks.mir
index e1fd6180b2662..cf69d3ad09878 100644
--- a/llvm/test/CodeGen/PowerPC/subreg-lanemasks.mir
+++ b/llvm/test/CodeGen/PowerPC/subreg-lanemasks.mir
@@ -5,21 +5,18 @@
# Keep track of all of the lanemasks for various subregsiters.
#
-# TODO: The mask for %6.sub_vsx1:accrc is the same as the mask for %10.sub_vsx1_then_sub_64:accrc.
-# Ideally on PowerPC these masks should be different. To be addressed in a later patch.
-#
-# CHECK: %3 [80r,80d:0) 0 at 80r L0000000000000004 [80r,80d:0) 0 at 80r weight:0.000000e+00
-# CHECK: %4 [96r,96d:0) 0 at 96r L0000000000000800 [96r,96d:0) 0 at 96r weight:0.000000e+00
-# CHECK: %5 [112r,112d:0) 0 at 112r L0000000000000004 [112r,112d:0) 0 at 112r weight:0.000000e+00
-# CHECK: %6 [128r,128d:0) 0 at 128r L0000000000000800 [128r,128d:0) 0 at 128r weight:0.000000e+00
+# CHECK: %3 [80r,80d:0) 0 at 80r L000000000000000C [80r,80d:0) 0 at 80r weight:0.000000e+00
+# CHECK: %4 [96r,96d:0) 0 at 96r L0000000000003000 [96r,96d:0) 0 at 96r weight:0.000000e+00
+# CHECK: %5 [112r,112d:0) 0 at 112r L000000000000000C [112r,112d:0) 0 at 112r weight:0.000000e+00
+# CHECK: %6 [128r,128d:0) 0 at 128r L0000000000003000 [128r,128d:0) 0 at 128r weight:0.000000e+00
# CHECK: %7 [144r,144d:0) 0 at 144r L0000000000000004 [144r,144d:0) 0 at 144r weight:0.000000e+00
-# CHECK: %8 [160r,160d:0) 0 at 160r L0000000000000800 [160r,160d:0) 0 at 160r weight:0.000000e+00
+# CHECK: %8 [160r,160d:0) 0 at 160r L0000000000001000 [160r,160d:0) 0 at 160r weight:0.000000e+00
# CHECK: %9 [176r,176d:0) 0 at 176r L0000000000000004 [176r,176d:0) 0 at 176r weight:0.000000e+00
-# CHECK: %10 [192r,192d:0) 0 at 192r L0000000000000800 [192r,192d:0) 0 at 192r weight:0.000000e+00
-# CHECK: %11 [208r,208d:0) 0 at 208r L0000000000001000 [208r,208d:0) 0 at 208r weight:0.000000e+00
-# CHECK: %12 [224r,224d:0) 0 at 224r L0000000000002000 [224r,224d:0) 0 at 224r weight:0.000000e+00
-# CHECK: %13 [240r,240d:0) 0 at 240r L0000000000000804 [240r,240d:0) 0 at 240r weight:0.000000e+00
-# CHECK: %14 [256r,256d:0) 0 at 256r L0000000000003000 [256r,256d:0) 0 at 256r weight:0.000000e+00
+# CHECK: %10 [192r,192d:0) 0 at 192r L0000000000001000 [192r,192d:0) 0 at 192r weight:0.000000e+00
+# CHECK: %11 [208r,208d:0) 0 at 208r L0000000000004000 [208r,208d:0) 0 at 208r weight:0.000000e+00
+# CHECK: %12 [224r,224d:0) 0 at 224r L0000000000010000 [224r,224d:0) 0 at 224r weight:0.000000e+00
+# CHECK: %13 [240r,240d:0) 0 at 240r L000000000000300C [240r,240d:0) 0 at 240r weight:0.000000e+00
+# CHECK: %14 [256r,256d:0) 0 at 256r L000000000003C000 [256r,256d:0) 0 at 256r weight:0.000000e+00
# CHECK: 0B bb.0
>From 741a46840b81ffbe9fee5dad3b9017ffa1d4966b Mon Sep 17 00:00:00 2001
From: Stefan Pintilie <stefanp at ca.ibm.com>
Date: Wed, 12 Jun 2024 14:09:59 -0500
Subject: [PATCH 05/10] Add fix for RegisterCoalescer
---
llvm/lib/Target/PowerPC/PPCRegisterInfo.td | 2 ++
llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll | 4 ----
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.td b/llvm/lib/Target/PowerPC/PPCRegisterInfo.td
index 2fe7d284897d9..c23936d7b7d42 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.td
@@ -181,6 +181,7 @@ let isArtificial = 1 in {
}
}
+let CoveredBySubRegs = 1 in {
// Vector registers
foreach Index = 0-31 in {
def V#Index : VR<!cast<VF>("VF"#Index), !cast<VF>("VFH"#Index), "v"#Index>,
@@ -192,6 +193,7 @@ foreach Index = 0-31 in {
def VSL#Index : VSRL<!cast<FPR>("F"#Index), !cast<FPR>("FH"#Index), "vs"#Index>,
DwarfRegAlias<!cast<FPR>("F"#Index)>;
}
+}
// Dummy VSX registers, this defines string: "vs32"-"vs63", and is only used for
// asm printing.
diff --git a/llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll b/llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
index aae23265710ce..afc7a39e18dc8 100644
--- a/llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
@@ -750,25 +750,21 @@ entry:
define <2 x double> @testDoubleImm1(<2 x double> %a, double %b) {
; CHECK-64-LABEL: testDoubleImm1:
; CHECK-64: # %bb.0: # %entry
-; CHECK-64-NEXT: # kill: def $f1 killed $f1 def $vsl1
; CHECK-64-NEXT: xxpermdi 34, 1, 34, 1
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: testDoubleImm1:
; CHECK-32: # %bb.0: # %entry
-; CHECK-32-NEXT: # kill: def $f1 killed $f1 def $vsl1
; CHECK-32-NEXT: xxpermdi 34, 1, 34, 1
; CHECK-32-NEXT: blr
;
; CHECK-64-P10-LABEL: testDoubleImm1:
; CHECK-64-P10: # %bb.0: # %entry
-; CHECK-64-P10-NEXT: # kill: def $f1 killed $f1 def $vsl1
; CHECK-64-P10-NEXT: xxpermdi 34, 1, 34, 1
; CHECK-64-P10-NEXT: blr
;
; CHECK-32-P10-LABEL: testDoubleImm1:
; CHECK-32-P10: # %bb.0: # %entry
-; CHECK-32-P10-NEXT: # kill: def $f1 killed $f1 def $vsl1
; CHECK-32-P10-NEXT: xxpermdi 34, 1, 34, 1
; CHECK-32-P10-NEXT: blr
entry:
>From 4c4bc40c17dbde58b70e48c9a5daf31b1b73fb81 Mon Sep 17 00:00:00 2001
From: Stefan Pintilie <stefanp at ca.ibm.com>
Date: Thu, 13 Jun 2024 11:09:02 -0500
Subject: [PATCH 06/10] Added the register class for the phony registers. Also
updated a number of tests.
---
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 87 +----
llvm/lib/Target/PowerPC/PPCRegisterInfo.td | 12 +-
.../aix32-p8-scalar_vector_conversions.ll | 2 -
.../CodeGen/PowerPC/build-vector-tests.ll | 96 ------
.../builtins-ppc-xlcompat-pwr9-64bit.ll | 1 -
.../PowerPC/canonical-merge-shuffles.ll | 6 -
llvm/test/CodeGen/PowerPC/combine-fneg.ll | 1 -
llvm/test/CodeGen/PowerPC/constant-pool.ll | 8 -
llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll | 3 -
llvm/test/CodeGen/PowerPC/fma-combine.ll | 2 -
llvm/test/CodeGen/PowerPC/fp-strict-round.ll | 8 -
.../PowerPC/handle-f16-storage-type.ll | 13 +-
.../vector-constrained-fp-intrinsics.ll | 304 ------------------
llvm/test/CodeGen/PowerPC/vsx.ll | 4 -
14 files changed, 10 insertions(+), 537 deletions(-)
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
index a2d089f32cabf..7ed63bc325219 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -434,92 +434,7 @@ BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
}
}
}
-
- // Mark phony regsiters for the VSR high bits as reserved so that they are
- // not used.
- Reserved.set(PPC::FH0);
- Reserved.set(PPC::FH1);
- Reserved.set(PPC::FH2);
- Reserved.set(PPC::FH3);
- Reserved.set(PPC::FH4);
- Reserved.set(PPC::FH5);
- Reserved.set(PPC::FH6);
- Reserved.set(PPC::FH7);
- Reserved.set(PPC::FH8);
- Reserved.set(PPC::FH9);
- Reserved.set(PPC::FH10);
- Reserved.set(PPC::FH11);
- Reserved.set(PPC::FH12);
- Reserved.set(PPC::FH13);
- Reserved.set(PPC::FH14);
- Reserved.set(PPC::FH15);
- Reserved.set(PPC::FH16);
- Reserved.set(PPC::FH17);
- Reserved.set(PPC::FH18);
- Reserved.set(PPC::FH19);
- Reserved.set(PPC::FH20);
- Reserved.set(PPC::FH21);
- Reserved.set(PPC::FH22);
- Reserved.set(PPC::FH23);
- Reserved.set(PPC::FH24);
- Reserved.set(PPC::FH25);
- Reserved.set(PPC::FH26);
- Reserved.set(PPC::FH27);
- Reserved.set(PPC::FH28);
- Reserved.set(PPC::FH29);
- Reserved.set(PPC::FH30);
- Reserved.set(PPC::FH31);
-
- Reserved.set(PPC::VFH0);
- Reserved.set(PPC::VFH1);
- Reserved.set(PPC::VFH2);
- Reserved.set(PPC::VFH3);
- Reserved.set(PPC::VFH4);
- Reserved.set(PPC::VFH5);
- Reserved.set(PPC::VFH6);
- Reserved.set(PPC::VFH7);
- Reserved.set(PPC::VFH8);
- Reserved.set(PPC::VFH9);
- Reserved.set(PPC::VFH10);
- Reserved.set(PPC::VFH11);
- Reserved.set(PPC::VFH12);
- Reserved.set(PPC::VFH13);
- Reserved.set(PPC::VFH14);
- Reserved.set(PPC::VFH15);
- Reserved.set(PPC::VFH16);
- Reserved.set(PPC::VFH17);
- Reserved.set(PPC::VFH18);
- Reserved.set(PPC::VFH19);
- Reserved.set(PPC::VFH20);
- Reserved.set(PPC::VFH21);
- Reserved.set(PPC::VFH22);
- Reserved.set(PPC::VFH23);
- Reserved.set(PPC::VFH24);
- Reserved.set(PPC::VFH25);
- Reserved.set(PPC::VFH26);
- Reserved.set(PPC::VFH27);
- Reserved.set(PPC::VFH28);
- Reserved.set(PPC::VFH29);
- Reserved.set(PPC::VFH30);
- Reserved.set(PPC::VFH31);
-
- assert(checkAllSuperRegsMarked(Reserved,
- {PPC::FH0, PPC::FH1, PPC::FH2, PPC::FH3,
- PPC::FH4, PPC::FH5, PPC::FH6, PPC::FH7,
- PPC::FH8, PPC::FH9, PPC::FH10, PPC::FH11,
- PPC::FH12, PPC::FH13, PPC::FH14, PPC::FH15,
- PPC::FH16, PPC::FH17, PPC::FH18, PPC::FH19,
- PPC::FH20, PPC::FH21, PPC::FH22, PPC::FH23,
- PPC::FH24, PPC::FH25, PPC::FH26, PPC::FH27,
- PPC::FH28, PPC::FH29, PPC::FH30, PPC::FH31,
- PPC::VFH0, PPC::VFH1, PPC::VFH2, PPC::VFH3,
- PPC::VFH4, PPC::VFH5, PPC::VFH6, PPC::VFH7,
- PPC::VFH8, PPC::VFH9, PPC::VFH10, PPC::VFH11,
- PPC::VFH12, PPC::VFH13, PPC::VFH14, PPC::VFH15,
- PPC::VFH16, PPC::VFH17, PPC::VFH18, PPC::VFH19,
- PPC::VFH20, PPC::VFH21, PPC::VFH22, PPC::VFH23,
- PPC::VFH24, PPC::VFH25, PPC::VFH26, PPC::VFH27,
- PPC::VFH28, PPC::VFH29, PPC::VFH30, PPC::VFH31}));
+ assert(checkAllSuperRegsMarked(Reserved));
return Reserved;
}
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.td b/llvm/lib/Target/PowerPC/PPCRegisterInfo.td
index c23936d7b7d42..5e979762e712f 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.td
@@ -159,9 +159,15 @@ foreach Index = 0-31 in {
let isArtificial = 1 in {
foreach Index = 0-31 in {
def FH#Index : FPR<-1, "">;
+ def VFH#Index : VF<-1, "">;
}
}
+let isAllocatable = 0, CopyCost = -1 in {
+ def VFHRC : RegisterClass<"PPC", [f64], 64, (sequence "VFH%u", 0, 31)>;
+ def FHRC : RegisterClass<"PPC", [f64], 64, (sequence "FH%u", 0, 31)>;
+}
+
// Floating-point pair registers
foreach Index = { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30 } in {
def Fpair#Index : FPPair<"fp"#Index, Index>;
@@ -175,12 +181,6 @@ foreach Index = 0-31 in {
DwarfRegNum<[!add(Index, 77), !add(Index, 77)]>;
}
-let isArtificial = 1 in {
- foreach Index = 0-31 in {
- def VFH#Index : VF<-1, "">;
- }
-}
-
let CoveredBySubRegs = 1 in {
// Vector registers
foreach Index = 0-31 in {
diff --git a/llvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll b/llvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll
index 19e298a633e0b..2f543da9b29a0 100644
--- a/llvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll
+++ b/llvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll
@@ -1099,7 +1099,6 @@ define double @getd1(<2 x double> %vd) {
; CHECK-LABEL: getd1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxswapd 1, 34
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: blr
entry:
%vecext = extractelement <2 x double> %vd, i32 1
@@ -1115,7 +1114,6 @@ define double @getveld(<2 x double> %vd, i32 signext %i) {
; CHECK-NEXT: lvsl 3, 0, 3
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: xxlor 1, 34, 34
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: blr
entry:
%vecext = extractelement <2 x double> %vd, i32 %i
diff --git a/llvm/test/CodeGen/PowerPC/build-vector-tests.ll b/llvm/test/CodeGen/PowerPC/build-vector-tests.ll
index f729018dd4106..91431ed15f6a7 100644
--- a/llvm/test/CodeGen/PowerPC/build-vector-tests.ll
+++ b/llvm/test/CodeGen/PowerPC/build-vector-tests.ll
@@ -1319,11 +1319,7 @@ entry:
define <4 x i32> @fromRegsConvftoi(float %a, float %b, float %c, float %d) {
; P9BE-LABEL: fromRegsConvftoi:
; P9BE: # %bb.0: # %entry
-; P9BE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; P9BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
; P9BE-NEXT: xxmrghd vs0, vs2, vs4
-; P9BE-NEXT: # kill: def $f3 killed $f3 def $vsl3
-; P9BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9BE-NEXT: xvcvdpsxws v2, vs0
; P9BE-NEXT: xxmrghd vs0, vs1, vs3
; P9BE-NEXT: xvcvdpsxws v3, vs0
@@ -1332,11 +1328,7 @@ define <4 x i32> @fromRegsConvftoi(float %a, float %b, float %c, float %d) {
;
; P9LE-LABEL: fromRegsConvftoi:
; P9LE: # %bb.0: # %entry
-; P9LE-NEXT: # kill: def $f3 killed $f3 def $vsl3
-; P9LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9LE-NEXT: xxmrghd vs0, vs3, vs1
-; P9LE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; P9LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
; P9LE-NEXT: xvcvdpsxws v2, vs0
; P9LE-NEXT: xxmrghd vs0, vs4, vs2
; P9LE-NEXT: xvcvdpsxws v3, vs0
@@ -1345,10 +1337,6 @@ define <4 x i32> @fromRegsConvftoi(float %a, float %b, float %c, float %d) {
;
; P8BE-LABEL: fromRegsConvftoi:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; P8BE-NEXT: # kill: def $f3 killed $f3 def $vsl3
-; P8BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P8BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8BE-NEXT: xxmrghd vs0, vs2, vs4
; P8BE-NEXT: xxmrghd vs1, vs1, vs3
; P8BE-NEXT: xvcvdpsxws v2, vs0
@@ -1358,10 +1346,6 @@ define <4 x i32> @fromRegsConvftoi(float %a, float %b, float %c, float %d) {
;
; P8LE-LABEL: fromRegsConvftoi:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; P8LE-NEXT: # kill: def $f3 killed $f3 def $vsl3
-; P8LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P8LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8LE-NEXT: xxmrghd vs0, vs3, vs1
; P8LE-NEXT: xxmrghd vs1, vs4, vs2
; P8LE-NEXT: xvcvdpsxws v2, vs0
@@ -1773,11 +1757,7 @@ entry:
define <4 x i32> @fromRegsConvdtoi(double %a, double %b, double %c, double %d) {
; P9BE-LABEL: fromRegsConvdtoi:
; P9BE: # %bb.0: # %entry
-; P9BE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; P9BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
; P9BE-NEXT: xxmrghd vs0, vs2, vs4
-; P9BE-NEXT: # kill: def $f3 killed $f3 def $vsl3
-; P9BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9BE-NEXT: xvcvdpsxws v2, vs0
; P9BE-NEXT: xxmrghd vs0, vs1, vs3
; P9BE-NEXT: xvcvdpsxws v3, vs0
@@ -1786,11 +1766,7 @@ define <4 x i32> @fromRegsConvdtoi(double %a, double %b, double %c, double %d) {
;
; P9LE-LABEL: fromRegsConvdtoi:
; P9LE: # %bb.0: # %entry
-; P9LE-NEXT: # kill: def $f3 killed $f3 def $vsl3
-; P9LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9LE-NEXT: xxmrghd vs0, vs3, vs1
-; P9LE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; P9LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
; P9LE-NEXT: xvcvdpsxws v2, vs0
; P9LE-NEXT: xxmrghd vs0, vs4, vs2
; P9LE-NEXT: xvcvdpsxws v3, vs0
@@ -1799,10 +1775,6 @@ define <4 x i32> @fromRegsConvdtoi(double %a, double %b, double %c, double %d) {
;
; P8BE-LABEL: fromRegsConvdtoi:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; P8BE-NEXT: # kill: def $f3 killed $f3 def $vsl3
-; P8BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P8BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8BE-NEXT: xxmrghd vs0, vs2, vs4
; P8BE-NEXT: xxmrghd vs1, vs1, vs3
; P8BE-NEXT: xvcvdpsxws v2, vs0
@@ -1812,10 +1784,6 @@ define <4 x i32> @fromRegsConvdtoi(double %a, double %b, double %c, double %d) {
;
; P8LE-LABEL: fromRegsConvdtoi:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; P8LE-NEXT: # kill: def $f3 killed $f3 def $vsl3
-; P8LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P8LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8LE-NEXT: xxmrghd vs0, vs3, vs1
; P8LE-NEXT: xxmrghd vs1, vs4, vs2
; P8LE-NEXT: xvcvdpsxws v2, vs0
@@ -2839,11 +2807,7 @@ entry:
define <4 x i32> @fromRegsConvftoui(float %a, float %b, float %c, float %d) {
; P9BE-LABEL: fromRegsConvftoui:
; P9BE: # %bb.0: # %entry
-; P9BE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; P9BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
; P9BE-NEXT: xxmrghd vs0, vs2, vs4
-; P9BE-NEXT: # kill: def $f3 killed $f3 def $vsl3
-; P9BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9BE-NEXT: xvcvdpuxws v2, vs0
; P9BE-NEXT: xxmrghd vs0, vs1, vs3
; P9BE-NEXT: xvcvdpuxws v3, vs0
@@ -2852,11 +2816,7 @@ define <4 x i32> @fromRegsConvftoui(float %a, float %b, float %c, float %d) {
;
; P9LE-LABEL: fromRegsConvftoui:
; P9LE: # %bb.0: # %entry
-; P9LE-NEXT: # kill: def $f3 killed $f3 def $vsl3
-; P9LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9LE-NEXT: xxmrghd vs0, vs3, vs1
-; P9LE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; P9LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
; P9LE-NEXT: xvcvdpuxws v2, vs0
; P9LE-NEXT: xxmrghd vs0, vs4, vs2
; P9LE-NEXT: xvcvdpuxws v3, vs0
@@ -2865,10 +2825,6 @@ define <4 x i32> @fromRegsConvftoui(float %a, float %b, float %c, float %d) {
;
; P8BE-LABEL: fromRegsConvftoui:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; P8BE-NEXT: # kill: def $f3 killed $f3 def $vsl3
-; P8BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P8BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8BE-NEXT: xxmrghd vs0, vs2, vs4
; P8BE-NEXT: xxmrghd vs1, vs1, vs3
; P8BE-NEXT: xvcvdpuxws v2, vs0
@@ -2878,10 +2834,6 @@ define <4 x i32> @fromRegsConvftoui(float %a, float %b, float %c, float %d) {
;
; P8LE-LABEL: fromRegsConvftoui:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; P8LE-NEXT: # kill: def $f3 killed $f3 def $vsl3
-; P8LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P8LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8LE-NEXT: xxmrghd vs0, vs3, vs1
; P8LE-NEXT: xxmrghd vs1, vs4, vs2
; P8LE-NEXT: xvcvdpuxws v2, vs0
@@ -3294,11 +3246,7 @@ entry:
define <4 x i32> @fromRegsConvdtoui(double %a, double %b, double %c, double %d) {
; P9BE-LABEL: fromRegsConvdtoui:
; P9BE: # %bb.0: # %entry
-; P9BE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; P9BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
; P9BE-NEXT: xxmrghd vs0, vs2, vs4
-; P9BE-NEXT: # kill: def $f3 killed $f3 def $vsl3
-; P9BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9BE-NEXT: xvcvdpuxws v2, vs0
; P9BE-NEXT: xxmrghd vs0, vs1, vs3
; P9BE-NEXT: xvcvdpuxws v3, vs0
@@ -3307,11 +3255,7 @@ define <4 x i32> @fromRegsConvdtoui(double %a, double %b, double %c, double %d)
;
; P9LE-LABEL: fromRegsConvdtoui:
; P9LE: # %bb.0: # %entry
-; P9LE-NEXT: # kill: def $f3 killed $f3 def $vsl3
-; P9LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9LE-NEXT: xxmrghd vs0, vs3, vs1
-; P9LE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; P9LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
; P9LE-NEXT: xvcvdpuxws v2, vs0
; P9LE-NEXT: xxmrghd vs0, vs4, vs2
; P9LE-NEXT: xvcvdpuxws v3, vs0
@@ -3320,10 +3264,6 @@ define <4 x i32> @fromRegsConvdtoui(double %a, double %b, double %c, double %d)
;
; P8BE-LABEL: fromRegsConvdtoui:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; P8BE-NEXT: # kill: def $f3 killed $f3 def $vsl3
-; P8BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P8BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8BE-NEXT: xxmrghd vs0, vs2, vs4
; P8BE-NEXT: xxmrghd vs1, vs1, vs3
; P8BE-NEXT: xvcvdpuxws v2, vs0
@@ -3333,10 +3273,6 @@ define <4 x i32> @fromRegsConvdtoui(double %a, double %b, double %c, double %d)
;
; P8LE-LABEL: fromRegsConvdtoui:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; P8LE-NEXT: # kill: def $f3 killed $f3 def $vsl3
-; P8LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P8LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8LE-NEXT: xxmrghd vs0, vs3, vs1
; P8LE-NEXT: xxmrghd vs1, vs4, vs2
; P8LE-NEXT: xvcvdpuxws v2, vs0
@@ -4269,32 +4205,24 @@ entry:
define <2 x i64> @fromRegsConvftoll(float %a, float %b) {
; P9BE-LABEL: fromRegsConvftoll:
; P9BE: # %bb.0: # %entry
-; P9BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P9BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9BE-NEXT: xxmrghd vs0, vs1, vs2
; P9BE-NEXT: xvcvdpsxds v2, vs0
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromRegsConvftoll:
; P9LE: # %bb.0: # %entry
-; P9LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P9LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9LE-NEXT: xxmrghd vs0, vs2, vs1
; P9LE-NEXT: xvcvdpsxds v2, vs0
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromRegsConvftoll:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P8BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8BE-NEXT: xxmrghd vs0, vs1, vs2
; P8BE-NEXT: xvcvdpsxds v2, vs0
; P8BE-NEXT: blr
;
; P8LE-LABEL: fromRegsConvftoll:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P8LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8LE-NEXT: xxmrghd vs0, vs2, vs1
; P8LE-NEXT: xvcvdpsxds v2, vs0
; P8LE-NEXT: blr
@@ -4630,32 +4558,24 @@ entry:
define <2 x i64> @fromRegsConvdtoll(double %a, double %b) {
; P9BE-LABEL: fromRegsConvdtoll:
; P9BE: # %bb.0: # %entry
-; P9BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P9BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9BE-NEXT: xxmrghd vs0, vs1, vs2
; P9BE-NEXT: xvcvdpsxds v2, vs0
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromRegsConvdtoll:
; P9LE: # %bb.0: # %entry
-; P9LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P9LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9LE-NEXT: xxmrghd vs0, vs2, vs1
; P9LE-NEXT: xvcvdpsxds v2, vs0
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromRegsConvdtoll:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P8BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8BE-NEXT: xxmrghd vs0, vs1, vs2
; P8BE-NEXT: xvcvdpsxds v2, vs0
; P8BE-NEXT: blr
;
; P8LE-LABEL: fromRegsConvdtoll:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P8LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8LE-NEXT: xxmrghd vs0, vs2, vs1
; P8LE-NEXT: xvcvdpsxds v2, vs0
; P8LE-NEXT: blr
@@ -5451,32 +5371,24 @@ entry:
define <2 x i64> @fromRegsConvftoull(float %a, float %b) {
; P9BE-LABEL: fromRegsConvftoull:
; P9BE: # %bb.0: # %entry
-; P9BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P9BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9BE-NEXT: xxmrghd vs0, vs1, vs2
; P9BE-NEXT: xvcvdpuxds v2, vs0
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromRegsConvftoull:
; P9LE: # %bb.0: # %entry
-; P9LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P9LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9LE-NEXT: xxmrghd vs0, vs2, vs1
; P9LE-NEXT: xvcvdpuxds v2, vs0
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromRegsConvftoull:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P8BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8BE-NEXT: xxmrghd vs0, vs1, vs2
; P8BE-NEXT: xvcvdpuxds v2, vs0
; P8BE-NEXT: blr
;
; P8LE-LABEL: fromRegsConvftoull:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P8LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8LE-NEXT: xxmrghd vs0, vs2, vs1
; P8LE-NEXT: xvcvdpuxds v2, vs0
; P8LE-NEXT: blr
@@ -5812,32 +5724,24 @@ entry:
define <2 x i64> @fromRegsConvdtoull(double %a, double %b) {
; P9BE-LABEL: fromRegsConvdtoull:
; P9BE: # %bb.0: # %entry
-; P9BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P9BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9BE-NEXT: xxmrghd vs0, vs1, vs2
; P9BE-NEXT: xvcvdpuxds v2, vs0
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromRegsConvdtoull:
; P9LE: # %bb.0: # %entry
-; P9LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P9LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9LE-NEXT: xxmrghd vs0, vs2, vs1
; P9LE-NEXT: xvcvdpuxds v2, vs0
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromRegsConvdtoull:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P8BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8BE-NEXT: xxmrghd vs0, vs1, vs2
; P8BE-NEXT: xvcvdpuxds v2, vs0
; P8BE-NEXT: blr
;
; P8LE-LABEL: fromRegsConvdtoull:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; P8LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8LE-NEXT: xxmrghd vs0, vs2, vs1
; P8LE-NEXT: xvcvdpuxds v2, vs0
; P8LE-NEXT: blr
diff --git a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-pwr9-64bit.ll b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-pwr9-64bit.ll
index 7aa8b0e7e8327..798c23cd6b961 100644
--- a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-pwr9-64bit.ll
+++ b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-pwr9-64bit.ll
@@ -22,7 +22,6 @@ define dso_local double @insert_exp(double %d, i64 %ull) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mffprd 3, 1
; CHECK-NEXT: xsiexpdp 1, 3, 4
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: blr
entry:
%0 = tail call double @llvm.ppc.insert.exp(double %d, i64 %ull)
diff --git a/llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll b/llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
index f2bd4c7f40a46..c26f98c5b0495 100644
--- a/llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
+++ b/llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
@@ -565,7 +565,6 @@ define dso_local void @no_crash_elt0_from_RHS(ptr noalias nocapture dereferencea
; CHECK-P8-NEXT: bl dummy
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: xxlxor f0, f0, f0
-; CHECK-P8-NEXT: # kill: def $f1 killed $f1 def $vsl1
; CHECK-P8-NEXT: xxmrghd vs0, vs1, vs0
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: stxvd2x vs0, 0, r30
@@ -580,7 +579,6 @@ define dso_local void @no_crash_elt0_from_RHS(ptr noalias nocapture dereferencea
; CHECK-P9-NEXT: bl dummy
; CHECK-P9-NEXT: nop
; CHECK-P9-NEXT: xxlxor f0, f0, f0
-; CHECK-P9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; CHECK-P9-NEXT: xxmrghd vs0, vs1, vs0
; CHECK-P9-NEXT: stxv vs0, 0(r30)
;
@@ -594,7 +592,6 @@ define dso_local void @no_crash_elt0_from_RHS(ptr noalias nocapture dereferencea
; CHECK-P9-BE-NEXT: bl dummy
; CHECK-P9-BE-NEXT: nop
; CHECK-P9-BE-NEXT: xxlxor f0, f0, f0
-; CHECK-P9-BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; CHECK-P9-BE-NEXT: xxmrghd vs0, vs0, vs1
; CHECK-P9-BE-NEXT: stxv vs0, 0(r30)
;
@@ -621,7 +618,6 @@ define dso_local void @no_crash_elt0_from_RHS(ptr noalias nocapture dereferencea
; CHECK-P7-NEXT: bl dummy
; CHECK-P7-NEXT: nop
; CHECK-P7-NEXT: xxlxor f0, f0, f0
-; CHECK-P7-NEXT: # kill: def $f1 killed $f1 def $vsl1
; CHECK-P7-NEXT: xxmrghd vs0, vs1, vs0
; CHECK-P7-NEXT: xxswapd vs0, vs0
; CHECK-P7-NEXT: stxvd2x vs0, 0, r30
@@ -636,7 +632,6 @@ define dso_local void @no_crash_elt0_from_RHS(ptr noalias nocapture dereferencea
; P8-AIX-64-NEXT: bl .dummy[PR]
; P8-AIX-64-NEXT: nop
; P8-AIX-64-NEXT: xxlxor f0, f0, f0
-; P8-AIX-64-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8-AIX-64-NEXT: xxmrghd vs0, vs0, vs1
; P8-AIX-64-NEXT: stxvd2x vs0, 0, r31
;
@@ -650,7 +645,6 @@ define dso_local void @no_crash_elt0_from_RHS(ptr noalias nocapture dereferencea
; P8-AIX-32-NEXT: bl .dummy[PR]
; P8-AIX-32-NEXT: nop
; P8-AIX-32-NEXT: xxlxor f0, f0, f0
-; P8-AIX-32-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8-AIX-32-NEXT: xxmrghd vs0, vs0, vs1
; P8-AIX-32-NEXT: stxvd2x vs0, 0, r31
test_entry:
diff --git a/llvm/test/CodeGen/PowerPC/combine-fneg.ll b/llvm/test/CodeGen/PowerPC/combine-fneg.ll
index a72abf7007e8d..04af0947c7a33 100644
--- a/llvm/test/CodeGen/PowerPC/combine-fneg.ll
+++ b/llvm/test/CodeGen/PowerPC/combine-fneg.ll
@@ -6,7 +6,6 @@ define <4 x double> @fneg_fdiv_splat(double %a0, <4 x double> %a1) {
; CHECK-LABEL: fneg_fdiv_splat:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI0_0 at toc@ha
-; CHECK-NEXT: # kill: def $f1 killed $f1 def $vsl1
; CHECK-NEXT: xxspltd 0, 1, 0
; CHECK-NEXT: addi 3, 3, .LCPI0_0 at toc@l
; CHECK-NEXT: xvredp 1, 0
diff --git a/llvm/test/CodeGen/PowerPC/constant-pool.ll b/llvm/test/CodeGen/PowerPC/constant-pool.ll
index a9feb93627b06..2ded7215d8fd6 100644
--- a/llvm/test/CodeGen/PowerPC/constant-pool.ll
+++ b/llvm/test/CodeGen/PowerPC/constant-pool.ll
@@ -11,7 +11,6 @@
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxsplti32dx vs1, 0, 940572664
; CHECK-NEXT: xxsplti32dx vs1, 1, 1073741824
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: blr
;
; CHECK-P9-LABEL: FloatConstantPool:
@@ -28,7 +27,6 @@ entry:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxsplti32dx vs1, 0, 1048574
; CHECK-NEXT: xxsplti32dx vs1, 1, 780229072
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: blr
;
; CHECK-P9-LABEL: DoubleConstantPool:
@@ -47,8 +45,6 @@ entry:
; CHECK-NEXT: xxsplti32dx vs2, 0, -2146625897
; CHECK-NEXT: xxsplti32dx vs1, 1, -609716532
; CHECK-NEXT: xxsplti32dx vs2, 1, 1339675259
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; CHECK-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; CHECK-NEXT: blr
;
; CHECK-P9-LABEL: LongDoubleConstantPool:
@@ -224,13 +220,11 @@ define double @two_constants_two_bb(i32 %m, double %a) {
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: xxsplti32dx vs1, 0, 1074935889
; CHECK-NEXT: xxsplti32dx vs1, 1, -343597384
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: blr
; CHECK-NEXT: .LBB12_2: # %if.end
; CHECK-NEXT: xxsplti32dx vs0, 0, 1076085391
; CHECK-NEXT: xxsplti32dx vs0, 1, 1546188227
; CHECK-NEXT: xsadddp f1, f1, f0
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: blr
;
; CHECK-P9-LABEL: two_constants_two_bb:
@@ -369,12 +363,10 @@ define ppc_fp128 @three_constants_ppcf128(ppc_fp128 %a, ppc_fp128 %c) {
; CHECK-NEXT: stxv vs63, 32(r1) # 16-byte Folded Spill
; CHECK-NEXT: xxsplti32dx vs63, 0, 1074935889
; CHECK-NEXT: xxsplti32dx vs3, 1, -343597384
-; CHECK-NEXT: # kill: def $f3 killed $f3 killed $vsl3
; CHECK-NEXT: bl __gcc_qadd at notoc
; CHECK-NEXT: xxsplti32dx vs3, 0, 1074935889
; CHECK-NEXT: xxlxor f4, f4, f4
; CHECK-NEXT: xxsplti32dx vs3, 1, -1719329096
-; CHECK-NEXT: # kill: def $f3 killed $f3 killed $vsl3
; CHECK-NEXT: bl __gcc_qadd at notoc
; CHECK-NEXT: xxsplti32dx vs63, 1, 8724152
; CHECK-NEXT: xxlxor f4, f4, f4
diff --git a/llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll b/llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll
index fc0bfef11d7a6..5027f42eb8c13 100644
--- a/llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll
+++ b/llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll
@@ -407,7 +407,6 @@ define void @call_test_byval_mem32_2() #0 {
; CHECK-NEXT: vspltisw 2, 1
; CHECK-NEXT: ld 3, .LC5 at toc@l(3)
; CHECK-NEXT: xvcvsxwdp 1, 34
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: ld 7, 24(3)
; CHECK-NEXT: ld 6, 16(3)
; CHECK-NEXT: ld 5, 8(3)
@@ -453,9 +452,7 @@ define void @call_test_byval_mem32_3() #0 {
; CHECK-NEXT: li 7, 2
; CHECK-NEXT: ld 3, .LC5 at toc@l(3)
; CHECK-NEXT: xvcvsxwdp 1, 34
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: xvcvsxwdp 2, 35
-; CHECK-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; CHECK-NEXT: lxvd2x 0, 3, 4
; CHECK-NEXT: li 4, 88
; CHECK-NEXT: stxvd2x 0, 1, 4
diff --git a/llvm/test/CodeGen/PowerPC/fma-combine.ll b/llvm/test/CodeGen/PowerPC/fma-combine.ll
index b39c9327bc8ab..3d45e9a3a509c 100644
--- a/llvm/test/CodeGen/PowerPC/fma-combine.ll
+++ b/llvm/test/CodeGen/PowerPC/fma-combine.ll
@@ -202,7 +202,6 @@ define dso_local double @getNegatedExpression_crash(double %x, double %y) {
; CHECK-FAST-NEXT: xvcvsxwdp 4, 34
; CHECK-FAST-NEXT: lfs 3, .LCPI5_0 at toc@l(3)
; CHECK-FAST-NEXT: xssubdp 0, 1, 4
-; CHECK-FAST-NEXT: # kill: def $f4 killed $f4 killed $vsl4
; CHECK-FAST-NEXT: xsmaddadp 4, 1, 3
; CHECK-FAST-NEXT: xsmaddadp 0, 4, 2
; CHECK-FAST-NEXT: fmr 1, 0
@@ -226,7 +225,6 @@ define dso_local double @getNegatedExpression_crash(double %x, double %y) {
; CHECK-NEXT: xvcvsxwdp 4, 34
; CHECK-NEXT: lfs 3, .LCPI5_0 at toc@l(3)
; CHECK-NEXT: xssubdp 0, 1, 4
-; CHECK-NEXT: # kill: def $f4 killed $f4 killed $vsl4
; CHECK-NEXT: xsmaddadp 4, 1, 3
; CHECK-NEXT: xsmaddadp 0, 4, 2
; CHECK-NEXT: fmr 1, 0
diff --git a/llvm/test/CodeGen/PowerPC/fp-strict-round.ll b/llvm/test/CodeGen/PowerPC/fp-strict-round.ll
index 4c8729b9f43a5..eac4fb6f98bf7 100644
--- a/llvm/test/CodeGen/PowerPC/fp-strict-round.ll
+++ b/llvm/test/CodeGen/PowerPC/fp-strict-round.ll
@@ -229,7 +229,6 @@ define <4 x float> @nearbyint_v4f32(<4 x float> %vf1, <4 x float> %vf2) strictfp
; P8-NEXT: xscvspdpn f1, vs0
; P8-NEXT: bl nearbyintf
; P8-NEXT: nop
-; P8-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8-NEXT: xxmrghd vs0, vs1, v30
; P8-NEXT: xscvspdpn f1, v31
; P8-NEXT: xvcvdpsp v29, vs0
@@ -240,7 +239,6 @@ define <4 x float> @nearbyint_v4f32(<4 x float> %vf1, <4 x float> %vf2) strictfp
; P8-NEXT: xscvspdpn f1, vs0
; P8-NEXT: bl nearbyintf
; P8-NEXT: nop
-; P8-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8-NEXT: xxmrghd vs0, v30, vs1
; P8-NEXT: li r3, 160
; P8-NEXT: xvcvdpsp v2, vs0
@@ -278,7 +276,6 @@ define <4 x float> @nearbyint_v4f32(<4 x float> %vf1, <4 x float> %vf2) strictfp
; P9-NEXT: xscvspdpn f1, vs0
; P9-NEXT: bl nearbyintf
; P9-NEXT: nop
-; P9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9-NEXT: xxmrghd vs0, vs1, v30
; P9-NEXT: xscvspdpn f1, v31
; P9-NEXT: xvcvdpsp v29, vs0
@@ -289,7 +286,6 @@ define <4 x float> @nearbyint_v4f32(<4 x float> %vf1, <4 x float> %vf2) strictfp
; P9-NEXT: xscvspdpn f1, vs0
; P9-NEXT: bl nearbyintf
; P9-NEXT: nop
-; P9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9-NEXT: xxmrghd vs0, v30, vs1
; P9-NEXT: lxv v31, 64(r1) # 16-byte Folded Reload
; P9-NEXT: lxv v30, 48(r1) # 16-byte Folded Reload
@@ -327,11 +323,9 @@ define <2 x double> @nearbyint_v2f64(<2 x double> %vf1, <2 x double> %vf2) stric
; P8-NEXT: nop
; P8-NEXT: xxlor v30, f1, f1
; P8-NEXT: xxswapd vs1, v31
-; P8-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; P8-NEXT: bl nearbyint
; P8-NEXT: nop
; P8-NEXT: li r3, 144
-; P8-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8-NEXT: xxmrghd v2, v30, vs1
; P8-NEXT: lxvd2x v31, r1, r3 # 16-byte Folded Reload
; P8-NEXT: li r3, 128
@@ -358,10 +352,8 @@ define <2 x double> @nearbyint_v2f64(<2 x double> %vf1, <2 x double> %vf2) stric
; P9-NEXT: nop
; P9-NEXT: xscpsgndp v30, f1, f1
; P9-NEXT: xxswapd vs1, v31
-; P9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; P9-NEXT: bl nearbyint
; P9-NEXT: nop
-; P9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P9-NEXT: xxmrghd v2, v30, vs1
; P9-NEXT: lxv v31, 48(r1) # 16-byte Folded Reload
; P9-NEXT: lxv v30, 32(r1) # 16-byte Folded Reload
diff --git a/llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll b/llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
index 13f70f420400b..4256933300243 100644
--- a/llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
+++ b/llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
@@ -666,7 +666,6 @@ define <4 x float> @test_extend32_vec4(ptr %p) #0 {
; P8-NEXT: bl __gnu_h2f_ieee
; P8-NEXT: nop
; P8-NEXT: li r3, 80
-; P8-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8-NEXT: xxmrghd vs0, vs61, vs1
; P8-NEXT: xxmrghd vs1, vs63, vs62
; P8-NEXT: ld r30, 96(r1) # 8-byte Folded Reload
@@ -776,7 +775,6 @@ define <4 x double> @test_extend64_vec4(ptr %p) #0 {
; P8-NEXT: nop
; P8-NEXT: li r3, 80
; P8-NEXT: xxmrghd vs35, vs63, vs62
-; P8-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8-NEXT: xxmrghd vs34, vs61, vs1
; P8-NEXT: ld r30, 96(r1) # 8-byte Folded Reload
; P8-NEXT: lxvd2x vs63, r1, r3 # 16-byte Folded Reload
@@ -1005,11 +1003,10 @@ define void @test_trunc64_vec4(<4 x double> %a, ptr %p) #0 {
; P8-NEXT: stdu r1, -128(r1)
; P8-NEXT: li r3, 48
; P8-NEXT: std r0, 144(r1)
-; P8-NEXT: std r27, 88(r1) # 8-byte Folded Spill
; P8-NEXT: xxswapd vs1, vs34
+; P8-NEXT: std r27, 88(r1) # 8-byte Folded Spill
; P8-NEXT: std r28, 96(r1) # 8-byte Folded Spill
; P8-NEXT: std r29, 104(r1) # 8-byte Folded Spill
-; P8-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; P8-NEXT: std r30, 112(r1) # 8-byte Folded Spill
; P8-NEXT: mr r30, r7
; P8-NEXT: stxvd2x vs62, r1, r3 # 16-byte Folded Spill
@@ -1019,9 +1016,8 @@ define void @test_trunc64_vec4(<4 x double> %a, ptr %p) #0 {
; P8-NEXT: vmr v31, v3
; P8-NEXT: bl __truncdfhf2
; P8-NEXT: nop
-; P8-NEXT: mr r29, r3
; P8-NEXT: xxswapd vs1, vs63
-; P8-NEXT: # kill: def $f1 killed $f1 killed $vsl1
+; P8-NEXT: mr r29, r3
; P8-NEXT: bl __truncdfhf2
; P8-NEXT: nop
; P8-NEXT: xxlor f1, vs62, vs62
@@ -1238,7 +1234,6 @@ define half @PR40273(half) #0 {
; P8-NEXT: vspltisw v2, 1
; P8-NEXT: xvcvsxwdp vs1, vs34
; P8-NEXT: .LBB20_2:
-; P8-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; P8-NEXT: addi r1, r1, 32
; P8-NEXT: ld r0, 16(r1)
; P8-NEXT: mtlr r0
@@ -1253,12 +1248,10 @@ define half @PR40273(half) #0 {
; CHECK-NEXT: mtfprwz f0, r3
; CHECK-NEXT: xscvhpdp f0, f0
; CHECK-NEXT: fcmpu cr0, f0, f1
-; CHECK-NEXT: beq cr0, .LBB20_2
+; CHECK-NEXT: beqlr cr0
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: vspltisw v2, 1
; CHECK-NEXT: xvcvsxwdp vs1, vs34
-; CHECK-NEXT: .LBB20_2:
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: blr
;
; SOFT-LABEL: PR40273:
diff --git a/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll b/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
index f217162782bfd..cc80b1de2943d 100644
--- a/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
+++ b/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
@@ -107,32 +107,20 @@ entry:
define <3 x double> @constrained_vector_fdiv_v3f64(<3 x double> %x, <3 x double> %y) #0 {
; PC64LE-LABEL: constrained_vector_fdiv_v3f64:
; PC64LE: # %bb.0: # %entry
-; PC64LE-NEXT: # kill: def $f5 killed $f5 def $vsl5
-; PC64LE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; PC64LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 0, 5, 4
; PC64LE-NEXT: xxmrghd 1, 2, 1
; PC64LE-NEXT: xsdivdp 3, 3, 6
; PC64LE-NEXT: xvdivdp 2, 1, 0
; PC64LE-NEXT: xxswapd 1, 2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE-NEXT: blr
;
; PC64LE9-LABEL: constrained_vector_fdiv_v3f64:
; PC64LE9: # %bb.0: # %entry
-; PC64LE9-NEXT: # kill: def $f5 killed $f5 def $vsl5
-; PC64LE9-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 0, 5, 4
; PC64LE9-NEXT: xxmrghd 1, 2, 1
; PC64LE9-NEXT: xsdivdp 3, 3, 6
; PC64LE9-NEXT: xvdivdp 2, 1, 0
; PC64LE9-NEXT: xxswapd 1, 2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr
entry:
%div = call <3 x double> @llvm.experimental.constrained.fdiv.v3f64(
@@ -217,13 +205,10 @@ define <2 x double> @constrained_vector_frem_v2f64(<2 x double> %x, <2 x double>
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 62
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: xxswapd 2, 63
-; PC64LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE-NEXT: bl fmod
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 80
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 34, 61, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 64
@@ -252,11 +237,8 @@ define <2 x double> @constrained_vector_frem_v2f64(<2 x double> %x, <2 x double>
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 62
; PC64LE9-NEXT: xxswapd 2, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: bl fmod
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 34, 61, 1
; PC64LE9-NEXT: lxv 63, 64(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lxv 62, 48(1) # 16-byte Folded Reload
@@ -408,7 +390,6 @@ define <3 x double> @constrained_vector_frem_v3f64(<3 x double> %x, <3 x double>
; PC64LE-NEXT: fmr 2, 30
; PC64LE-NEXT: bl fmod
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 63, 1, 63
; PC64LE-NEXT: fmr 1, 29
; PC64LE-NEXT: fmr 2, 31
@@ -423,7 +404,6 @@ define <3 x double> @constrained_vector_frem_v3f64(<3 x double> %x, <3 x double>
; PC64LE-NEXT: lfd 29, 72(1) # 8-byte Folded Reload
; PC64LE-NEXT: lfd 28, 64(1) # 8-byte Folded Reload
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: addi 1, 1, 96
; PC64LE-NEXT: ld 0, 16(1)
; PC64LE-NEXT: mtlr 0
@@ -451,7 +431,6 @@ define <3 x double> @constrained_vector_frem_v3f64(<3 x double> %x, <3 x double>
; PC64LE9-NEXT: fmr 2, 30
; PC64LE9-NEXT: bl fmod
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 63, 1, 63
; PC64LE9-NEXT: fmr 1, 29
; PC64LE9-NEXT: fmr 2, 31
@@ -462,7 +441,6 @@ define <3 x double> @constrained_vector_frem_v3f64(<3 x double> %x, <3 x double>
; PC64LE9-NEXT: xscpsgndp 2, 63, 63
; PC64LE9-NEXT: lxv 63, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 29, 56(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 28, 48(1) # 8-byte Folded Reload
@@ -505,12 +483,9 @@ define <4 x double> @constrained_vector_frem_v4f64(<4 x double> %x, <4 x double>
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 59, 1, 1
; PC64LE-NEXT: xxswapd 1, 60
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: xxswapd 2, 62
-; PC64LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE-NEXT: bl fmod
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 62, 59, 1
; PC64LE-NEXT: xxlor 1, 61, 61
; PC64LE-NEXT: xxlor 2, 63, 63
@@ -518,14 +493,11 @@ define <4 x double> @constrained_vector_frem_v4f64(<4 x double> %x, <4 x double>
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 60, 1, 1
; PC64LE-NEXT: xxswapd 1, 61
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: xxswapd 2, 63
-; PC64LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE-NEXT: bl fmod
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 112
; PC64LE-NEXT: vmr 2, 30
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 35, 60, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 96
@@ -562,11 +534,8 @@ define <4 x double> @constrained_vector_frem_v4f64(<4 x double> %x, <4 x double>
; PC64LE9-NEXT: xscpsgndp 59, 1, 1
; PC64LE9-NEXT: xxswapd 1, 60
; PC64LE9-NEXT: xxswapd 2, 62
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: bl fmod
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 62, 59, 1
; PC64LE9-NEXT: xscpsgndp 1, 61, 61
; PC64LE9-NEXT: xscpsgndp 2, 63, 63
@@ -575,11 +544,8 @@ define <4 x double> @constrained_vector_frem_v4f64(<4 x double> %x, <4 x double>
; PC64LE9-NEXT: xscpsgndp 60, 1, 1
; PC64LE9-NEXT: xxswapd 1, 61
; PC64LE9-NEXT: xxswapd 2, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: bl fmod
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 35, 60, 1
; PC64LE9-NEXT: vmr 2, 30
; PC64LE9-NEXT: lxv 63, 96(1) # 16-byte Folded Reload
@@ -704,32 +670,20 @@ entry:
define <3 x double> @constrained_vector_fmul_v3f64(<3 x double> %x, <3 x double> %y) #0 {
; PC64LE-LABEL: constrained_vector_fmul_v3f64:
; PC64LE: # %bb.0: # %entry
-; PC64LE-NEXT: # kill: def $f5 killed $f5 def $vsl5
-; PC64LE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; PC64LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 0, 5, 4
; PC64LE-NEXT: xxmrghd 1, 2, 1
; PC64LE-NEXT: xsmuldp 3, 3, 6
; PC64LE-NEXT: xvmuldp 2, 1, 0
; PC64LE-NEXT: xxswapd 1, 2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE-NEXT: blr
;
; PC64LE9-LABEL: constrained_vector_fmul_v3f64:
; PC64LE9: # %bb.0: # %entry
-; PC64LE9-NEXT: # kill: def $f5 killed $f5 def $vsl5
-; PC64LE9-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 0, 5, 4
; PC64LE9-NEXT: xxmrghd 1, 2, 1
; PC64LE9-NEXT: xsmuldp 3, 3, 6
; PC64LE9-NEXT: xvmuldp 2, 1, 0
; PC64LE9-NEXT: xxswapd 1, 2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr
entry:
%mul = call <3 x double> @llvm.experimental.constrained.fmul.v3f64(
@@ -866,32 +820,20 @@ entry:
define <3 x double> @constrained_vector_fadd_v3f64(<3 x double> %x, <3 x double> %y) #0 {
; PC64LE-LABEL: constrained_vector_fadd_v3f64:
; PC64LE: # %bb.0: # %entry
-; PC64LE-NEXT: # kill: def $f5 killed $f5 def $vsl5
-; PC64LE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; PC64LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 0, 5, 4
; PC64LE-NEXT: xxmrghd 1, 2, 1
; PC64LE-NEXT: xsadddp 3, 3, 6
; PC64LE-NEXT: xvadddp 2, 1, 0
; PC64LE-NEXT: xxswapd 1, 2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE-NEXT: blr
;
; PC64LE9-LABEL: constrained_vector_fadd_v3f64:
; PC64LE9: # %bb.0: # %entry
-; PC64LE9-NEXT: # kill: def $f5 killed $f5 def $vsl5
-; PC64LE9-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 0, 5, 4
; PC64LE9-NEXT: xxmrghd 1, 2, 1
; PC64LE9-NEXT: xsadddp 3, 3, 6
; PC64LE9-NEXT: xvadddp 2, 1, 0
; PC64LE9-NEXT: xxswapd 1, 2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr
entry:
%add = call <3 x double> @llvm.experimental.constrained.fadd.v3f64(
@@ -1028,32 +970,20 @@ entry:
define <3 x double> @constrained_vector_fsub_v3f64(<3 x double> %x, <3 x double> %y) #0 {
; PC64LE-LABEL: constrained_vector_fsub_v3f64:
; PC64LE: # %bb.0: # %entry
-; PC64LE-NEXT: # kill: def $f5 killed $f5 def $vsl5
-; PC64LE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; PC64LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 0, 5, 4
; PC64LE-NEXT: xxmrghd 1, 2, 1
; PC64LE-NEXT: xssubdp 3, 3, 6
; PC64LE-NEXT: xvsubdp 2, 1, 0
; PC64LE-NEXT: xxswapd 1, 2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE-NEXT: blr
;
; PC64LE9-LABEL: constrained_vector_fsub_v3f64:
; PC64LE9: # %bb.0: # %entry
-; PC64LE9-NEXT: # kill: def $f5 killed $f5 def $vsl5
-; PC64LE9-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 0, 5, 4
; PC64LE9-NEXT: xxmrghd 1, 2, 1
; PC64LE9-NEXT: xssubdp 3, 3, 6
; PC64LE9-NEXT: xvsubdp 2, 1, 0
; PC64LE9-NEXT: xxswapd 1, 2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr
entry:
%sub = call <3 x double> @llvm.experimental.constrained.fsub.v3f64(
@@ -1175,26 +1105,18 @@ entry:
define <3 x double> @constrained_vector_sqrt_v3f64(<3 x double> %x) #0 {
; PC64LE-LABEL: constrained_vector_sqrt_v3f64:
; PC64LE: # %bb.0: # %entry
-; PC64LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 0, 2, 1
; PC64LE-NEXT: xssqrtdp 3, 3
; PC64LE-NEXT: xvsqrtdp 2, 0
; PC64LE-NEXT: xxswapd 1, 2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE-NEXT: blr
;
; PC64LE9-LABEL: constrained_vector_sqrt_v3f64:
; PC64LE9: # %bb.0: # %entry
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 0, 2, 1
; PC64LE9-NEXT: xssqrtdp 3, 3
; PC64LE9-NEXT: xvsqrtdp 2, 0
; PC64LE9-NEXT: xxswapd 1, 2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr
entry:
%sqrt = call <3 x double> @llvm.experimental.constrained.sqrt.v3f64(
@@ -1277,13 +1199,10 @@ define <2 x double> @constrained_vector_pow_v2f64(<2 x double> %x, <2 x double>
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 62
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: xxswapd 2, 63
-; PC64LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE-NEXT: bl pow
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 80
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 34, 61, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 64
@@ -1312,11 +1231,8 @@ define <2 x double> @constrained_vector_pow_v2f64(<2 x double> %x, <2 x double>
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 62
; PC64LE9-NEXT: xxswapd 2, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: bl pow
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 34, 61, 1
; PC64LE9-NEXT: lxv 63, 64(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lxv 62, 48(1) # 16-byte Folded Reload
@@ -1468,7 +1384,6 @@ define <3 x double> @constrained_vector_pow_v3f64(<3 x double> %x, <3 x double>
; PC64LE-NEXT: fmr 2, 30
; PC64LE-NEXT: bl pow
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 63, 1, 63
; PC64LE-NEXT: fmr 1, 29
; PC64LE-NEXT: fmr 2, 31
@@ -1483,7 +1398,6 @@ define <3 x double> @constrained_vector_pow_v3f64(<3 x double> %x, <3 x double>
; PC64LE-NEXT: lfd 29, 72(1) # 8-byte Folded Reload
; PC64LE-NEXT: lfd 28, 64(1) # 8-byte Folded Reload
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: addi 1, 1, 96
; PC64LE-NEXT: ld 0, 16(1)
; PC64LE-NEXT: mtlr 0
@@ -1511,7 +1425,6 @@ define <3 x double> @constrained_vector_pow_v3f64(<3 x double> %x, <3 x double>
; PC64LE9-NEXT: fmr 2, 30
; PC64LE9-NEXT: bl pow
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 63, 1, 63
; PC64LE9-NEXT: fmr 1, 29
; PC64LE9-NEXT: fmr 2, 31
@@ -1522,7 +1435,6 @@ define <3 x double> @constrained_vector_pow_v3f64(<3 x double> %x, <3 x double>
; PC64LE9-NEXT: xscpsgndp 2, 63, 63
; PC64LE9-NEXT: lxv 63, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 29, 56(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 28, 48(1) # 8-byte Folded Reload
@@ -1565,12 +1477,9 @@ define <4 x double> @constrained_vector_pow_v4f64(<4 x double> %x, <4 x double>
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 59, 1, 1
; PC64LE-NEXT: xxswapd 1, 60
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: xxswapd 2, 62
-; PC64LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE-NEXT: bl pow
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 62, 59, 1
; PC64LE-NEXT: xxlor 1, 61, 61
; PC64LE-NEXT: xxlor 2, 63, 63
@@ -1578,14 +1487,11 @@ define <4 x double> @constrained_vector_pow_v4f64(<4 x double> %x, <4 x double>
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 60, 1, 1
; PC64LE-NEXT: xxswapd 1, 61
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: xxswapd 2, 63
-; PC64LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE-NEXT: bl pow
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 112
; PC64LE-NEXT: vmr 2, 30
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 35, 60, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 96
@@ -1622,11 +1528,8 @@ define <4 x double> @constrained_vector_pow_v4f64(<4 x double> %x, <4 x double>
; PC64LE9-NEXT: xscpsgndp 59, 1, 1
; PC64LE9-NEXT: xxswapd 1, 60
; PC64LE9-NEXT: xxswapd 2, 62
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: bl pow
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 62, 59, 1
; PC64LE9-NEXT: xscpsgndp 1, 61, 61
; PC64LE9-NEXT: xscpsgndp 2, 63, 63
@@ -1635,11 +1538,8 @@ define <4 x double> @constrained_vector_pow_v4f64(<4 x double> %x, <4 x double>
; PC64LE9-NEXT: xscpsgndp 60, 1, 1
; PC64LE9-NEXT: xxswapd 1, 61
; PC64LE9-NEXT: xxswapd 2, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: bl pow
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 35, 60, 1
; PC64LE9-NEXT: vmr 2, 30
; PC64LE9-NEXT: lxv 63, 96(1) # 16-byte Folded Reload
@@ -1715,11 +1615,9 @@ define <2 x double> @constrained_vector_powi_v2f64(<2 x double> %x, i32 %y) #0 {
; PC64LE-NEXT: mr 4, 30
; PC64LE-NEXT: xxlor 62, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl __powidf2
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 64
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 34, 62, 1
; PC64LE-NEXT: ld 30, 80(1) # 8-byte Folded Reload
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
@@ -1747,10 +1645,8 @@ define <2 x double> @constrained_vector_powi_v2f64(<2 x double> %x, i32 %y) #0 {
; PC64LE9-NEXT: mr 4, 30
; PC64LE9-NEXT: xscpsgndp 62, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl __powidf2
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 34, 62, 1
; PC64LE9-NEXT: lxv 63, 48(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lxv 62, 32(1) # 16-byte Folded Reload
@@ -1894,7 +1790,6 @@ define <3 x double> @constrained_vector_powi_v3f64(<3 x double> %x, i32 %y) #0 {
; PC64LE-NEXT: mr 4, 30
; PC64LE-NEXT: bl __powidf2
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 63, 1, 63
; PC64LE-NEXT: fmr 1, 31
; PC64LE-NEXT: mr 4, 30
@@ -1907,7 +1802,6 @@ define <3 x double> @constrained_vector_powi_v3f64(<3 x double> %x, i32 %y) #0 {
; PC64LE-NEXT: xxlor 2, 63, 63
; PC64LE-NEXT: lfd 30, 80(1) # 8-byte Folded Reload
; PC64LE-NEXT: ld 30, 64(1) # 8-byte Folded Reload
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: addi 1, 1, 96
; PC64LE-NEXT: ld 0, 16(1)
@@ -1934,7 +1828,6 @@ define <3 x double> @constrained_vector_powi_v3f64(<3 x double> %x, i32 %y) #0 {
; PC64LE9-NEXT: mr 4, 30
; PC64LE9-NEXT: bl __powidf2
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 63, 1, 63
; PC64LE9-NEXT: fmr 1, 31
; PC64LE9-NEXT: mr 4, 30
@@ -1945,7 +1838,6 @@ define <3 x double> @constrained_vector_powi_v3f64(<3 x double> %x, i32 %y) #0 {
; PC64LE9-NEXT: xscpsgndp 2, 63, 63
; PC64LE9-NEXT: lxv 63, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: ld 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 1, 1, 80
@@ -1984,10 +1876,8 @@ define <4 x double> @constrained_vector_powi_v4f64(<4 x double> %x, i32 %y) #0 {
; PC64LE-NEXT: mr 4, 30
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 62
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl __powidf2
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 62, 61, 1
; PC64LE-NEXT: xxlor 1, 63, 63
; PC64LE-NEXT: mr 4, 30
@@ -1996,12 +1886,10 @@ define <4 x double> @constrained_vector_powi_v4f64(<4 x double> %x, i32 %y) #0 {
; PC64LE-NEXT: mr 4, 30
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl __powidf2
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 80
; PC64LE-NEXT: vmr 2, 30
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 35, 61, 1
; PC64LE-NEXT: ld 30, 96(1) # 8-byte Folded Reload
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
@@ -2033,10 +1921,8 @@ define <4 x double> @constrained_vector_powi_v4f64(<4 x double> %x, i32 %y) #0 {
; PC64LE9-NEXT: mr 4, 30
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 62
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl __powidf2
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 62, 61, 1
; PC64LE9-NEXT: xscpsgndp 1, 63, 63
; PC64LE9-NEXT: mr 4, 30
@@ -2045,10 +1931,8 @@ define <4 x double> @constrained_vector_powi_v4f64(<4 x double> %x, i32 %y) #0 {
; PC64LE9-NEXT: mr 4, 30
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl __powidf2
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 35, 61, 1
; PC64LE9-NEXT: vmr 2, 30
; PC64LE9-NEXT: lxv 63, 64(1) # 16-byte Folded Reload
@@ -2116,11 +2000,9 @@ define <2 x double> @constrained_vector_sin_v2f64(<2 x double> %x) #0 {
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 62, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl sin
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 64
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 34, 62, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 48
@@ -2143,10 +2025,8 @@ define <2 x double> @constrained_vector_sin_v2f64(<2 x double> %x) #0 {
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 62, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl sin
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 34, 62, 1
; PC64LE9-NEXT: lxv 63, 48(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lxv 62, 32(1) # 16-byte Folded Reload
@@ -2269,7 +2149,6 @@ define <3 x double> @constrained_vector_sin_v3f64(<3 x double> %x) #0 {
; PC64LE-NEXT: fmr 1, 30
; PC64LE-NEXT: bl sin
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 63, 1, 63
; PC64LE-NEXT: fmr 1, 31
; PC64LE-NEXT: bl sin
@@ -2280,7 +2159,6 @@ define <3 x double> @constrained_vector_sin_v3f64(<3 x double> %x) #0 {
; PC64LE-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
; PC64LE-NEXT: xxlor 2, 63, 63
; PC64LE-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: addi 1, 1, 80
; PC64LE-NEXT: ld 0, 16(1)
@@ -2303,7 +2181,6 @@ define <3 x double> @constrained_vector_sin_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: fmr 1, 30
; PC64LE9-NEXT: bl sin
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 63, 1, 63
; PC64LE9-NEXT: fmr 1, 31
; PC64LE9-NEXT: bl sin
@@ -2313,7 +2190,6 @@ define <3 x double> @constrained_vector_sin_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: xscpsgndp 2, 63, 63
; PC64LE9-NEXT: lxv 63, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 31, 56(1) # 8-byte Folded Reload
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
@@ -2346,22 +2222,18 @@ define <4 x double> @constrained_vector_sin_v4f64(<4 x double> %x) #0 {
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 62
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl sin
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 62, 61, 1
; PC64LE-NEXT: xxlor 1, 63, 63
; PC64LE-NEXT: bl sin
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl sin
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 80
; PC64LE-NEXT: vmr 2, 30
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 35, 61, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 64
@@ -2388,20 +2260,16 @@ define <4 x double> @constrained_vector_sin_v4f64(<4 x double> %x) #0 {
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 62
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl sin
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 62, 61, 1
; PC64LE9-NEXT: xscpsgndp 1, 63, 63
; PC64LE9-NEXT: bl sin
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl sin
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 35, 61, 1
; PC64LE9-NEXT: vmr 2, 30
; PC64LE9-NEXT: lxv 63, 64(1) # 16-byte Folded Reload
@@ -2467,11 +2335,9 @@ define <2 x double> @constrained_vector_cos_v2f64(<2 x double> %x) #0 {
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 62, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl cos
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 64
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 34, 62, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 48
@@ -2494,10 +2360,8 @@ define <2 x double> @constrained_vector_cos_v2f64(<2 x double> %x) #0 {
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 62, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl cos
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 34, 62, 1
; PC64LE9-NEXT: lxv 63, 48(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lxv 62, 32(1) # 16-byte Folded Reload
@@ -2620,7 +2484,6 @@ define <3 x double> @constrained_vector_cos_v3f64(<3 x double> %x) #0 {
; PC64LE-NEXT: fmr 1, 30
; PC64LE-NEXT: bl cos
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 63, 1, 63
; PC64LE-NEXT: fmr 1, 31
; PC64LE-NEXT: bl cos
@@ -2631,7 +2494,6 @@ define <3 x double> @constrained_vector_cos_v3f64(<3 x double> %x) #0 {
; PC64LE-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
; PC64LE-NEXT: xxlor 2, 63, 63
; PC64LE-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: addi 1, 1, 80
; PC64LE-NEXT: ld 0, 16(1)
@@ -2654,7 +2516,6 @@ define <3 x double> @constrained_vector_cos_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: fmr 1, 30
; PC64LE9-NEXT: bl cos
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 63, 1, 63
; PC64LE9-NEXT: fmr 1, 31
; PC64LE9-NEXT: bl cos
@@ -2664,7 +2525,6 @@ define <3 x double> @constrained_vector_cos_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: xscpsgndp 2, 63, 63
; PC64LE9-NEXT: lxv 63, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 31, 56(1) # 8-byte Folded Reload
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
@@ -2697,22 +2557,18 @@ define <4 x double> @constrained_vector_cos_v4f64(<4 x double> %x) #0 {
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 62
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl cos
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 62, 61, 1
; PC64LE-NEXT: xxlor 1, 63, 63
; PC64LE-NEXT: bl cos
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl cos
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 80
; PC64LE-NEXT: vmr 2, 30
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 35, 61, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 64
@@ -2739,20 +2595,16 @@ define <4 x double> @constrained_vector_cos_v4f64(<4 x double> %x) #0 {
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 62
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl cos
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 62, 61, 1
; PC64LE9-NEXT: xscpsgndp 1, 63, 63
; PC64LE9-NEXT: bl cos
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl cos
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 35, 61, 1
; PC64LE9-NEXT: vmr 2, 30
; PC64LE9-NEXT: lxv 63, 64(1) # 16-byte Folded Reload
@@ -2818,11 +2670,9 @@ define <2 x double> @constrained_vector_exp_v2f64(<2 x double> %x) #0 {
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 62, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl exp
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 64
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 34, 62, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 48
@@ -2845,10 +2695,8 @@ define <2 x double> @constrained_vector_exp_v2f64(<2 x double> %x) #0 {
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 62, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl exp
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 34, 62, 1
; PC64LE9-NEXT: lxv 63, 48(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lxv 62, 32(1) # 16-byte Folded Reload
@@ -2971,7 +2819,6 @@ define <3 x double> @constrained_vector_exp_v3f64(<3 x double> %x) #0 {
; PC64LE-NEXT: fmr 1, 30
; PC64LE-NEXT: bl exp
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 63, 1, 63
; PC64LE-NEXT: fmr 1, 31
; PC64LE-NEXT: bl exp
@@ -2982,7 +2829,6 @@ define <3 x double> @constrained_vector_exp_v3f64(<3 x double> %x) #0 {
; PC64LE-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
; PC64LE-NEXT: xxlor 2, 63, 63
; PC64LE-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: addi 1, 1, 80
; PC64LE-NEXT: ld 0, 16(1)
@@ -3005,7 +2851,6 @@ define <3 x double> @constrained_vector_exp_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: fmr 1, 30
; PC64LE9-NEXT: bl exp
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 63, 1, 63
; PC64LE9-NEXT: fmr 1, 31
; PC64LE9-NEXT: bl exp
@@ -3015,7 +2860,6 @@ define <3 x double> @constrained_vector_exp_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: xscpsgndp 2, 63, 63
; PC64LE9-NEXT: lxv 63, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 31, 56(1) # 8-byte Folded Reload
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
@@ -3048,22 +2892,18 @@ define <4 x double> @constrained_vector_exp_v4f64(<4 x double> %x) #0 {
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 62
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl exp
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 62, 61, 1
; PC64LE-NEXT: xxlor 1, 63, 63
; PC64LE-NEXT: bl exp
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl exp
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 80
; PC64LE-NEXT: vmr 2, 30
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 35, 61, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 64
@@ -3090,20 +2930,16 @@ define <4 x double> @constrained_vector_exp_v4f64(<4 x double> %x) #0 {
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 62
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl exp
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 62, 61, 1
; PC64LE9-NEXT: xscpsgndp 1, 63, 63
; PC64LE9-NEXT: bl exp
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl exp
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 35, 61, 1
; PC64LE9-NEXT: vmr 2, 30
; PC64LE9-NEXT: lxv 63, 64(1) # 16-byte Folded Reload
@@ -3169,11 +3005,9 @@ define <2 x double> @constrained_vector_exp2_v2f64(<2 x double> %x) #0 {
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 62, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl exp2
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 64
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 34, 62, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 48
@@ -3196,10 +3030,8 @@ define <2 x double> @constrained_vector_exp2_v2f64(<2 x double> %x) #0 {
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 62, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl exp2
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 34, 62, 1
; PC64LE9-NEXT: lxv 63, 48(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lxv 62, 32(1) # 16-byte Folded Reload
@@ -3322,7 +3154,6 @@ define <3 x double> @constrained_vector_exp2_v3f64(<3 x double> %x) #0 {
; PC64LE-NEXT: fmr 1, 30
; PC64LE-NEXT: bl exp2
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 63, 1, 63
; PC64LE-NEXT: fmr 1, 31
; PC64LE-NEXT: bl exp2
@@ -3333,7 +3164,6 @@ define <3 x double> @constrained_vector_exp2_v3f64(<3 x double> %x) #0 {
; PC64LE-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
; PC64LE-NEXT: xxlor 2, 63, 63
; PC64LE-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: addi 1, 1, 80
; PC64LE-NEXT: ld 0, 16(1)
@@ -3356,7 +3186,6 @@ define <3 x double> @constrained_vector_exp2_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: fmr 1, 30
; PC64LE9-NEXT: bl exp2
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 63, 1, 63
; PC64LE9-NEXT: fmr 1, 31
; PC64LE9-NEXT: bl exp2
@@ -3366,7 +3195,6 @@ define <3 x double> @constrained_vector_exp2_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: xscpsgndp 2, 63, 63
; PC64LE9-NEXT: lxv 63, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 31, 56(1) # 8-byte Folded Reload
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
@@ -3399,22 +3227,18 @@ define <4 x double> @constrained_vector_exp2_v4f64(<4 x double> %x) #0 {
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 62
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl exp2
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 62, 61, 1
; PC64LE-NEXT: xxlor 1, 63, 63
; PC64LE-NEXT: bl exp2
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl exp2
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 80
; PC64LE-NEXT: vmr 2, 30
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 35, 61, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 64
@@ -3441,20 +3265,16 @@ define <4 x double> @constrained_vector_exp2_v4f64(<4 x double> %x) #0 {
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 62
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl exp2
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 62, 61, 1
; PC64LE9-NEXT: xscpsgndp 1, 63, 63
; PC64LE9-NEXT: bl exp2
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl exp2
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 35, 61, 1
; PC64LE9-NEXT: vmr 2, 30
; PC64LE9-NEXT: lxv 63, 64(1) # 16-byte Folded Reload
@@ -3520,11 +3340,9 @@ define <2 x double> @constrained_vector_log_v2f64(<2 x double> %x) #0 {
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 62, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl log
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 64
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 34, 62, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 48
@@ -3547,10 +3365,8 @@ define <2 x double> @constrained_vector_log_v2f64(<2 x double> %x) #0 {
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 62, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl log
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 34, 62, 1
; PC64LE9-NEXT: lxv 63, 48(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lxv 62, 32(1) # 16-byte Folded Reload
@@ -3673,7 +3489,6 @@ define <3 x double> @constrained_vector_log_v3f64(<3 x double> %x) #0 {
; PC64LE-NEXT: fmr 1, 30
; PC64LE-NEXT: bl log
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 63, 1, 63
; PC64LE-NEXT: fmr 1, 31
; PC64LE-NEXT: bl log
@@ -3684,7 +3499,6 @@ define <3 x double> @constrained_vector_log_v3f64(<3 x double> %x) #0 {
; PC64LE-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
; PC64LE-NEXT: xxlor 2, 63, 63
; PC64LE-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: addi 1, 1, 80
; PC64LE-NEXT: ld 0, 16(1)
@@ -3707,7 +3521,6 @@ define <3 x double> @constrained_vector_log_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: fmr 1, 30
; PC64LE9-NEXT: bl log
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 63, 1, 63
; PC64LE9-NEXT: fmr 1, 31
; PC64LE9-NEXT: bl log
@@ -3717,7 +3530,6 @@ define <3 x double> @constrained_vector_log_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: xscpsgndp 2, 63, 63
; PC64LE9-NEXT: lxv 63, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 31, 56(1) # 8-byte Folded Reload
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
@@ -3750,22 +3562,18 @@ define <4 x double> @constrained_vector_log_v4f64(<4 x double> %x) #0 {
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 62
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl log
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 62, 61, 1
; PC64LE-NEXT: xxlor 1, 63, 63
; PC64LE-NEXT: bl log
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl log
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 80
; PC64LE-NEXT: vmr 2, 30
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 35, 61, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 64
@@ -3792,20 +3600,16 @@ define <4 x double> @constrained_vector_log_v4f64(<4 x double> %x) #0 {
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 62
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl log
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 62, 61, 1
; PC64LE9-NEXT: xscpsgndp 1, 63, 63
; PC64LE9-NEXT: bl log
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl log
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 35, 61, 1
; PC64LE9-NEXT: vmr 2, 30
; PC64LE9-NEXT: lxv 63, 64(1) # 16-byte Folded Reload
@@ -3871,11 +3675,9 @@ define <2 x double> @constrained_vector_log10_v2f64(<2 x double> %x) #0 {
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 62, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl log10
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 64
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 34, 62, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 48
@@ -3898,10 +3700,8 @@ define <2 x double> @constrained_vector_log10_v2f64(<2 x double> %x) #0 {
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 62, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl log10
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 34, 62, 1
; PC64LE9-NEXT: lxv 63, 48(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lxv 62, 32(1) # 16-byte Folded Reload
@@ -4024,7 +3824,6 @@ define <3 x double> @constrained_vector_log10_v3f64(<3 x double> %x) #0 {
; PC64LE-NEXT: fmr 1, 30
; PC64LE-NEXT: bl log10
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 63, 1, 63
; PC64LE-NEXT: fmr 1, 31
; PC64LE-NEXT: bl log10
@@ -4035,7 +3834,6 @@ define <3 x double> @constrained_vector_log10_v3f64(<3 x double> %x) #0 {
; PC64LE-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
; PC64LE-NEXT: xxlor 2, 63, 63
; PC64LE-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: addi 1, 1, 80
; PC64LE-NEXT: ld 0, 16(1)
@@ -4058,7 +3856,6 @@ define <3 x double> @constrained_vector_log10_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: fmr 1, 30
; PC64LE9-NEXT: bl log10
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 63, 1, 63
; PC64LE9-NEXT: fmr 1, 31
; PC64LE9-NEXT: bl log10
@@ -4068,7 +3865,6 @@ define <3 x double> @constrained_vector_log10_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: xscpsgndp 2, 63, 63
; PC64LE9-NEXT: lxv 63, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 31, 56(1) # 8-byte Folded Reload
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
@@ -4101,22 +3897,18 @@ define <4 x double> @constrained_vector_log10_v4f64(<4 x double> %x) #0 {
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 62
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl log10
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 62, 61, 1
; PC64LE-NEXT: xxlor 1, 63, 63
; PC64LE-NEXT: bl log10
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl log10
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 80
; PC64LE-NEXT: vmr 2, 30
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 35, 61, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 64
@@ -4143,20 +3935,16 @@ define <4 x double> @constrained_vector_log10_v4f64(<4 x double> %x) #0 {
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 62
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl log10
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 62, 61, 1
; PC64LE9-NEXT: xscpsgndp 1, 63, 63
; PC64LE9-NEXT: bl log10
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl log10
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 35, 61, 1
; PC64LE9-NEXT: vmr 2, 30
; PC64LE9-NEXT: lxv 63, 64(1) # 16-byte Folded Reload
@@ -4222,11 +4010,9 @@ define <2 x double> @constrained_vector_log2_v2f64(<2 x double> %x) #0 {
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 62, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl log2
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 64
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 34, 62, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 48
@@ -4249,10 +4035,8 @@ define <2 x double> @constrained_vector_log2_v2f64(<2 x double> %x) #0 {
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 62, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl log2
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 34, 62, 1
; PC64LE9-NEXT: lxv 63, 48(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lxv 62, 32(1) # 16-byte Folded Reload
@@ -4375,7 +4159,6 @@ define <3 x double> @constrained_vector_log2_v3f64(<3 x double> %x) #0 {
; PC64LE-NEXT: fmr 1, 30
; PC64LE-NEXT: bl log2
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 63, 1, 63
; PC64LE-NEXT: fmr 1, 31
; PC64LE-NEXT: bl log2
@@ -4386,7 +4169,6 @@ define <3 x double> @constrained_vector_log2_v3f64(<3 x double> %x) #0 {
; PC64LE-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
; PC64LE-NEXT: xxlor 2, 63, 63
; PC64LE-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: addi 1, 1, 80
; PC64LE-NEXT: ld 0, 16(1)
@@ -4409,7 +4191,6 @@ define <3 x double> @constrained_vector_log2_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: fmr 1, 30
; PC64LE9-NEXT: bl log2
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 63, 1, 63
; PC64LE9-NEXT: fmr 1, 31
; PC64LE9-NEXT: bl log2
@@ -4419,7 +4200,6 @@ define <3 x double> @constrained_vector_log2_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: xscpsgndp 2, 63, 63
; PC64LE9-NEXT: lxv 63, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 31, 56(1) # 8-byte Folded Reload
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
@@ -4452,22 +4232,18 @@ define <4 x double> @constrained_vector_log2_v4f64(<4 x double> %x) #0 {
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 62
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl log2
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 62, 61, 1
; PC64LE-NEXT: xxlor 1, 63, 63
; PC64LE-NEXT: bl log2
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl log2
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 80
; PC64LE-NEXT: vmr 2, 30
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 35, 61, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 64
@@ -4494,20 +4270,16 @@ define <4 x double> @constrained_vector_log2_v4f64(<4 x double> %x) #0 {
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 62
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl log2
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 62, 61, 1
; PC64LE9-NEXT: xscpsgndp 1, 63, 63
; PC64LE9-NEXT: bl log2
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl log2
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 35, 61, 1
; PC64LE9-NEXT: vmr 2, 30
; PC64LE9-NEXT: lxv 63, 64(1) # 16-byte Folded Reload
@@ -4615,26 +4387,18 @@ define <3 x float> @constrained_vector_rint_v3f32(<3 x float> %x) #0 {
define <3 x double> @constrained_vector_rint_v3f64(<3 x double> %x) #0 {
; PC64LE-LABEL: constrained_vector_rint_v3f64:
; PC64LE: # %bb.0: # %entry
-; PC64LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 0, 2, 1
; PC64LE-NEXT: xsrdpic 3, 3
; PC64LE-NEXT: xvrdpic 2, 0
; PC64LE-NEXT: xxswapd 1, 2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE-NEXT: blr
;
; PC64LE9-LABEL: constrained_vector_rint_v3f64:
; PC64LE9: # %bb.0: # %entry
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 0, 2, 1
; PC64LE9-NEXT: xsrdpic 3, 3
; PC64LE9-NEXT: xvrdpic 2, 0
; PC64LE9-NEXT: xxswapd 1, 2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr
entry:
%rint = call <3 x double> @llvm.experimental.constrained.rint.v3f64(
@@ -4712,11 +4476,9 @@ define <2 x double> @constrained_vector_nearbyint_v2f64(<2 x double> %x) #0 {
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 62, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl nearbyint
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 64
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 34, 62, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 48
@@ -4739,10 +4501,8 @@ define <2 x double> @constrained_vector_nearbyint_v2f64(<2 x double> %x) #0 {
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 62, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl nearbyint
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 34, 62, 1
; PC64LE9-NEXT: lxv 63, 48(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lxv 62, 32(1) # 16-byte Folded Reload
@@ -4865,7 +4625,6 @@ define <3 x double> @constrained_vector_nearby_v3f64(<3 x double> %x) #0 {
; PC64LE-NEXT: fmr 1, 30
; PC64LE-NEXT: bl nearbyint
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 63, 1, 63
; PC64LE-NEXT: fmr 1, 31
; PC64LE-NEXT: bl nearbyint
@@ -4876,7 +4635,6 @@ define <3 x double> @constrained_vector_nearby_v3f64(<3 x double> %x) #0 {
; PC64LE-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
; PC64LE-NEXT: xxlor 2, 63, 63
; PC64LE-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: addi 1, 1, 80
; PC64LE-NEXT: ld 0, 16(1)
@@ -4899,7 +4657,6 @@ define <3 x double> @constrained_vector_nearby_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: fmr 1, 30
; PC64LE9-NEXT: bl nearbyint
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 63, 1, 63
; PC64LE9-NEXT: fmr 1, 31
; PC64LE9-NEXT: bl nearbyint
@@ -4909,7 +4666,6 @@ define <3 x double> @constrained_vector_nearby_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: xscpsgndp 2, 63, 63
; PC64LE9-NEXT: lxv 63, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 31, 56(1) # 8-byte Folded Reload
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
@@ -4942,22 +4698,18 @@ define <4 x double> @constrained_vector_nearbyint_v4f64(<4 x double> %x) #0 {
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 62
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl nearbyint
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 62, 61, 1
; PC64LE-NEXT: xxlor 1, 63, 63
; PC64LE-NEXT: bl nearbyint
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl nearbyint
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 80
; PC64LE-NEXT: vmr 2, 30
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 35, 61, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 64
@@ -4984,20 +4736,16 @@ define <4 x double> @constrained_vector_nearbyint_v4f64(<4 x double> %x) #0 {
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 62
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl nearbyint
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 62, 61, 1
; PC64LE9-NEXT: xscpsgndp 1, 63, 63
; PC64LE9-NEXT: bl nearbyint
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl nearbyint
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 35, 61, 1
; PC64LE9-NEXT: vmr 2, 30
; PC64LE9-NEXT: lxv 63, 64(1) # 16-byte Folded Reload
@@ -5179,10 +4927,6 @@ define <3 x double> @constrained_vector_max_v3f64(<3 x double> %x, <3 x double>
; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: stdu 1, -64(1)
; PC64LE-NEXT: li 3, 48
-; PC64LE-NEXT: # kill: def $f5 killed $f5 def $vsl5
-; PC64LE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; PC64LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 0, 5, 4
; PC64LE-NEXT: xxmrghd 1, 2, 1
; PC64LE-NEXT: std 0, 80(1)
@@ -5195,7 +4939,6 @@ define <3 x double> @constrained_vector_max_v3f64(<3 x double> %x, <3 x double>
; PC64LE-NEXT: li 3, 48
; PC64LE-NEXT: fmr 3, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: xxlor 2, 63, 63
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: addi 1, 1, 64
@@ -5207,10 +4950,6 @@ define <3 x double> @constrained_vector_max_v3f64(<3 x double> %x, <3 x double>
; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: mflr 0
; PC64LE9-NEXT: stdu 1, -48(1)
-; PC64LE9-NEXT: # kill: def $f5 killed $f5 def $vsl5
-; PC64LE9-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 0, 5, 4
; PC64LE9-NEXT: xxmrghd 1, 2, 1
; PC64LE9-NEXT: std 0, 64(1)
@@ -5224,7 +4963,6 @@ define <3 x double> @constrained_vector_max_v3f64(<3 x double> %x, <3 x double>
; PC64LE9-NEXT: xxswapd 1, 63
; PC64LE9-NEXT: xscpsgndp 2, 63, 63
; PC64LE9-NEXT: lxv 63, 32(1) # 16-byte Folded Reload
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: addi 1, 1, 48
; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0
@@ -5421,10 +5159,6 @@ define <3 x double> @constrained_vector_min_v3f64(<3 x double> %x, <3 x double>
; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: stdu 1, -64(1)
; PC64LE-NEXT: li 3, 48
-; PC64LE-NEXT: # kill: def $f5 killed $f5 def $vsl5
-; PC64LE-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; PC64LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 0, 5, 4
; PC64LE-NEXT: xxmrghd 1, 2, 1
; PC64LE-NEXT: std 0, 80(1)
@@ -5437,7 +5171,6 @@ define <3 x double> @constrained_vector_min_v3f64(<3 x double> %x, <3 x double>
; PC64LE-NEXT: li 3, 48
; PC64LE-NEXT: fmr 3, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: xxlor 2, 63, 63
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: addi 1, 1, 64
@@ -5449,10 +5182,6 @@ define <3 x double> @constrained_vector_min_v3f64(<3 x double> %x, <3 x double>
; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: mflr 0
; PC64LE9-NEXT: stdu 1, -48(1)
-; PC64LE9-NEXT: # kill: def $f5 killed $f5 def $vsl5
-; PC64LE9-NEXT: # kill: def $f4 killed $f4 def $vsl4
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 0, 5, 4
; PC64LE9-NEXT: xxmrghd 1, 2, 1
; PC64LE9-NEXT: std 0, 64(1)
@@ -5466,7 +5195,6 @@ define <3 x double> @constrained_vector_min_v3f64(<3 x double> %x, <3 x double>
; PC64LE9-NEXT: xxswapd 1, 63
; PC64LE9-NEXT: xscpsgndp 2, 63, 63
; PC64LE9-NEXT: lxv 63, 32(1) # 16-byte Folded Reload
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: addi 1, 1, 48
; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0
@@ -6792,26 +6520,18 @@ entry:
define <3 x double> @constrained_vector_ceil_v3f64(<3 x double> %x) #0 {
; PC64LE-LABEL: constrained_vector_ceil_v3f64:
; PC64LE: # %bb.0: # %entry
-; PC64LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 0, 2, 1
; PC64LE-NEXT: xsrdpip 3, 3
; PC64LE-NEXT: xvrdpip 2, 0
; PC64LE-NEXT: xxswapd 1, 2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE-NEXT: blr
;
; PC64LE9-LABEL: constrained_vector_ceil_v3f64:
; PC64LE9: # %bb.0: # %entry
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 0, 2, 1
; PC64LE9-NEXT: xsrdpip 3, 3
; PC64LE9-NEXT: xvrdpip 2, 0
; PC64LE9-NEXT: xxswapd 1, 2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr
entry:
%ceil = call <3 x double> @llvm.experimental.constrained.ceil.v3f64(
@@ -6908,26 +6628,18 @@ entry:
define <3 x double> @constrained_vector_floor_v3f64(<3 x double> %x) #0 {
; PC64LE-LABEL: constrained_vector_floor_v3f64:
; PC64LE: # %bb.0: # %entry
-; PC64LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 0, 2, 1
; PC64LE-NEXT: xsrdpim 3, 3
; PC64LE-NEXT: xvrdpim 2, 0
; PC64LE-NEXT: xxswapd 1, 2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE-NEXT: blr
;
; PC64LE9-LABEL: constrained_vector_floor_v3f64:
; PC64LE9: # %bb.0: # %entry
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 0, 2, 1
; PC64LE9-NEXT: xsrdpim 3, 3
; PC64LE9-NEXT: xvrdpim 2, 0
; PC64LE9-NEXT: xxswapd 1, 2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr
entry:
%floor = call <3 x double> @llvm.experimental.constrained.floor.v3f64(
@@ -7024,26 +6736,18 @@ entry:
define <3 x double> @constrained_vector_round_v3f64(<3 x double> %x) #0 {
; PC64LE-LABEL: constrained_vector_round_v3f64:
; PC64LE: # %bb.0: # %entry
-; PC64LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 0, 2, 1
; PC64LE-NEXT: xsrdpi 3, 3
; PC64LE-NEXT: xvrdpi 2, 0
; PC64LE-NEXT: xxswapd 1, 2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE-NEXT: blr
;
; PC64LE9-LABEL: constrained_vector_round_v3f64:
; PC64LE9: # %bb.0: # %entry
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 0, 2, 1
; PC64LE9-NEXT: xsrdpi 3, 3
; PC64LE9-NEXT: xvrdpi 2, 0
; PC64LE9-NEXT: xxswapd 1, 2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr
entry:
%round = call <3 x double> @llvm.experimental.constrained.round.v3f64(
@@ -7139,26 +6843,18 @@ entry:
define <3 x double> @constrained_vector_trunc_v3f64(<3 x double> %x) #0 {
; PC64LE-LABEL: constrained_vector_trunc_v3f64:
; PC64LE: # %bb.0: # %entry
-; PC64LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 0, 2, 1
; PC64LE-NEXT: xsrdpiz 3, 3
; PC64LE-NEXT: xvrdpiz 2, 0
; PC64LE-NEXT: xxswapd 1, 2
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE-NEXT: blr
;
; PC64LE9-LABEL: constrained_vector_trunc_v3f64:
; PC64LE9: # %bb.0: # %entry
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 def $vsl2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 0, 2, 1
; PC64LE9-NEXT: xsrdpiz 3, 3
; PC64LE9-NEXT: xvrdpiz 2, 0
; PC64LE9-NEXT: xxswapd 1, 2
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr
entry:
%trunc = call <3 x double> @llvm.experimental.constrained.trunc.v3f64(
diff --git a/llvm/test/CodeGen/PowerPC/vsx.ll b/llvm/test/CodeGen/PowerPC/vsx.ll
index 32cbfd6d810ac..359033d85f44a 100644
--- a/llvm/test/CodeGen/PowerPC/vsx.ll
+++ b/llvm/test/CodeGen/PowerPC/vsx.ll
@@ -1993,7 +1993,6 @@ define double @test63(<2 x double> %a) {
; CHECK-LE-LABEL: test63:
; CHECK-LE: # %bb.0:
; CHECK-LE-NEXT: xxswapd vs1, v2
-; CHECK-LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-LE-NEXT: blr
%v = extractelement <2 x double> %a, i32 0
ret double %v
@@ -2006,13 +2005,11 @@ define double @test64(<2 x double> %a) {
; CHECK-LABEL: test64:
; CHECK: # %bb.0:
; CHECK-NEXT: xxswapd vs1, v2
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: blr
;
; CHECK-REG-LABEL: test64:
; CHECK-REG: # %bb.0:
; CHECK-REG-NEXT: xxswapd vs1, v2
-; CHECK-REG-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-REG-NEXT: blr
;
; CHECK-FISL-LABEL: test64:
@@ -2410,7 +2407,6 @@ define <2 x i32> @test80(i32 %v) {
;
; CHECK-FISL-LABEL: test80:
; CHECK-FISL: # %bb.0:
-; CHECK-FISL-NEXT: # kill: def $r3 killed $r3 killed $x3
; CHECK-FISL-NEXT: stw r3, -16(r1)
; CHECK-FISL-NEXT: addi r3, r1, -16
; CHECK-FISL-NEXT: lxvw4x vs0, 0, r3
>From aed89dec0d0dd07a2d45c282f61a2c2db25ed7a8 Mon Sep 17 00:00:00 2001
From: Stefan Pintilie <stefanp at ca.ibm.com>
Date: Thu, 13 Jun 2024 20:29:47 -0500
Subject: [PATCH 07/10] Updated remaining failing test cases.
---
llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll | 2 +-
llvm/test/CodeGen/PowerPC/ldexp.ll | 4 --
.../PowerPC/p10-splatImm-CPload-pcrel.ll | 12 ------
.../PowerPC/p8-scalar_vector_conversions.ll | 6 ---
.../PowerPC/pcrel-call-linkage-leaf.ll | 1 -
llvm/test/CodeGen/PowerPC/select_const.ll | 2 -
llvm/test/CodeGen/PowerPC/toc-float.ll | 2 -
.../PowerPC/variable_elem_vec_extracts.ll | 3 --
llvm/test/CodeGen/PowerPC/vec_insert_elt.ll | 4 --
.../vector-constrained-fp-intrinsics.ll | 12 +++---
llvm/test/CodeGen/PowerPC/vector-llrint.ll | 28 ++++---------
llvm/test/CodeGen/PowerPC/vector-lrint.ll | 28 ++++---------
.../CodeGen/PowerPC/vector-reduce-fadd.ll | 40 -------------------
.../CodeGen/PowerPC/vector-reduce-fmax.ll | 20 ----------
.../CodeGen/PowerPC/vector-reduce-fmin.ll | 20 ----------
.../CodeGen/PowerPC/vector-reduce-fmul.ll | 16 --------
llvm/test/CodeGen/PowerPC/vsx.ll | 1 +
17 files changed, 22 insertions(+), 179 deletions(-)
diff --git a/llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll b/llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll
index 5027f42eb8c13..9d537d89c009d 100644
--- a/llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll
+++ b/llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll
@@ -403,8 +403,8 @@ define void @call_test_byval_mem32_2() #0 {
; CHECK-NEXT: std 0, 48(1)
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 16
-; CHECK-NEXT: addis 3, 2, .LC5 at toc@ha
; CHECK-NEXT: vspltisw 2, 1
+; CHECK-NEXT: addis 3, 2, .LC5 at toc@ha
; CHECK-NEXT: ld 3, .LC5 at toc@l(3)
; CHECK-NEXT: xvcvsxwdp 1, 34
; CHECK-NEXT: ld 7, 24(3)
diff --git a/llvm/test/CodeGen/PowerPC/ldexp.ll b/llvm/test/CodeGen/PowerPC/ldexp.ll
index ed8089b4b303e..151df6096b30b 100644
--- a/llvm/test/CodeGen/PowerPC/ldexp.ll
+++ b/llvm/test/CodeGen/PowerPC/ldexp.ll
@@ -13,7 +13,6 @@ define float @ldexp_f32(i8 zeroext %x) {
; CHECK-NEXT: vspltisw v2, 1
; CHECK-NEXT: mr r4, r3
; CHECK-NEXT: xvcvsxwdp vs1, v2
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: bl ldexpf
; CHECK-NEXT: nop
; CHECK-NEXT: addi r1, r1, 32
@@ -36,7 +35,6 @@ define double @ldexp_f64(i8 zeroext %x) {
; CHECK-NEXT: vspltisw v2, 1
; CHECK-NEXT: mr r4, r3
; CHECK-NEXT: xvcvsxwdp vs1, v2
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: bl ldexp
; CHECK-NEXT: nop
; CHECK-NEXT: addi r1, r1, 32
@@ -120,7 +118,6 @@ define <4 x float> @ldexp_v4f32(<4 x float> %val, <4 x i32> %exp) {
; CHECK-NEXT: vextuwrx r4, r3, v31
; CHECK-NEXT: bl ldexpf
; CHECK-NEXT: nop
-; CHECK-NEXT: # kill: def $f1 killed $f1 def $vsl1
; CHECK-NEXT: xxmrghd vs0, v29, vs1
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: vextuwrx r4, r3, v31
@@ -135,7 +132,6 @@ define <4 x float> @ldexp_v4f32(<4 x float> %val, <4 x i32> %exp) {
; CHECK-NEXT: xscvspdpn f1, vs0
; CHECK-NEXT: bl ldexpf
; CHECK-NEXT: nop
-; CHECK-NEXT: # kill: def $f1 killed $f1 def $vsl1
; CHECK-NEXT: xxmrghd vs0, vs1, v29
; CHECK-NEXT: lxv v31, 80(r1) # 16-byte Folded Reload
; CHECK-NEXT: lxv v30, 64(r1) # 16-byte Folded Reload
diff --git a/llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll b/llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
index 7373a328a4f05..842cb929541cf 100644
--- a/llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
+++ b/llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
@@ -124,21 +124,18 @@ define dso_local double @testDoubleNonRepresentableScalar() local_unnamed_addr {
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: xxsplti32dx vs1, 0, 1081435463
; CHECK-LE-NEXT: xxsplti32dx vs1, 1, -1374389535
-; CHECK-LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-LE-NEXT: blr
;
; CHECK-NOPCREL-BE-LABEL: testDoubleNonRepresentableScalar:
; CHECK-NOPCREL-BE: # %bb.0: # %entry
; CHECK-NOPCREL-BE-NEXT: xxsplti32dx vs1, 0, 1081435463
; CHECK-NOPCREL-BE-NEXT: xxsplti32dx vs1, 1, -1374389535
-; CHECK-NOPCREL-BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NOPCREL-BE-NEXT: blr
;
; CHECK-NOPCREL-LE-LABEL: testDoubleNonRepresentableScalar:
; CHECK-NOPCREL-LE: # %bb.0: # %entry
; CHECK-NOPCREL-LE-NEXT: xxsplti32dx vs1, 0, 1081435463
; CHECK-NOPCREL-LE-NEXT: xxsplti32dx vs1, 1, -1374389535
-; CHECK-NOPCREL-LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NOPCREL-LE-NEXT: blr
;
; CHECK-NOPREFIX-LABEL: testDoubleNonRepresentableScalar:
@@ -151,7 +148,6 @@ define dso_local double @testDoubleNonRepresentableScalar() local_unnamed_addr {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: xxsplti32dx vs1, 0, 1081435463
; CHECK-BE-NEXT: xxsplti32dx vs1, 1, -1374389535
-; CHECK-BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-BE-NEXT: blr
entry:
ret double 3.423300e+02
@@ -162,21 +158,18 @@ define dso_local float @testFloatDenormScalar() local_unnamed_addr {
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: xxsplti32dx vs1, 0, 940259579
; CHECK-LE-NEXT: xxsplti32dx vs1, 1, -2147483648
-; CHECK-LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-LE-NEXT: blr
;
; CHECK-NOPCREL-BE-LABEL: testFloatDenormScalar:
; CHECK-NOPCREL-BE: # %bb.0: # %entry
; CHECK-NOPCREL-BE-NEXT: xxsplti32dx vs1, 0, 940259579
; CHECK-NOPCREL-BE-NEXT: xxsplti32dx vs1, 1, -2147483648
-; CHECK-NOPCREL-BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NOPCREL-BE-NEXT: blr
;
; CHECK-NOPCREL-LE-LABEL: testFloatDenormScalar:
; CHECK-NOPCREL-LE: # %bb.0: # %entry
; CHECK-NOPCREL-LE-NEXT: xxsplti32dx vs1, 0, 940259579
; CHECK-NOPCREL-LE-NEXT: xxsplti32dx vs1, 1, -2147483648
-; CHECK-NOPCREL-LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NOPCREL-LE-NEXT: blr
;
; CHECK-NOPREFIX-LABEL: testFloatDenormScalar:
@@ -189,7 +182,6 @@ define dso_local float @testFloatDenormScalar() local_unnamed_addr {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: xxsplti32dx vs1, 0, 940259579
; CHECK-BE-NEXT: xxsplti32dx vs1, 1, -2147483648
-; CHECK-BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-BE-NEXT: blr
entry:
ret float 0x380B38FB80000000
@@ -200,21 +192,18 @@ define dso_local double @testFloatDenormToDoubleScalar() local_unnamed_addr {
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: xxsplti32dx vs1, 0, 940259579
; CHECK-LE-NEXT: xxsplti32dx vs1, 1, -2147483648
-; CHECK-LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-LE-NEXT: blr
;
; CHECK-NOPCREL-BE-LABEL: testFloatDenormToDoubleScalar:
; CHECK-NOPCREL-BE: # %bb.0: # %entry
; CHECK-NOPCREL-BE-NEXT: xxsplti32dx vs1, 0, 940259579
; CHECK-NOPCREL-BE-NEXT: xxsplti32dx vs1, 1, -2147483648
-; CHECK-NOPCREL-BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NOPCREL-BE-NEXT: blr
;
; CHECK-NOPCREL-LE-LABEL: testFloatDenormToDoubleScalar:
; CHECK-NOPCREL-LE: # %bb.0: # %entry
; CHECK-NOPCREL-LE-NEXT: xxsplti32dx vs1, 0, 940259579
; CHECK-NOPCREL-LE-NEXT: xxsplti32dx vs1, 1, -2147483648
-; CHECK-NOPCREL-LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NOPCREL-LE-NEXT: blr
;
; CHECK-NOPREFIX-LABEL: testFloatDenormToDoubleScalar:
@@ -227,7 +216,6 @@ define dso_local double @testFloatDenormToDoubleScalar() local_unnamed_addr {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: xxsplti32dx vs1, 0, 940259579
; CHECK-BE-NEXT: xxsplti32dx vs1, 1, -2147483648
-; CHECK-BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-BE-NEXT: blr
entry:
ret double 0x380B38FB80000000
diff --git a/llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll b/llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
index 87b8a64cc67bd..8f12b182283f5 100644
--- a/llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
+++ b/llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
@@ -2416,7 +2416,6 @@ define double @getd0(<2 x double> %vd) {
; CHECK-LE-LABEL: getd0:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: xxswapd vs1, v2
-; CHECK-LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-LE-NEXT: blr
;
; CHECK-AIX-LABEL: getd0:
@@ -2435,7 +2434,6 @@ define double @getd1(<2 x double> %vd) {
; CHECK-LABEL: getd1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxswapd vs1, v2
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: blr
;
; CHECK-LE-LABEL: getd1:
@@ -2446,7 +2444,6 @@ define double @getd1(<2 x double> %vd) {
; CHECK-AIX-LABEL: getd1:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: xxswapd 1, 34
-; CHECK-AIX-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-AIX-NEXT: blr
entry:
%vecext = extractelement <2 x double> %vd, i32 1
@@ -2462,7 +2459,6 @@ define double @getveld(<2 x double> %vd, i32 signext %i) {
; CHECK-NEXT: lvsl v3, 0, r3
; CHECK-NEXT: vperm v2, v2, v2, v3
; CHECK-NEXT: xxlor vs1, v2, v2
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: blr
;
; CHECK-LE-LABEL: getveld:
@@ -2474,7 +2470,6 @@ define double @getveld(<2 x double> %vd, i32 signext %i) {
; CHECK-LE-NEXT: lvsl v3, 0, r3
; CHECK-LE-NEXT: vperm v2, v2, v2, v3
; CHECK-LE-NEXT: xxlor vs1, v2, v2
-; CHECK-LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-LE-NEXT: blr
;
; CHECK-AIX-LABEL: getveld:
@@ -2484,7 +2479,6 @@ define double @getveld(<2 x double> %vd, i32 signext %i) {
; CHECK-AIX-NEXT: lvsl 3, 0, 3
; CHECK-AIX-NEXT: vperm 2, 2, 2, 3
; CHECK-AIX-NEXT: xxlor 1, 34, 34
-; CHECK-AIX-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-AIX-NEXT: blr
entry:
%vecext = extractelement <2 x double> %vd, i32 %i
diff --git a/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll b/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll
index 541b2c46dd395..0b1047bb6cfbe 100644
--- a/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll
+++ b/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll
@@ -175,7 +175,6 @@ define dso_local double @UsesX2AsConstPoolTOC() local_unnamed_addr {
; CHECK-ALL: # %bb.0: # %entry
; CHECK-S-NEXT: xxsplti32dx vs1, 0, 1078011044
; CHECK-S-NEXT: xxsplti32dx vs1, 1, -337824948
-; CHECK-S-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-S-NEXT: blr
entry:
ret double 0x404124A4EBDD334C
diff --git a/llvm/test/CodeGen/PowerPC/select_const.ll b/llvm/test/CodeGen/PowerPC/select_const.ll
index ca4be83cc16ac..a48d6968aafbf 100644
--- a/llvm/test/CodeGen/PowerPC/select_const.ll
+++ b/llvm/test/CodeGen/PowerPC/select_const.ll
@@ -845,12 +845,10 @@ define double @sel_constants_frem_constant(i1 %cond) {
; ALL-NEXT: # %bb.1:
; ALL-NEXT: addis 3, 2, .LCPI48_0 at toc@ha
; ALL-NEXT: lfd 1, .LCPI48_0 at toc@l(3)
-; ALL-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; ALL-NEXT: blr
; ALL-NEXT: .LBB48_2:
; ALL-NEXT: vspltisw 2, -4
; ALL-NEXT: xvcvsxwdp 1, 34
-; ALL-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; ALL-NEXT: blr
%sel = select i1 %cond, double -4.0, double 23.3
%bo = frem double %sel, 5.1
diff --git a/llvm/test/CodeGen/PowerPC/toc-float.ll b/llvm/test/CodeGen/PowerPC/toc-float.ll
index 1d6f1f71a2383..943edd5948429 100644
--- a/llvm/test/CodeGen/PowerPC/toc-float.ll
+++ b/llvm/test/CodeGen/PowerPC/toc-float.ll
@@ -9,14 +9,12 @@ define double @doubleConstant1() {
; CHECK-P9: # %bb.0:
; CHECK-P9-NEXT: vspltisw 2, 14
; CHECK-P9-NEXT: xvcvsxwdp 1, 34
-; CHECK-P9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: doubleConstant1:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: vspltisw 2, 14
; CHECK-P8-NEXT: xvcvsxwdp 1, 34
-; CHECK-P8-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-P8-NEXT: blr
ret double 1.400000e+01
}
diff --git a/llvm/test/CodeGen/PowerPC/variable_elem_vec_extracts.ll b/llvm/test/CodeGen/PowerPC/variable_elem_vec_extracts.ll
index 49c80a91f8f99..d0dda1a071754 100644
--- a/llvm/test/CodeGen/PowerPC/variable_elem_vec_extracts.ll
+++ b/llvm/test/CodeGen/PowerPC/variable_elem_vec_extracts.ll
@@ -122,7 +122,6 @@ define double @getd(<2 x double> %a, i32 zeroext %b) {
; CHECK-NEXT: lvsl 3, 0, 3
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: xxlor 1, 34, 34
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: blr
;
; CHECK-BE-LABEL: getd:
@@ -132,7 +131,6 @@ define double @getd(<2 x double> %a, i32 zeroext %b) {
; CHECK-BE-NEXT: lvsl 3, 0, 3
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: xxlor 1, 34, 34
-; CHECK-BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-BE-NEXT: blr
;
; CHECK-P7-LABEL: getd:
@@ -142,7 +140,6 @@ define double @getd(<2 x double> %a, i32 zeroext %b) {
; CHECK-P7-NEXT: lvsl 3, 0, 3
; CHECK-P7-NEXT: vperm 2, 2, 2, 3
; CHECK-P7-NEXT: xxlor 1, 34, 34
-; CHECK-P7-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-P7-NEXT: blr
entry:
%vecext = extractelement <2 x double> %a, i32 %b
diff --git a/llvm/test/CodeGen/PowerPC/vec_insert_elt.ll b/llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
index b98aed8616509..291a9c1f978da 100644
--- a/llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
@@ -940,25 +940,21 @@ entry:
define <2 x double> @testDoubleImm1(<2 x double> %a, double %b) {
; CHECK-LABEL: testDoubleImm1:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: # kill: def $f1 killed $f1 def $vsl1
; CHECK-NEXT: xxmrghd v2, v2, vs1
; CHECK-NEXT: blr
;
; CHECK-BE-LABEL: testDoubleImm1:
; CHECK-BE: # %bb.0: # %entry
-; CHECK-BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; CHECK-BE-NEXT: xxpermdi v2, vs1, v2, 1
; CHECK-BE-NEXT: blr
;
; CHECK-P9-LABEL: testDoubleImm1:
; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; CHECK-P9-NEXT: xxpermdi v2, vs1, v2, 1
; CHECK-P9-NEXT: blr
;
; AIX-P8-LABEL: testDoubleImm1:
; AIX-P8: # %bb.0: # %entry
-; AIX-P8-NEXT: # kill: def $f1 killed $f1 def $vsl1
; AIX-P8-NEXT: xxpermdi v2, vs1, v2, 1
; AIX-P8-NEXT: blr
entry:
diff --git a/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll b/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
index cc80b1de2943d..a2b7440995a27 100644
--- a/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
+++ b/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
@@ -1612,9 +1612,9 @@ define <2 x double> @constrained_vector_powi_v2f64(<2 x double> %x, i32 %y) #0 {
; PC64LE-NEXT: xxlor 1, 63, 63
; PC64LE-NEXT: bl __powidf2
; PC64LE-NEXT: nop
-; PC64LE-NEXT: mr 4, 30
; PC64LE-NEXT: xxlor 62, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
+; PC64LE-NEXT: mr 4, 30
; PC64LE-NEXT: bl __powidf2
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 64
@@ -1642,9 +1642,9 @@ define <2 x double> @constrained_vector_powi_v2f64(<2 x double> %x, i32 %y) #0 {
; PC64LE9-NEXT: mr 4, 30
; PC64LE9-NEXT: bl __powidf2
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: mr 4, 30
; PC64LE9-NEXT: xscpsgndp 62, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
+; PC64LE9-NEXT: mr 4, 30
; PC64LE9-NEXT: bl __powidf2
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xxmrghd 34, 62, 1
@@ -1873,9 +1873,9 @@ define <4 x double> @constrained_vector_powi_v4f64(<4 x double> %x, i32 %y) #0 {
; PC64LE-NEXT: vmr 31, 3
; PC64LE-NEXT: bl __powidf2
; PC64LE-NEXT: nop
-; PC64LE-NEXT: mr 4, 30
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 62
+; PC64LE-NEXT: mr 4, 30
; PC64LE-NEXT: bl __powidf2
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxmrghd 62, 61, 1
@@ -1883,9 +1883,9 @@ define <4 x double> @constrained_vector_powi_v4f64(<4 x double> %x, i32 %y) #0 {
; PC64LE-NEXT: mr 4, 30
; PC64LE-NEXT: bl __powidf2
; PC64LE-NEXT: nop
-; PC64LE-NEXT: mr 4, 30
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
+; PC64LE-NEXT: mr 4, 30
; PC64LE-NEXT: bl __powidf2
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 80
@@ -1918,9 +1918,9 @@ define <4 x double> @constrained_vector_powi_v4f64(<4 x double> %x, i32 %y) #0 {
; PC64LE9-NEXT: vmr 31, 3
; PC64LE9-NEXT: bl __powidf2
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: mr 4, 30
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 62
+; PC64LE9-NEXT: mr 4, 30
; PC64LE9-NEXT: bl __powidf2
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xxmrghd 62, 61, 1
@@ -1928,9 +1928,9 @@ define <4 x double> @constrained_vector_powi_v4f64(<4 x double> %x, i32 %y) #0 {
; PC64LE9-NEXT: mr 4, 30
; PC64LE9-NEXT: bl __powidf2
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: mr 4, 30
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
+; PC64LE9-NEXT: mr 4, 30
; PC64LE9-NEXT: bl __powidf2
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xxmrghd 35, 61, 1
diff --git a/llvm/test/CodeGen/PowerPC/vector-llrint.ll b/llvm/test/CodeGen/PowerPC/vector-llrint.ll
index 4321b213b631c..190cf6fe1eaad 100644
--- a/llvm/test/CodeGen/PowerPC/vector-llrint.ll
+++ b/llvm/test/CodeGen/PowerPC/vector-llrint.ll
@@ -4465,9 +4465,8 @@ define <2 x i64> @llrint_v2i64_v2f64(<2 x double> %x) {
; BE-NEXT: xxlor f1, v31, v31
; BE-NEXT: bl llrint
; BE-NEXT: nop
-; BE-NEXT: std r3, 128(r1)
; BE-NEXT: xxswapd vs1, v31
-; BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
+; BE-NEXT: std r3, 128(r1)
; BE-NEXT: bl llrint
; BE-NEXT: nop
; BE-NEXT: std r3, 136(r1)
@@ -4496,7 +4495,6 @@ define <2 x i64> @llrint_v2i64_v2f64(<2 x double> %x) {
; CHECK-NEXT: nop
; CHECK-NEXT: xxswapd vs1, v31
; CHECK-NEXT: mtvsrd v31, r3
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: bl llrint
; CHECK-NEXT: nop
; CHECK-NEXT: mtfprd f0, r3
@@ -4544,18 +4542,16 @@ define <4 x i64> @llrint_v4i64_v4f64(<4 x double> %x) {
; BE-NEXT: vmr v31, v3
; BE-NEXT: bl llrint
; BE-NEXT: nop
-; BE-NEXT: std r3, 128(r1)
; BE-NEXT: xxswapd vs1, v30
-; BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
+; BE-NEXT: std r3, 128(r1)
; BE-NEXT: bl llrint
; BE-NEXT: nop
; BE-NEXT: xxlor f1, v31, v31
; BE-NEXT: std r3, 136(r1)
; BE-NEXT: bl llrint
; BE-NEXT: nop
-; BE-NEXT: std r3, 144(r1)
; BE-NEXT: xxswapd vs1, v31
-; BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
+; BE-NEXT: std r3, 144(r1)
; BE-NEXT: bl llrint
; BE-NEXT: nop
; BE-NEXT: std r3, 152(r1)
@@ -4592,7 +4588,6 @@ define <4 x i64> @llrint_v4i64_v4f64(<4 x double> %x) {
; CHECK-NEXT: nop
; CHECK-NEXT: xxswapd vs1, v30
; CHECK-NEXT: mtvsrd v30, r3
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: bl llrint
; CHECK-NEXT: nop
; CHECK-NEXT: mtfprd f0, r3
@@ -4602,7 +4597,6 @@ define <4 x i64> @llrint_v4i64_v4f64(<4 x double> %x) {
; CHECK-NEXT: nop
; CHECK-NEXT: xxswapd vs1, v31
; CHECK-NEXT: mtvsrd v31, r3
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: bl llrint
; CHECK-NEXT: nop
; CHECK-NEXT: mtfprd f0, r3
@@ -4670,36 +4664,32 @@ define <8 x i64> @llrint_v8i64_v8f64(<8 x double> %x) {
; BE-NEXT: vmr v31, v5
; BE-NEXT: bl llrint
; BE-NEXT: nop
-; BE-NEXT: std r3, 128(r1)
; BE-NEXT: xxswapd vs1, v28
-; BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
+; BE-NEXT: std r3, 128(r1)
; BE-NEXT: bl llrint
; BE-NEXT: nop
; BE-NEXT: xxlor f1, v29, v29
; BE-NEXT: std r3, 136(r1)
; BE-NEXT: bl llrint
; BE-NEXT: nop
-; BE-NEXT: std r3, 144(r1)
; BE-NEXT: xxswapd vs1, v29
-; BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
+; BE-NEXT: std r3, 144(r1)
; BE-NEXT: bl llrint
; BE-NEXT: nop
; BE-NEXT: xxlor f1, v30, v30
; BE-NEXT: std r3, 152(r1)
; BE-NEXT: bl llrint
; BE-NEXT: nop
-; BE-NEXT: std r3, 160(r1)
; BE-NEXT: xxswapd vs1, v30
-; BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
+; BE-NEXT: std r3, 160(r1)
; BE-NEXT: bl llrint
; BE-NEXT: nop
; BE-NEXT: xxlor f1, v31, v31
; BE-NEXT: std r3, 168(r1)
; BE-NEXT: bl llrint
; BE-NEXT: nop
-; BE-NEXT: std r3, 176(r1)
; BE-NEXT: xxswapd vs1, v31
-; BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
+; BE-NEXT: std r3, 176(r1)
; BE-NEXT: bl llrint
; BE-NEXT: nop
; BE-NEXT: std r3, 184(r1)
@@ -4752,7 +4742,6 @@ define <8 x i64> @llrint_v8i64_v8f64(<8 x double> %x) {
; CHECK-NEXT: nop
; CHECK-NEXT: xxswapd vs1, v28
; CHECK-NEXT: mtvsrd v28, r3
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: bl llrint
; CHECK-NEXT: nop
; CHECK-NEXT: mtfprd f0, r3
@@ -4762,7 +4751,6 @@ define <8 x i64> @llrint_v8i64_v8f64(<8 x double> %x) {
; CHECK-NEXT: nop
; CHECK-NEXT: xxswapd vs1, v29
; CHECK-NEXT: mtvsrd v29, r3
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: bl llrint
; CHECK-NEXT: nop
; CHECK-NEXT: mtfprd f0, r3
@@ -4772,7 +4760,6 @@ define <8 x i64> @llrint_v8i64_v8f64(<8 x double> %x) {
; CHECK-NEXT: nop
; CHECK-NEXT: xxswapd vs1, v30
; CHECK-NEXT: mtvsrd v30, r3
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: bl llrint
; CHECK-NEXT: nop
; CHECK-NEXT: mtfprd f0, r3
@@ -4782,7 +4769,6 @@ define <8 x i64> @llrint_v8i64_v8f64(<8 x double> %x) {
; CHECK-NEXT: nop
; CHECK-NEXT: xxswapd vs1, v31
; CHECK-NEXT: mtvsrd v31, r3
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: bl llrint
; CHECK-NEXT: nop
; CHECK-NEXT: mtfprd f0, r3
diff --git a/llvm/test/CodeGen/PowerPC/vector-lrint.ll b/llvm/test/CodeGen/PowerPC/vector-lrint.ll
index 9667a26120149..b6d0bd5c05894 100644
--- a/llvm/test/CodeGen/PowerPC/vector-lrint.ll
+++ b/llvm/test/CodeGen/PowerPC/vector-lrint.ll
@@ -4476,9 +4476,8 @@ define <2 x i64> @lrint_v2f64(<2 x double> %x) {
; BE-NEXT: xxlor f1, v31, v31
; BE-NEXT: bl lrint
; BE-NEXT: nop
-; BE-NEXT: std r3, 128(r1)
; BE-NEXT: xxswapd vs1, v31
-; BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
+; BE-NEXT: std r3, 128(r1)
; BE-NEXT: bl lrint
; BE-NEXT: nop
; BE-NEXT: std r3, 136(r1)
@@ -4507,7 +4506,6 @@ define <2 x i64> @lrint_v2f64(<2 x double> %x) {
; CHECK-NEXT: nop
; CHECK-NEXT: xxswapd vs1, v31
; CHECK-NEXT: mtvsrd v31, r3
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: bl lrint
; CHECK-NEXT: nop
; CHECK-NEXT: mtfprd f0, r3
@@ -4555,18 +4553,16 @@ define <4 x i64> @lrint_v4f64(<4 x double> %x) {
; BE-NEXT: vmr v31, v3
; BE-NEXT: bl lrint
; BE-NEXT: nop
-; BE-NEXT: std r3, 128(r1)
; BE-NEXT: xxswapd vs1, v30
-; BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
+; BE-NEXT: std r3, 128(r1)
; BE-NEXT: bl lrint
; BE-NEXT: nop
; BE-NEXT: xxlor f1, v31, v31
; BE-NEXT: std r3, 136(r1)
; BE-NEXT: bl lrint
; BE-NEXT: nop
-; BE-NEXT: std r3, 144(r1)
; BE-NEXT: xxswapd vs1, v31
-; BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
+; BE-NEXT: std r3, 144(r1)
; BE-NEXT: bl lrint
; BE-NEXT: nop
; BE-NEXT: std r3, 152(r1)
@@ -4603,7 +4599,6 @@ define <4 x i64> @lrint_v4f64(<4 x double> %x) {
; CHECK-NEXT: nop
; CHECK-NEXT: xxswapd vs1, v30
; CHECK-NEXT: mtvsrd v30, r3
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: bl lrint
; CHECK-NEXT: nop
; CHECK-NEXT: mtfprd f0, r3
@@ -4613,7 +4608,6 @@ define <4 x i64> @lrint_v4f64(<4 x double> %x) {
; CHECK-NEXT: nop
; CHECK-NEXT: xxswapd vs1, v31
; CHECK-NEXT: mtvsrd v31, r3
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: bl lrint
; CHECK-NEXT: nop
; CHECK-NEXT: mtfprd f0, r3
@@ -4681,36 +4675,32 @@ define <8 x i64> @lrint_v8f64(<8 x double> %x) {
; BE-NEXT: vmr v31, v5
; BE-NEXT: bl lrint
; BE-NEXT: nop
-; BE-NEXT: std r3, 128(r1)
; BE-NEXT: xxswapd vs1, v28
-; BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
+; BE-NEXT: std r3, 128(r1)
; BE-NEXT: bl lrint
; BE-NEXT: nop
; BE-NEXT: xxlor f1, v29, v29
; BE-NEXT: std r3, 136(r1)
; BE-NEXT: bl lrint
; BE-NEXT: nop
-; BE-NEXT: std r3, 144(r1)
; BE-NEXT: xxswapd vs1, v29
-; BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
+; BE-NEXT: std r3, 144(r1)
; BE-NEXT: bl lrint
; BE-NEXT: nop
; BE-NEXT: xxlor f1, v30, v30
; BE-NEXT: std r3, 152(r1)
; BE-NEXT: bl lrint
; BE-NEXT: nop
-; BE-NEXT: std r3, 160(r1)
; BE-NEXT: xxswapd vs1, v30
-; BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
+; BE-NEXT: std r3, 160(r1)
; BE-NEXT: bl lrint
; BE-NEXT: nop
; BE-NEXT: xxlor f1, v31, v31
; BE-NEXT: std r3, 168(r1)
; BE-NEXT: bl lrint
; BE-NEXT: nop
-; BE-NEXT: std r3, 176(r1)
; BE-NEXT: xxswapd vs1, v31
-; BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
+; BE-NEXT: std r3, 176(r1)
; BE-NEXT: bl lrint
; BE-NEXT: nop
; BE-NEXT: std r3, 184(r1)
@@ -4763,7 +4753,6 @@ define <8 x i64> @lrint_v8f64(<8 x double> %x) {
; CHECK-NEXT: nop
; CHECK-NEXT: xxswapd vs1, v28
; CHECK-NEXT: mtvsrd v28, r3
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: bl lrint
; CHECK-NEXT: nop
; CHECK-NEXT: mtfprd f0, r3
@@ -4773,7 +4762,6 @@ define <8 x i64> @lrint_v8f64(<8 x double> %x) {
; CHECK-NEXT: nop
; CHECK-NEXT: xxswapd vs1, v29
; CHECK-NEXT: mtvsrd v29, r3
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: bl lrint
; CHECK-NEXT: nop
; CHECK-NEXT: mtfprd f0, r3
@@ -4783,7 +4771,6 @@ define <8 x i64> @lrint_v8f64(<8 x double> %x) {
; CHECK-NEXT: nop
; CHECK-NEXT: xxswapd vs1, v30
; CHECK-NEXT: mtvsrd v30, r3
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: bl lrint
; CHECK-NEXT: nop
; CHECK-NEXT: mtfprd f0, r3
@@ -4793,7 +4780,6 @@ define <8 x i64> @lrint_v8f64(<8 x double> %x) {
; CHECK-NEXT: nop
; CHECK-NEXT: xxswapd vs1, v31
; CHECK-NEXT: mtvsrd v31, r3
-; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: bl lrint
; CHECK-NEXT: nop
; CHECK-NEXT: mtfprd f0, r3
diff --git a/llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll b/llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll
index edd3fb7b1754b..4a036a7868c1a 100644
--- a/llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll
+++ b/llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll
@@ -1081,14 +1081,12 @@ define dso_local double @v2f64_fast(<2 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs0, v2
; PWR9LE-NEXT: xvadddp vs0, v2, vs0
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v2f64_fast:
; PWR9BE: # %bb.0: # %entry
; PWR9BE-NEXT: xxswapd vs0, v2
; PWR9BE-NEXT: xvadddp vs1, v2, vs0
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v2f64_fast:
@@ -1096,14 +1094,12 @@ define dso_local double @v2f64_fast(<2 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs0, v2
; PWR10LE-NEXT: xvadddp vs0, v2, vs0
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v2f64_fast:
; PWR10BE: # %bb.0: # %entry
; PWR10BE-NEXT: xxswapd vs0, v2
; PWR10BE-NEXT: xvadddp vs1, v2, vs0
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fadd.v2f64(double -0.000000e+00, <2 x double> %a)
@@ -1203,7 +1199,6 @@ define dso_local double @v4f64_fast(<4 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs1, vs0
; PWR9LE-NEXT: xvadddp vs0, vs0, vs1
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v4f64_fast:
@@ -1211,7 +1206,6 @@ define dso_local double @v4f64_fast(<4 x double> %a) local_unnamed_addr #0 {
; PWR9BE-NEXT: xvadddp vs0, v2, v3
; PWR9BE-NEXT: xxswapd vs1, vs0
; PWR9BE-NEXT: xvadddp vs1, vs0, vs1
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v4f64_fast:
@@ -1220,7 +1214,6 @@ define dso_local double @v4f64_fast(<4 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs1, vs0
; PWR10LE-NEXT: xvadddp vs0, vs0, vs1
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v4f64_fast:
@@ -1228,7 +1221,6 @@ define dso_local double @v4f64_fast(<4 x double> %a) local_unnamed_addr #0 {
; PWR10BE-NEXT: xvadddp vs0, v2, v3
; PWR10BE-NEXT: xxswapd vs1, vs0
; PWR10BE-NEXT: xvadddp vs1, vs0, vs1
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fadd.v4f64(double -0.000000e+00, <4 x double> %a)
@@ -1378,7 +1370,6 @@ define dso_local double @v8f64_fast(<8 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs1, vs0
; PWR9LE-NEXT: xvadddp vs0, vs0, vs1
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v8f64_fast:
@@ -1388,7 +1379,6 @@ define dso_local double @v8f64_fast(<8 x double> %a) local_unnamed_addr #0 {
; PWR9BE-NEXT: xvadddp vs0, vs1, vs0
; PWR9BE-NEXT: xxswapd vs1, vs0
; PWR9BE-NEXT: xvadddp vs1, vs0, vs1
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v8f64_fast:
@@ -1399,7 +1389,6 @@ define dso_local double @v8f64_fast(<8 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs1, vs0
; PWR10LE-NEXT: xvadddp vs0, vs0, vs1
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v8f64_fast:
@@ -1409,7 +1398,6 @@ define dso_local double @v8f64_fast(<8 x double> %a) local_unnamed_addr #0 {
; PWR10BE-NEXT: xvadddp vs0, vs1, vs0
; PWR10BE-NEXT: xxswapd vs1, vs0
; PWR10BE-NEXT: xvadddp vs1, vs0, vs1
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fadd.v8f64(double -0.000000e+00, <8 x double> %a)
@@ -1659,7 +1647,6 @@ define dso_local double @v16f64_fast(<16 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs1, vs0
; PWR9LE-NEXT: xvadddp vs0, vs0, vs1
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v16f64_fast:
@@ -1673,7 +1660,6 @@ define dso_local double @v16f64_fast(<16 x double> %a) local_unnamed_addr #0 {
; PWR9BE-NEXT: xvadddp vs0, vs0, vs2
; PWR9BE-NEXT: xxswapd vs1, vs0
; PWR9BE-NEXT: xvadddp vs1, vs0, vs1
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v16f64_fast:
@@ -1688,7 +1674,6 @@ define dso_local double @v16f64_fast(<16 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs1, vs0
; PWR10LE-NEXT: xvadddp vs0, vs0, vs1
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v16f64_fast:
@@ -1702,7 +1687,6 @@ define dso_local double @v16f64_fast(<16 x double> %a) local_unnamed_addr #0 {
; PWR10BE-NEXT: xvadddp vs0, vs0, vs2
; PWR10BE-NEXT: xxswapd vs1, vs0
; PWR10BE-NEXT: xvadddp vs1, vs0, vs1
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fadd.v16f64(double -0.000000e+00, <16 x double> %a)
@@ -2188,7 +2172,6 @@ define dso_local double @v32f64_fast(<32 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs1, vs0
; PWR9LE-NEXT: xvadddp vs0, vs0, vs1
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v32f64_fast:
@@ -2214,7 +2197,6 @@ define dso_local double @v32f64_fast(<32 x double> %a) local_unnamed_addr #0 {
; PWR9BE-NEXT: xvadddp vs0, vs0, vs2
; PWR9BE-NEXT: xxswapd vs1, vs0
; PWR9BE-NEXT: xvadddp vs1, vs0, vs1
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v32f64_fast:
@@ -2241,7 +2223,6 @@ define dso_local double @v32f64_fast(<32 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs1, vs0
; PWR10LE-NEXT: xvadddp vs0, vs0, vs1
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v32f64_fast:
@@ -2267,7 +2248,6 @@ define dso_local double @v32f64_fast(<32 x double> %a) local_unnamed_addr #0 {
; PWR10BE-NEXT: xvadddp vs0, vs0, vs2
; PWR10BE-NEXT: xxswapd vs1, vs0
; PWR10BE-NEXT: xvadddp vs1, vs0, vs1
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fadd.v32f64(double -0.000000e+00, <32 x double> %a)
@@ -3297,7 +3277,6 @@ define dso_local double @v64f64_fast(<64 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs1, vs0
; PWR9LE-NEXT: xvadddp vs0, vs0, vs1
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v64f64_fast:
@@ -3355,7 +3334,6 @@ define dso_local double @v64f64_fast(<64 x double> %a) local_unnamed_addr #0 {
; PWR9BE-NEXT: xvadddp vs0, vs1, vs0
; PWR9BE-NEXT: xxswapd vs1, vs0
; PWR9BE-NEXT: xvadddp vs1, vs0, vs1
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v64f64_fast:
@@ -3414,7 +3392,6 @@ define dso_local double @v64f64_fast(<64 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs1, vs0
; PWR10LE-NEXT: xvadddp vs0, vs0, vs1
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v64f64_fast:
@@ -3472,7 +3449,6 @@ define dso_local double @v64f64_fast(<64 x double> %a) local_unnamed_addr #0 {
; PWR10BE-NEXT: xvadddp vs0, vs1, vs0
; PWR10BE-NEXT: xxswapd vs1, vs0
; PWR10BE-NEXT: xvadddp vs1, vs0, vs1
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fadd.v64f64(double -0.000000e+00, <64 x double> %a)
@@ -3660,8 +3636,6 @@ define dso_local ppc_fp128 @v2ppcf128_fast(<2 x ppc_fp128> %a) local_unnamed_add
; PWR9LE-NEXT: stfd f1, 32(r1)
; PWR9LE-NEXT: lxv vs1, 32(r1)
; PWR9LE-NEXT: xxswapd vs2, vs1
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PWR9LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PWR9LE-NEXT: addi r1, r1, 64
; PWR9LE-NEXT: ld r0, 16(r1)
; PWR9LE-NEXT: mtlr r0
@@ -3678,8 +3652,6 @@ define dso_local ppc_fp128 @v2ppcf128_fast(<2 x ppc_fp128> %a) local_unnamed_add
; PWR9BE-NEXT: stfd f1, 112(r1)
; PWR9BE-NEXT: lxv vs1, 112(r1)
; PWR9BE-NEXT: xxswapd vs2, vs1
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PWR9BE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PWR9BE-NEXT: addi r1, r1, 144
; PWR9BE-NEXT: ld r0, 16(r1)
; PWR9BE-NEXT: mtlr r0
@@ -3695,8 +3667,6 @@ define dso_local ppc_fp128 @v2ppcf128_fast(<2 x ppc_fp128> %a) local_unnamed_add
; PWR10LE-NEXT: stfd f1, 32(r1)
; PWR10LE-NEXT: lxv vs1, 32(r1)
; PWR10LE-NEXT: xxswapd vs2, vs1
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PWR10LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PWR10LE-NEXT: addi r1, r1, 64
; PWR10LE-NEXT: ld r0, 16(r1)
; PWR10LE-NEXT: mtlr r0
@@ -3713,8 +3683,6 @@ define dso_local ppc_fp128 @v2ppcf128_fast(<2 x ppc_fp128> %a) local_unnamed_add
; PWR10BE-NEXT: stfd f1, 112(r1)
; PWR10BE-NEXT: lxv vs1, 112(r1)
; PWR10BE-NEXT: xxswapd vs2, vs1
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PWR10BE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PWR10BE-NEXT: addi r1, r1, 144
; PWR10BE-NEXT: ld r0, 16(r1)
; PWR10BE-NEXT: mtlr r0
@@ -4077,8 +4045,6 @@ define dso_local ppc_fp128 @v4ppcf128_fast(<4 x ppc_fp128> %a) local_unnamed_add
; PWR9LE-NEXT: stfd f1, 32(r1)
; PWR9LE-NEXT: lxv vs1, 32(r1)
; PWR9LE-NEXT: xxswapd vs2, vs1
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PWR9LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PWR9LE-NEXT: addi r1, r1, 96
; PWR9LE-NEXT: ld r0, 16(r1)
; PWR9LE-NEXT: lfd f31, -8(r1) # 8-byte Folded Reload
@@ -4133,8 +4099,6 @@ define dso_local ppc_fp128 @v4ppcf128_fast(<4 x ppc_fp128> %a) local_unnamed_add
; PWR9BE-NEXT: lfd f28, 144(r1) # 8-byte Folded Reload
; PWR9BE-NEXT: lfd f27, 136(r1) # 8-byte Folded Reload
; PWR9BE-NEXT: lfd f26, 128(r1) # 8-byte Folded Reload
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PWR9BE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PWR9BE-NEXT: addi r1, r1, 176
; PWR9BE-NEXT: ld r0, 16(r1)
; PWR9BE-NEXT: mtlr r0
@@ -4174,8 +4138,6 @@ define dso_local ppc_fp128 @v4ppcf128_fast(<4 x ppc_fp128> %a) local_unnamed_add
; PWR10LE-NEXT: stfd f1, 32(r1)
; PWR10LE-NEXT: lxv vs1, 32(r1)
; PWR10LE-NEXT: xxswapd vs2, vs1
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PWR10LE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PWR10LE-NEXT: addi r1, r1, 96
; PWR10LE-NEXT: ld r0, 16(r1)
; PWR10LE-NEXT: lfd f31, -8(r1) # 8-byte Folded Reload
@@ -4230,8 +4192,6 @@ define dso_local ppc_fp128 @v4ppcf128_fast(<4 x ppc_fp128> %a) local_unnamed_add
; PWR10BE-NEXT: lfd f26, 128(r1) # 8-byte Folded Reload
; PWR10BE-NEXT: lxv vs1, 112(r1)
; PWR10BE-NEXT: xxswapd vs2, vs1
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
-; PWR10BE-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PWR10BE-NEXT: addi r1, r1, 176
; PWR10BE-NEXT: ld r0, 16(r1)
; PWR10BE-NEXT: mtlr r0
diff --git a/llvm/test/CodeGen/PowerPC/vector-reduce-fmax.ll b/llvm/test/CodeGen/PowerPC/vector-reduce-fmax.ll
index b1f72f694aea5..7d024144b7c32 100644
--- a/llvm/test/CodeGen/PowerPC/vector-reduce-fmax.ll
+++ b/llvm/test/CodeGen/PowerPC/vector-reduce-fmax.ll
@@ -635,14 +635,12 @@ define dso_local double @v2f64_fast(<2 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs0, v2
; PWR9LE-NEXT: xvmaxdp vs0, v2, vs0
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v2f64_fast:
; PWR9BE: # %bb.0: # %entry
; PWR9BE-NEXT: xxswapd vs0, v2
; PWR9BE-NEXT: xvmaxdp vs1, v2, vs0
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v2f64_fast:
@@ -650,14 +648,12 @@ define dso_local double @v2f64_fast(<2 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs0, v2
; PWR10LE-NEXT: xvmaxdp vs0, v2, vs0
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v2f64_fast:
; PWR10BE: # %bb.0: # %entry
; PWR10BE-NEXT: xxswapd vs0, v2
; PWR10BE-NEXT: xvmaxdp vs1, v2, vs0
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fmax.v2f64(<2 x double> %a)
@@ -704,7 +700,6 @@ define dso_local double @v4f64_fast(<4 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs1, vs0
; PWR9LE-NEXT: xvmaxdp vs0, vs0, vs1
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v4f64_fast:
@@ -712,7 +707,6 @@ define dso_local double @v4f64_fast(<4 x double> %a) local_unnamed_addr #0 {
; PWR9BE-NEXT: xvmaxdp vs0, v2, v3
; PWR9BE-NEXT: xxswapd vs1, vs0
; PWR9BE-NEXT: xvmaxdp vs1, vs0, vs1
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v4f64_fast:
@@ -721,7 +715,6 @@ define dso_local double @v4f64_fast(<4 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs1, vs0
; PWR10LE-NEXT: xvmaxdp vs0, vs0, vs1
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v4f64_fast:
@@ -729,7 +722,6 @@ define dso_local double @v4f64_fast(<4 x double> %a) local_unnamed_addr #0 {
; PWR10BE-NEXT: xvmaxdp vs0, v2, v3
; PWR10BE-NEXT: xxswapd vs1, vs0
; PWR10BE-NEXT: xvmaxdp vs1, vs0, vs1
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fmax.v4f64(<4 x double> %a)
@@ -786,7 +778,6 @@ define dso_local double @v8f64_fast(<8 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs1, vs0
; PWR9LE-NEXT: xvmaxdp vs0, vs0, vs1
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v8f64_fast:
@@ -796,7 +787,6 @@ define dso_local double @v8f64_fast(<8 x double> %a) local_unnamed_addr #0 {
; PWR9BE-NEXT: xvmaxdp vs0, vs1, vs0
; PWR9BE-NEXT: xxswapd vs1, vs0
; PWR9BE-NEXT: xvmaxdp vs1, vs0, vs1
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v8f64_fast:
@@ -807,7 +797,6 @@ define dso_local double @v8f64_fast(<8 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs1, vs0
; PWR10LE-NEXT: xvmaxdp vs0, vs0, vs1
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v8f64_fast:
@@ -817,7 +806,6 @@ define dso_local double @v8f64_fast(<8 x double> %a) local_unnamed_addr #0 {
; PWR10BE-NEXT: xvmaxdp vs0, vs1, vs0
; PWR10BE-NEXT: xxswapd vs1, vs0
; PWR10BE-NEXT: xvmaxdp vs1, vs0, vs1
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fmax.v8f64(<8 x double> %a)
@@ -894,7 +882,6 @@ define dso_local double @v16f64_fast(<16 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs1, vs0
; PWR9LE-NEXT: xvmaxdp vs0, vs0, vs1
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v16f64_fast:
@@ -908,7 +895,6 @@ define dso_local double @v16f64_fast(<16 x double> %a) local_unnamed_addr #0 {
; PWR9BE-NEXT: xvmaxdp vs0, vs0, vs2
; PWR9BE-NEXT: xxswapd vs1, vs0
; PWR9BE-NEXT: xvmaxdp vs1, vs0, vs1
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v16f64_fast:
@@ -923,7 +909,6 @@ define dso_local double @v16f64_fast(<16 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs1, vs0
; PWR10LE-NEXT: xvmaxdp vs0, vs0, vs1
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v16f64_fast:
@@ -937,7 +922,6 @@ define dso_local double @v16f64_fast(<16 x double> %a) local_unnamed_addr #0 {
; PWR10BE-NEXT: xvmaxdp vs0, vs0, vs2
; PWR10BE-NEXT: xxswapd vs1, vs0
; PWR10BE-NEXT: xvmaxdp vs1, vs0, vs1
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fmax.v16f64(<16 x double> %a)
@@ -1074,7 +1058,6 @@ define dso_local double @v32f64_fast(<32 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs1, vs0
; PWR9LE-NEXT: xvmaxdp vs0, vs0, vs1
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v32f64_fast:
@@ -1100,7 +1083,6 @@ define dso_local double @v32f64_fast(<32 x double> %a) local_unnamed_addr #0 {
; PWR9BE-NEXT: xvmaxdp vs0, vs0, vs2
; PWR9BE-NEXT: xxswapd vs1, vs0
; PWR9BE-NEXT: xvmaxdp vs1, vs0, vs1
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v32f64_fast:
@@ -1127,7 +1109,6 @@ define dso_local double @v32f64_fast(<32 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs1, vs0
; PWR10LE-NEXT: xvmaxdp vs0, vs0, vs1
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v32f64_fast:
@@ -1153,7 +1134,6 @@ define dso_local double @v32f64_fast(<32 x double> %a) local_unnamed_addr #0 {
; PWR10BE-NEXT: xvmaxdp vs0, vs0, vs2
; PWR10BE-NEXT: xxswapd vs1, vs0
; PWR10BE-NEXT: xvmaxdp vs1, vs0, vs1
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fmax.v32f64(<32 x double> %a)
diff --git a/llvm/test/CodeGen/PowerPC/vector-reduce-fmin.ll b/llvm/test/CodeGen/PowerPC/vector-reduce-fmin.ll
index e806a702cd62b..9b01889b91f6e 100644
--- a/llvm/test/CodeGen/PowerPC/vector-reduce-fmin.ll
+++ b/llvm/test/CodeGen/PowerPC/vector-reduce-fmin.ll
@@ -635,14 +635,12 @@ define dso_local double @v2f64_fast(<2 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs0, v2
; PWR9LE-NEXT: xvmindp vs0, v2, vs0
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v2f64_fast:
; PWR9BE: # %bb.0: # %entry
; PWR9BE-NEXT: xxswapd vs0, v2
; PWR9BE-NEXT: xvmindp vs1, v2, vs0
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v2f64_fast:
@@ -650,14 +648,12 @@ define dso_local double @v2f64_fast(<2 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs0, v2
; PWR10LE-NEXT: xvmindp vs0, v2, vs0
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v2f64_fast:
; PWR10BE: # %bb.0: # %entry
; PWR10BE-NEXT: xxswapd vs0, v2
; PWR10BE-NEXT: xvmindp vs1, v2, vs0
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fmin.v2f64(<2 x double> %a)
@@ -704,7 +700,6 @@ define dso_local double @v4f64_fast(<4 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs1, vs0
; PWR9LE-NEXT: xvmindp vs0, vs0, vs1
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v4f64_fast:
@@ -712,7 +707,6 @@ define dso_local double @v4f64_fast(<4 x double> %a) local_unnamed_addr #0 {
; PWR9BE-NEXT: xvmindp vs0, v2, v3
; PWR9BE-NEXT: xxswapd vs1, vs0
; PWR9BE-NEXT: xvmindp vs1, vs0, vs1
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v4f64_fast:
@@ -721,7 +715,6 @@ define dso_local double @v4f64_fast(<4 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs1, vs0
; PWR10LE-NEXT: xvmindp vs0, vs0, vs1
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v4f64_fast:
@@ -729,7 +722,6 @@ define dso_local double @v4f64_fast(<4 x double> %a) local_unnamed_addr #0 {
; PWR10BE-NEXT: xvmindp vs0, v2, v3
; PWR10BE-NEXT: xxswapd vs1, vs0
; PWR10BE-NEXT: xvmindp vs1, vs0, vs1
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fmin.v4f64(<4 x double> %a)
@@ -786,7 +778,6 @@ define dso_local double @v8f64_fast(<8 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs1, vs0
; PWR9LE-NEXT: xvmindp vs0, vs0, vs1
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v8f64_fast:
@@ -796,7 +787,6 @@ define dso_local double @v8f64_fast(<8 x double> %a) local_unnamed_addr #0 {
; PWR9BE-NEXT: xvmindp vs0, vs1, vs0
; PWR9BE-NEXT: xxswapd vs1, vs0
; PWR9BE-NEXT: xvmindp vs1, vs0, vs1
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v8f64_fast:
@@ -807,7 +797,6 @@ define dso_local double @v8f64_fast(<8 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs1, vs0
; PWR10LE-NEXT: xvmindp vs0, vs0, vs1
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v8f64_fast:
@@ -817,7 +806,6 @@ define dso_local double @v8f64_fast(<8 x double> %a) local_unnamed_addr #0 {
; PWR10BE-NEXT: xvmindp vs0, vs1, vs0
; PWR10BE-NEXT: xxswapd vs1, vs0
; PWR10BE-NEXT: xvmindp vs1, vs0, vs1
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fmin.v8f64(<8 x double> %a)
@@ -894,7 +882,6 @@ define dso_local double @v16f64_fast(<16 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs1, vs0
; PWR9LE-NEXT: xvmindp vs0, vs0, vs1
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v16f64_fast:
@@ -908,7 +895,6 @@ define dso_local double @v16f64_fast(<16 x double> %a) local_unnamed_addr #0 {
; PWR9BE-NEXT: xvmindp vs0, vs0, vs2
; PWR9BE-NEXT: xxswapd vs1, vs0
; PWR9BE-NEXT: xvmindp vs1, vs0, vs1
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v16f64_fast:
@@ -923,7 +909,6 @@ define dso_local double @v16f64_fast(<16 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs1, vs0
; PWR10LE-NEXT: xvmindp vs0, vs0, vs1
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v16f64_fast:
@@ -937,7 +922,6 @@ define dso_local double @v16f64_fast(<16 x double> %a) local_unnamed_addr #0 {
; PWR10BE-NEXT: xvmindp vs0, vs0, vs2
; PWR10BE-NEXT: xxswapd vs1, vs0
; PWR10BE-NEXT: xvmindp vs1, vs0, vs1
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fmin.v16f64(<16 x double> %a)
@@ -1074,7 +1058,6 @@ define dso_local double @v32f64_fast(<32 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs1, vs0
; PWR9LE-NEXT: xvmindp vs0, vs0, vs1
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v32f64_fast:
@@ -1100,7 +1083,6 @@ define dso_local double @v32f64_fast(<32 x double> %a) local_unnamed_addr #0 {
; PWR9BE-NEXT: xvmindp vs0, vs0, vs2
; PWR9BE-NEXT: xxswapd vs1, vs0
; PWR9BE-NEXT: xvmindp vs1, vs0, vs1
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v32f64_fast:
@@ -1127,7 +1109,6 @@ define dso_local double @v32f64_fast(<32 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs1, vs0
; PWR10LE-NEXT: xvmindp vs0, vs0, vs1
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v32f64_fast:
@@ -1153,7 +1134,6 @@ define dso_local double @v32f64_fast(<32 x double> %a) local_unnamed_addr #0 {
; PWR10BE-NEXT: xvmindp vs0, vs0, vs2
; PWR10BE-NEXT: xxswapd vs1, vs0
; PWR10BE-NEXT: xvmindp vs1, vs0, vs1
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fmin.v32f64(<32 x double> %a)
diff --git a/llvm/test/CodeGen/PowerPC/vector-reduce-fmul.ll b/llvm/test/CodeGen/PowerPC/vector-reduce-fmul.ll
index e123f5c2056d6..b566bb9d2d911 100644
--- a/llvm/test/CodeGen/PowerPC/vector-reduce-fmul.ll
+++ b/llvm/test/CodeGen/PowerPC/vector-reduce-fmul.ll
@@ -1081,14 +1081,12 @@ define dso_local double @v2f64_fast(<2 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs0, v2
; PWR9LE-NEXT: xvmuldp vs0, v2, vs0
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v2f64_fast:
; PWR9BE: # %bb.0: # %entry
; PWR9BE-NEXT: xxswapd vs0, v2
; PWR9BE-NEXT: xvmuldp vs1, v2, vs0
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v2f64_fast:
@@ -1096,14 +1094,12 @@ define dso_local double @v2f64_fast(<2 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs0, v2
; PWR10LE-NEXT: xvmuldp vs0, v2, vs0
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v2f64_fast:
; PWR10BE: # %bb.0: # %entry
; PWR10BE-NEXT: xxswapd vs0, v2
; PWR10BE-NEXT: xvmuldp vs1, v2, vs0
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fmul.v2f64(double 1.000000e+00, <2 x double> %a)
@@ -1203,7 +1199,6 @@ define dso_local double @v4f64_fast(<4 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs1, vs0
; PWR9LE-NEXT: xvmuldp vs0, vs0, vs1
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v4f64_fast:
@@ -1211,7 +1206,6 @@ define dso_local double @v4f64_fast(<4 x double> %a) local_unnamed_addr #0 {
; PWR9BE-NEXT: xvmuldp vs0, v2, v3
; PWR9BE-NEXT: xxswapd vs1, vs0
; PWR9BE-NEXT: xvmuldp vs1, vs0, vs1
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v4f64_fast:
@@ -1220,7 +1214,6 @@ define dso_local double @v4f64_fast(<4 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs1, vs0
; PWR10LE-NEXT: xvmuldp vs0, vs0, vs1
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v4f64_fast:
@@ -1228,7 +1221,6 @@ define dso_local double @v4f64_fast(<4 x double> %a) local_unnamed_addr #0 {
; PWR10BE-NEXT: xvmuldp vs0, v2, v3
; PWR10BE-NEXT: xxswapd vs1, vs0
; PWR10BE-NEXT: xvmuldp vs1, vs0, vs1
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fmul.v4f64(double 1.000000e+00, <4 x double> %a)
@@ -1378,7 +1370,6 @@ define dso_local double @v8f64_fast(<8 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs1, vs0
; PWR9LE-NEXT: xvmuldp vs0, vs0, vs1
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v8f64_fast:
@@ -1388,7 +1379,6 @@ define dso_local double @v8f64_fast(<8 x double> %a) local_unnamed_addr #0 {
; PWR9BE-NEXT: xvmuldp vs0, vs1, vs0
; PWR9BE-NEXT: xxswapd vs1, vs0
; PWR9BE-NEXT: xvmuldp vs1, vs0, vs1
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v8f64_fast:
@@ -1399,7 +1389,6 @@ define dso_local double @v8f64_fast(<8 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs1, vs0
; PWR10LE-NEXT: xvmuldp vs0, vs0, vs1
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v8f64_fast:
@@ -1409,7 +1398,6 @@ define dso_local double @v8f64_fast(<8 x double> %a) local_unnamed_addr #0 {
; PWR10BE-NEXT: xvmuldp vs0, vs1, vs0
; PWR10BE-NEXT: xxswapd vs1, vs0
; PWR10BE-NEXT: xvmuldp vs1, vs0, vs1
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fmul.v8f64(double 1.000000e+00, <8 x double> %a)
@@ -1659,7 +1647,6 @@ define dso_local double @v16f64_fast(<16 x double> %a) local_unnamed_addr #0 {
; PWR9LE-NEXT: xxswapd vs1, vs0
; PWR9LE-NEXT: xvmuldp vs0, vs0, vs1
; PWR9LE-NEXT: xxswapd vs1, vs0
-; PWR9LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9LE-NEXT: blr
;
; PWR9BE-LABEL: v16f64_fast:
@@ -1673,7 +1660,6 @@ define dso_local double @v16f64_fast(<16 x double> %a) local_unnamed_addr #0 {
; PWR9BE-NEXT: xvmuldp vs0, vs0, vs2
; PWR9BE-NEXT: xxswapd vs1, vs0
; PWR9BE-NEXT: xvmuldp vs1, vs0, vs1
-; PWR9BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR9BE-NEXT: blr
;
; PWR10LE-LABEL: v16f64_fast:
@@ -1688,7 +1674,6 @@ define dso_local double @v16f64_fast(<16 x double> %a) local_unnamed_addr #0 {
; PWR10LE-NEXT: xxswapd vs1, vs0
; PWR10LE-NEXT: xvmuldp vs0, vs0, vs1
; PWR10LE-NEXT: xxswapd vs1, vs0
-; PWR10LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10LE-NEXT: blr
;
; PWR10BE-LABEL: v16f64_fast:
@@ -1702,7 +1687,6 @@ define dso_local double @v16f64_fast(<16 x double> %a) local_unnamed_addr #0 {
; PWR10BE-NEXT: xvmuldp vs0, vs0, vs2
; PWR10BE-NEXT: xxswapd vs1, vs0
; PWR10BE-NEXT: xvmuldp vs1, vs0, vs1
-; PWR10BE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PWR10BE-NEXT: blr
entry:
%0 = call fast double @llvm.vector.reduce.fmul.v16f64(double 1.000000e+00, <16 x double> %a)
diff --git a/llvm/test/CodeGen/PowerPC/vsx.ll b/llvm/test/CodeGen/PowerPC/vsx.ll
index 359033d85f44a..d1d29a0f884c6 100644
--- a/llvm/test/CodeGen/PowerPC/vsx.ll
+++ b/llvm/test/CodeGen/PowerPC/vsx.ll
@@ -2407,6 +2407,7 @@ define <2 x i32> @test80(i32 %v) {
;
; CHECK-FISL-LABEL: test80:
; CHECK-FISL: # %bb.0:
+; CHECK-FISL-NEXT: # kill: def $r3 killed $r3 killed $x3
; CHECK-FISL-NEXT: stw r3, -16(r1)
; CHECK-FISL-NEXT: addi r3, r1, -16
; CHECK-FISL-NEXT: lxvw4x vs0, 0, r3
>From 0439d7c7a0272ebc62e3d5fff00f693ded34d68b Mon Sep 17 00:00:00 2001
From: Stefan Pintilie <stefanp at ca.ibm.com>
Date: Tue, 18 Jun 2024 12:59:14 -0500
Subject: [PATCH 08/10] Fixed up one more test case that I missed.
---
.../PowerPC/vector-constrained-fp-intrinsics.ll | 16 ----------------
1 file changed, 16 deletions(-)
diff --git a/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll b/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
index a2b7440995a27..aedb1a9c65cf8 100644
--- a/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
+++ b/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
@@ -8046,11 +8046,9 @@ define <2 x double> @constrained_vector_tan_v2f64(<2 x double> %x) #0 {
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 62, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl tan
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 64
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 34, 62, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 48
@@ -8073,10 +8071,8 @@ define <2 x double> @constrained_vector_tan_v2f64(<2 x double> %x) #0 {
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 62, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl tan
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 34, 62, 1
; PC64LE9-NEXT: lxv 63, 48(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lxv 62, 32(1) # 16-byte Folded Reload
@@ -8199,7 +8195,6 @@ define <3 x double> @constrained_vector_tan_v3f64(<3 x double> %x) #0 {
; PC64LE-NEXT: fmr 1, 30
; PC64LE-NEXT: bl tan
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 63, 1, 63
; PC64LE-NEXT: fmr 1, 31
; PC64LE-NEXT: bl tan
@@ -8210,7 +8205,6 @@ define <3 x double> @constrained_vector_tan_v3f64(<3 x double> %x) #0 {
; PC64LE-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
; PC64LE-NEXT: xxlor 2, 63, 63
; PC64LE-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: addi 1, 1, 80
; PC64LE-NEXT: ld 0, 16(1)
@@ -8233,7 +8227,6 @@ define <3 x double> @constrained_vector_tan_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: fmr 1, 30
; PC64LE9-NEXT: bl tan
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 63, 1, 63
; PC64LE9-NEXT: fmr 1, 31
; PC64LE9-NEXT: bl tan
@@ -8243,7 +8236,6 @@ define <3 x double> @constrained_vector_tan_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: xscpsgndp 2, 63, 63
; PC64LE9-NEXT: lxv 63, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 31, 56(1) # 8-byte Folded Reload
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
@@ -8276,22 +8268,18 @@ define <4 x double> @constrained_vector_tan_v4f64(<4 x double> %x) #0 {
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 62
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl tan
; PC64LE-NEXT: nop
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 62, 61, 1
; PC64LE-NEXT: xxlor 1, 63, 63
; PC64LE-NEXT: bl tan
; PC64LE-NEXT: nop
; PC64LE-NEXT: xxlor 61, 1, 1
; PC64LE-NEXT: xxswapd 1, 63
-; PC64LE-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE-NEXT: bl tan
; PC64LE-NEXT: nop
; PC64LE-NEXT: li 3, 80
; PC64LE-NEXT: vmr 2, 30
-; PC64LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE-NEXT: xxmrghd 35, 61, 1
; PC64LE-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PC64LE-NEXT: li 3, 64
@@ -8318,20 +8306,16 @@ define <4 x double> @constrained_vector_tan_v4f64(<4 x double> %x) #0 {
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 62
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl tan
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 62, 61, 1
; PC64LE9-NEXT: xscpsgndp 1, 63, 63
; PC64LE9-NEXT: bl tan
; PC64LE9-NEXT: nop
; PC64LE9-NEXT: xscpsgndp 61, 1, 1
; PC64LE9-NEXT: xxswapd 1, 63
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: bl tan
; PC64LE9-NEXT: nop
-; PC64LE9-NEXT: # kill: def $f1 killed $f1 def $vsl1
; PC64LE9-NEXT: xxmrghd 35, 61, 1
; PC64LE9-NEXT: vmr 2, 30
; PC64LE9-NEXT: lxv 63, 64(1) # 16-byte Folded Reload
>From bf60320eae4fb5ac90d23884645225ba0ff82ca8 Mon Sep 17 00:00:00 2001
From: Stefan Pintilie <stefanp at ca.ibm.com>
Date: Thu, 20 Jun 2024 09:37:15 -0500
Subject: [PATCH 09/10] Added test subreg-coalescer.mir for the
RegisterCoalescer.
---
llvm/test/CodeGen/PowerPC/subreg-coalescer.mir | 1 -
1 file changed, 1 deletion(-)
diff --git a/llvm/test/CodeGen/PowerPC/subreg-coalescer.mir b/llvm/test/CodeGen/PowerPC/subreg-coalescer.mir
index 818a5e2340722..5a0f256de5eb9 100644
--- a/llvm/test/CodeGen/PowerPC/subreg-coalescer.mir
+++ b/llvm/test/CodeGen/PowerPC/subreg-coalescer.mir
@@ -31,4 +31,3 @@ body: |
$v2 = COPY %5
BLR8 implicit $lr8, implicit $rm, implicit $v2
...
-
>From df2892d03bb5f7cde6f84bacf8ecc267c5dc9212 Mon Sep 17 00:00:00 2001
From: Stefan Pintilie <stefanp at ca.ibm.com>
Date: Mon, 15 Jul 2024 14:44:52 -0500
Subject: [PATCH 10/10] Fixed a whitespace issue and a missing DwarfRegNum.
---
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 1 +
llvm/lib/Target/PowerPC/PPCRegisterInfo.td | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 7ed63bc325219..9e8da59615dfb 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -434,6 +434,7 @@ BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
}
}
}
+
assert(checkAllSuperRegsMarked(Reserved));
return Reserved;
}
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.td b/llvm/lib/Target/PowerPC/PPCRegisterInfo.td
index 5e979762e712f..2debe371074bb 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.td
@@ -185,7 +185,7 @@ let CoveredBySubRegs = 1 in {
// Vector registers
foreach Index = 0-31 in {
def V#Index : VR<!cast<VF>("VF"#Index), !cast<VF>("VFH"#Index), "v"#Index>,
- DwarfRegNum<[!add(Index, 77)]>;
+ DwarfRegNum<[!add(Index, 77), !add(Index, 77)]>;
}
// VSX registers
More information about the llvm-commits
mailing list