[llvm] [Xtensa] Implement lowering SELECT_CC, SETCC. (PR #97017)

[Andrei Safronov via llvm-commits]

================
@@ -697,6 +718,126 @@ const char *XtensaTargetLowering::getTargetNodeName(unsigned Opcode) const {
     return "XtensaISD::PCREL_WRAPPER";
   case XtensaISD::RET:
     return "XtensaISD::RET";
+  case XtensaISD::SELECT_CC:
+    return "XtensaISD::SELECT_CC";
   }
   return nullptr;
 }
+
+//===----------------------------------------------------------------------===//
+// Custom insertion
+//===----------------------------------------------------------------------===//
+
+static int GetBranchKind(int Cond, bool &BrInv) {
+  switch (Cond) {
+  case ISD::SETEQ:
+    return Xtensa::BEQ;
+  case ISD::SETNE:
+    return Xtensa::BNE;
+  case ISD::SETLT:
+    return Xtensa::BLT;
+  case ISD::SETLE:
+    BrInv = true;
+    return Xtensa::BGE;
+  case ISD::SETGT:
+    BrInv = true;
+    return Xtensa::BLT;
+  case ISD::SETGE:
+    return Xtensa::BGE;
+  case ISD::SETULT:
+    return Xtensa::BLTU;
+  case ISD::SETULE:
+    BrInv = true;
----------------
andreisfr wrote:

It's interesting that if I use setCondCodeAction(CC, Expand) code instead of patterns then llc generates a bit large code in some cases, for example I compiled following code with "O3" option:
`
define i32 @select_ugt(i32 %a, ptr %b) nounwind {
  %val1 = load i32, ptr %b
  %tst1 = icmp ugt i32 %a, %val1
  %val2 = select i1 %tst1, i32 %a, i32 %val1
  ret i32 %val2
}

Old llc version:

select_ugt:
	l32i	a8, a3, 0
	bltu	a8, a2, .LBB1_2
	or	a2, a8, a8
.LBB1_2:
	ret

New llc version:

select_ugt:
	or	a8, a2, a2
	l32i	a2, a3, 0
	bgeu	a2, a8, .LBB1_2
	or	a2, a8, a8
.LBB1_2:
	ret
`

Should we strive to always rely on general approaches to lower Operations(like use setCondCodeAction), or in some cases (like that) we can use target specific implementation?

https://github.com/llvm/llvm-project/pull/97017