[llvm] [Xtensa] Implement lowering SELECT_CC, SETCC. (PR #97017)

[Matt Arsenault via llvm-commits]

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@@ -514,6 +517,62 @@ XtensaTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
   return DAG.getNode(XtensaISD::RET, DL, MVT::Other, RetOps);
 }
 
+static unsigned getBranchOpcode(ISD::CondCode Cond, bool &BrInv) {
+  BrInv = false;
+  switch (Cond) {
+  case ISD::SETEQ:
+    return Xtensa::BEQ;
+  case ISD::SETNE:
+    return Xtensa::BNE;
+  case ISD::SETLT:
+    return Xtensa::BLT;
+  case ISD::SETLE:
+    BrInv = true;
+    return Xtensa::BGE;
+  case ISD::SETGT:
+    BrInv = true;
+    return Xtensa::BLT;
+  case ISD::SETGE:
+    return Xtensa::BGE;
+  case ISD::SETULT:
+    return Xtensa::BLTU;
+  case ISD::SETULE:
+    BrInv = true;
+    return Xtensa::BGEU;
+  case ISD::SETUGT:
+    BrInv = true;
+    return Xtensa::BLTU;
+  case ISD::SETUGE:
+    return Xtensa::BGEU;
+  default:
+    llvm_unreachable("Unknown branch kind");
+  }
+}
+
+SDValue XtensaTargetLowering::LowerSELECT_CC(SDValue Op,
+                                             SelectionDAG &DAG) const {
+  SDLoc DL(Op);
+  EVT Ty = Op.getOperand(0).getValueType();
+  SDValue LHS = Op.getOperand(0);
+  SDValue RHS = Op.getOperand(1);
+  SDValue TrueValue = Op.getOperand(2);
+  SDValue FalseValue = Op.getOperand(3);
+  ISD::CondCode CC = cast<CondCodeSDNode>(Op->getOperand(4))->get();
+
+  bool BrInv;
+  unsigned BrKind = getBranchOpcode(CC, BrInv);
+  SDValue TargetCC = DAG.getConstant(BrKind, DL, MVT::i32);
+
+  // Wrap select nodes
+  if (BrInv) {
+    return DAG.getNode(XtensaISD::SELECT_CC, DL, Ty, RHS, LHS, TrueValue,
+                       FalseValue, TargetCC);
+  } else {
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arsenm wrote:

No else after return. Also could just if (BrInv) swap values? 

https://github.com/llvm/llvm-project/pull/97017