[llvm] [Xtensa] Implement lowering SELECT_CC, SETCC. (PR #97017)

Sergei Barannikov via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 9 07:02:23 PDT 2024


================
@@ -697,6 +718,126 @@ const char *XtensaTargetLowering::getTargetNodeName(unsigned Opcode) const {
     return "XtensaISD::PCREL_WRAPPER";
   case XtensaISD::RET:
     return "XtensaISD::RET";
+  case XtensaISD::SELECT_CC:
+    return "XtensaISD::SELECT_CC";
   }
   return nullptr;
 }
+
+//===----------------------------------------------------------------------===//
+// Custom insertion
+//===----------------------------------------------------------------------===//
+
+static int GetBranchKind(int Cond, bool &BrInv) {
+  switch (Cond) {
+  case ISD::SETEQ:
+    return Xtensa::BEQ;
+  case ISD::SETNE:
+    return Xtensa::BNE;
+  case ISD::SETLT:
+    return Xtensa::BLT;
+  case ISD::SETLE:
+    BrInv = true;
+    return Xtensa::BGE;
+  case ISD::SETGT:
+    BrInv = true;
+    return Xtensa::BLT;
+  case ISD::SETGE:
+    return Xtensa::BGE;
+  case ISD::SETULT:
+    return Xtensa::BLTU;
+  case ISD::SETULE:
+    BrInv = true;
----------------
s-barannikov wrote:

If I'm reading `XtensaInstrInfo.td` correctly, there are no instructions corresponding to ULE and UGT condition codes. These codes should be legalized by `setCondCodeAction(..., Expand)` and removed from this switch.


https://github.com/llvm/llvm-project/pull/97017


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