[compiler-rt] [llvm] [compiler-rt][X86] Unify getAMDProcessorTypeAndSubType (PR #97863)
Aiden Grossman via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 5 15:04:20 PDT 2024
https://github.com/boomanaiden154 created https://github.com/llvm/llvm-project/pull/97863
This patch unifies the implementation of getAMDProcessorTypeAndSubtype between compiler-rt and LLVM.
This patch is intended to be a step towards pulling these functions out into identical .inc files to better facilitate code sharing between LLVM and compiler-rt.
>From 2be7a7864cedafd42f9ca0aee35d6a7695899243 Mon Sep 17 00:00:00 2001
From: Aiden Grossman <aidengrossman at google.com>
Date: Fri, 5 Jul 2024 22:02:44 +0000
Subject: [PATCH] [compiler-rt][X86] Unify getAMDProcessorTypeAndSubType
This patch unifies the implementation of getAMDProcessorTypeAndSubtype
between compiler-rt and LLVM.
This patch is intended to be a step towards pulling these functions out
into identical .inc files to better facilitate code sharing between LLVM
and compiler-rt.
---
compiler-rt/lib/builtins/cpu_model/x86.c | 42 +++++++++++++++++++++---
llvm/lib/TargetParser/Host.cpp | 21 +++++-------
2 files changed, 46 insertions(+), 17 deletions(-)
diff --git a/compiler-rt/lib/builtins/cpu_model/x86.c b/compiler-rt/lib/builtins/cpu_model/x86.c
index 7e8acb3e73eda..546976d83c3a7 100644
--- a/compiler-rt/lib/builtins/cpu_model/x86.c
+++ b/compiler-rt/lib/builtins/cpu_model/x86.c
@@ -662,14 +662,48 @@ static const char *getAMDProcessorTypeAndSubtype(unsigned Family,
const unsigned *Features,
unsigned *Type,
unsigned *Subtype) {
- // We select CPU strings to match the code in Host.cpp, but we don't use them
- // in compiler-rt.
const char *CPU = 0;
switch (Family) {
+ case 4:
+ CPU = "i486";
+ break;
+ case 5:
+ CPU = "pentium";
+ switch (Model) {
+ case 6:
+ case 7:
+ CPU = "k6";
+ break;
+ case 8:
+ CPU = "k6-2";
+ break;
+ case 9:
+ case 13:
+ CPU = "k6-3";
+ break;
+ case 10:
+ CPU = "geode";
+ break;
+ }
+ break;
+ case 6:
+ if (testFeature(FEATURE_SSE)) {
+ CPU = "athlon-xp";
+ break;
+ }
+ CPU = "athlon";
+ break;
+ case 15:
+ if (testFeature(FEATURE_SSE3)) {
+ CPU = "k8-sse3";
+ break;
+ }
+ CPU = "k8";
+ break;
case 16:
CPU = "amdfam10";
- *Type = AMDFAM10H;
+ *Type = AMDFAM10H; // "amdfam10"
switch (Model) {
case 2:
*Subtype = AMDFAM10H_BARCELONA;
@@ -745,7 +779,7 @@ static const char *getAMDProcessorTypeAndSubtype(unsigned Family,
case 25:
CPU = "znver3";
*Type = AMDFAM19H;
- if ((Model <= 0x0f) || (Model >= 0x20 && Model <= 0x2f) ||
+ if (Model <= 0x0f || (Model >= 0x20 && Model <= 0x2f) ||
(Model >= 0x30 && Model <= 0x3f) || (Model >= 0x40 && Model <= 0x4f) ||
(Model >= 0x50 && Model <= 0x5f)) {
// Family 19h Models 00h-0Fh (Genesis, Chagall) Zen 3
diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp
index 2ea56746aff24..90b7d7672e931 100644
--- a/llvm/lib/TargetParser/Host.cpp
+++ b/llvm/lib/TargetParser/Host.cpp
@@ -707,9 +707,7 @@ static StringRef
getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
const unsigned *Features,
unsigned *Type, unsigned *Subtype) {
- auto testFeature = [&](unsigned F) {
- return (Features[F / 32] & (1U << (F % 32))) != 0;
- };
+#define testFeature(F) (Features[F / 32] & (1 << (F % 32))) != 0
StringRef CPU;
@@ -1067,15 +1065,12 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
return CPU;
}
-static StringRef
-getAMDProcessorTypeAndSubtype(unsigned Family, unsigned Model,
- const unsigned *Features,
- unsigned *Type, unsigned *Subtype) {
- auto testFeature = [&](unsigned F) {
- return (Features[F / 32] & (1U << (F % 32))) != 0;
- };
-
- StringRef CPU;
+static const char *getAMDProcessorTypeAndSubtype(unsigned Family,
+ unsigned Model,
+ const unsigned *Features,
+ unsigned *Type,
+ unsigned *Subtype) {
+ const char *CPU = 0;
switch (Family) {
case 4:
@@ -1215,7 +1210,7 @@ getAMDProcessorTypeAndSubtype(unsigned Family, unsigned Model,
*Subtype = X86::AMDFAM19H_ZNVER4;
break; // "znver4"
}
- break;
+ break; // family 19h
default:
break; // Unknown AMD CPU.
}
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