[llvm] [CodeGen][NewPM] Port `machine-loops` to new pass manager (PR #97793)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 4 23:42:51 PDT 2024
https://github.com/paperchalice created https://github.com/llvm/llvm-project/pull/97793
- Add `MachineLoopAnalysis`.
- Add `MachineLoopPrinterPass`.
- Convert to `MachineLoopInfoWrapperPass` in legacy pass manager.
>From 874da4cc2cdb2b9bcd386d220b4c1f57e3d4437c Mon Sep 17 00:00:00 2001
From: PaperChalice <liujunchang97 at outlook.com>
Date: Sun, 30 Jun 2024 21:32:34 +0800
Subject: [PATCH] [CodeGen][NewPM] Port `machine-loops` to new pass manager -
Add `MachineLoopAnalysis`. - Add `MachineLoopPrinterPass`. - Convert to
`MachineLoopInfoWrapperPass` in legacy pass manager.
---
llvm/include/llvm/CodeGen/MachineLoopInfo.h | 109 +++++++-----------
llvm/include/llvm/InitializePasses.h | 2 +-
.../llvm/Passes/MachinePassRegistry.def | 2 +
llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 5 +-
llvm/lib/CodeGen/BranchFolding.cpp | 2 +-
llvm/lib/CodeGen/CodeGen.cpp | 2 +-
llvm/lib/CodeGen/EarlyIfConversion.cpp | 12 +-
.../CodeGen/LazyMachineBlockFrequencyInfo.cpp | 7 +-
llvm/lib/CodeGen/MIRSampleProfile.cpp | 9 +-
llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp | 8 +-
llvm/lib/CodeGen/MachineBasicBlock.cpp | 11 +-
.../lib/CodeGen/MachineBlockFrequencyInfo.cpp | 6 +-
llvm/lib/CodeGen/MachineBlockPlacement.cpp | 6 +-
llvm/lib/CodeGen/MachineCombiner.cpp | 8 +-
llvm/lib/CodeGen/MachineLICM.cpp | 10 +-
llvm/lib/CodeGen/MachineLoopInfo.cpp | 52 +++++++--
llvm/lib/CodeGen/MachinePipeliner.cpp | 6 +-
llvm/lib/CodeGen/MachineScheduler.cpp | 12 +-
llvm/lib/CodeGen/MachineSink.cpp | 2 +-
llvm/lib/CodeGen/MachineTraceMetrics.cpp | 6 +-
llvm/lib/CodeGen/ModuloSchedule.cpp | 6 +-
llvm/lib/CodeGen/PHIElimination.cpp | 6 +-
llvm/lib/CodeGen/PeepholeOptimizer.cpp | 8 +-
llvm/lib/CodeGen/PostRASchedulerList.cpp | 6 +-
llvm/lib/CodeGen/PrologEpilogInserter.cpp | 4 +-
llvm/lib/CodeGen/RegAllocBasic.cpp | 9 +-
llvm/lib/CodeGen/RegAllocGreedy.cpp | 8 +-
llvm/lib/CodeGen/RegAllocPBQP.cpp | 11 +-
llvm/lib/CodeGen/RegisterCoalescer.cpp | 8 +-
llvm/lib/CodeGen/ShrinkWrap.cpp | 6 +-
llvm/lib/CodeGen/StackSlotColoring.cpp | 2 +-
llvm/lib/CodeGen/UnreachableBlockElim.cpp | 6 +-
llvm/lib/CodeGen/XRayInstrumentation.cpp | 9 +-
llvm/lib/Passes/PassBuilder.cpp | 1 +
.../AArch64/AArch64ConditionalCompares.cpp | 6 +-
.../Target/AArch64/AArch64FalkorHWPFFix.cpp | 6 +-
.../Target/AArch64/AArch64MIPeepholeOpt.cpp | 4 +-
.../AMDGPU/R600MachineCFGStructurizer.cpp | 6 +-
.../AMDGPU/R600OptimizeVectorRegisters.cpp | 4 +-
llvm/lib/Target/AMDGPU/R600Packetizer.cpp | 6 +-
llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 6 +-
.../Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp | 8 +-
llvm/lib/Target/ARM/ARMBlockPlacement.cpp | 4 +-
llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 4 +-
.../ARM/MVETPAndVPTOptimisationsPass.cpp | 8 +-
.../lib/Target/Hexagon/HexagonEarlyIfConv.cpp | 4 +-
.../Target/Hexagon/HexagonHardwareLoops.cpp | 6 +-
.../lib/Target/Hexagon/HexagonSplitDouble.cpp | 6 +-
.../Target/Hexagon/HexagonVLIWPacketizer.cpp | 8 +-
llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 2 +-
llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h | 2 +-
llvm/lib/Target/PowerPC/PPCCTRLoops.cpp | 6 +-
.../Target/WebAssembly/WebAssemblyCFGSort.cpp | 6 +-
.../WebAssembly/WebAssemblyCFGStackify.cpp | 6 +-
llvm/lib/Target/X86/X86CmovConversion.cpp | 10 +-
.../X86LoadValueInjectionLoadHardening.cpp | 6 +-
llvm/lib/Target/X86/X86PreTileConfig.cpp | 6 +-
llvm/test/CodeGen/X86/machine-loops.ll | 43 +++++++
58 files changed, 300 insertions(+), 240 deletions(-)
create mode 100644 llvm/test/CodeGen/X86/machine-loops.ll
diff --git a/llvm/include/llvm/CodeGen/MachineLoopInfo.h b/llvm/include/llvm/CodeGen/MachineLoopInfo.h
index 967c4a70ca469..80f3a713009fc 100644
--- a/llvm/include/llvm/CodeGen/MachineLoopInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineLoopInfo.h
@@ -31,6 +31,7 @@
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/IR/CFG.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/Support/GenericLoopInfo.h"
@@ -101,23 +102,20 @@ class MachineLoop : public LoopBase<MachineBasicBlock, MachineLoop> {
// Implementation in LoopInfoImpl.h
extern template class LoopInfoBase<MachineBasicBlock, MachineLoop>;
-class MachineLoopInfo : public MachineFunctionPass {
+class MachineLoopInfo : public LoopInfoBase<MachineBasicBlock, MachineLoop> {
friend class LoopBase<MachineBasicBlock, MachineLoop>;
- LoopInfoBase<MachineBasicBlock, MachineLoop> LI;
-
public:
- static char ID; // Pass identification, replacement for typeid
-
- MachineLoopInfo();
- explicit MachineLoopInfo(MachineDominatorTree &MDT)
- : MachineFunctionPass(ID) {
- calculate(MDT);
- }
+ MachineLoopInfo() = default;
+ explicit MachineLoopInfo(MachineDominatorTree &MDT) { calculate(MDT); }
+ MachineLoopInfo(MachineLoopInfo &&) = default;
+ MachineLoopInfo &operator=(MachineLoopInfo &&RHS) = default;
MachineLoopInfo(const MachineLoopInfo &) = delete;
MachineLoopInfo &operator=(const MachineLoopInfo &) = delete;
- LoopInfoBase<MachineBasicBlock, MachineLoop>& getBase() { return LI; }
+ /// Handle invalidation explicitly.
+ bool invalidate(MachineFunction &, const PreservedAnalyses &PA,
+ MachineFunctionAnalysisManager::Invalidator &);
/// Find the block that either is the loop preheader, or could
/// speculatively be used as the preheader. This is e.g. useful to place
@@ -130,69 +128,46 @@ class MachineLoopInfo : public MachineFunctionPass {
findLoopPreheader(MachineLoop *L, bool SpeculativePreheader = false,
bool FindMultiLoopPreheader = false) const;
- /// The iterator interface to the top-level loops in the current function.
- using iterator = LoopInfoBase<MachineBasicBlock, MachineLoop>::iterator;
- inline iterator begin() const { return LI.begin(); }
- inline iterator end() const { return LI.end(); }
- bool empty() const { return LI.empty(); }
-
- /// Return the innermost loop that BB lives in. If a basic block is in no loop
- /// (for example the entry node), null is returned.
- inline MachineLoop *getLoopFor(const MachineBasicBlock *BB) const {
- return LI.getLoopFor(BB);
- }
-
- /// Same as getLoopFor.
- inline const MachineLoop *operator[](const MachineBasicBlock *BB) const {
- return LI.getLoopFor(BB);
- }
-
- /// Return the loop nesting level of the specified block.
- inline unsigned getLoopDepth(const MachineBasicBlock *BB) const {
- return LI.getLoopDepth(BB);
- }
-
- /// True if the block is a loop header node.
- inline bool isLoopHeader(const MachineBasicBlock *BB) const {
- return LI.isLoopHeader(BB);
- }
-
/// Calculate the natural loop information.
- bool runOnMachineFunction(MachineFunction &F) override;
void calculate(MachineDominatorTree &MDT);
+};
+
+/// Analysis pass that exposes the \c MachineLoopInfo for a machine function.
+class MachineLoopAnalysis : public AnalysisInfoMixin<MachineLoopAnalysis> {
+ friend AnalysisInfoMixin<MachineLoopAnalysis>;
+ static AnalysisKey Key;
+
+public:
+ using Result = MachineLoopInfo;
+ Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM);
+};
+
+/// Printer pass for the \c LoopAnalysis results.
+class MachineLoopPrinterPass : public PassInfoMixin<MachineLoopPrinterPass> {
+ raw_ostream &OS;
+
+public:
+ explicit MachineLoopPrinterPass(raw_ostream &OS) : OS(OS) {}
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
+};
+
+class MachineLoopInfoWrapperPass : public MachineFunctionPass {
+ MachineLoopInfo LI;
+
+public:
+ static char ID; // Pass identification, replacement for typeid
+
+ MachineLoopInfoWrapperPass();
+
+ bool runOnMachineFunction(MachineFunction &F) override;
void releaseMemory() override { LI.releaseMemory(); }
void getAnalysisUsage(AnalysisUsage &AU) const override;
- /// This removes the specified top-level loop from this loop info object. The
- /// loop is not deleted, as it will presumably be inserted into another loop.
- inline MachineLoop *removeLoop(iterator I) { return LI.removeLoop(I); }
-
- /// Change the top-level loop that contains BB to the specified loop. This
- /// should be used by transformations that restructure the loop hierarchy
- /// tree.
- inline void changeLoopFor(MachineBasicBlock *BB, MachineLoop *L) {
- LI.changeLoopFor(BB, L);
- }
-
- /// Replace the specified loop in the top-level loops list with the indicated
- /// loop.
- inline void changeTopLevelLoop(MachineLoop *OldLoop, MachineLoop *NewLoop) {
- LI.changeTopLevelLoop(OldLoop, NewLoop);
- }
-
- /// This adds the specified loop to the collection of top-level loops.
- inline void addTopLevelLoop(MachineLoop *New) {
- LI.addTopLevelLoop(New);
- }
-
- /// This method completely removes BB from all data structures, including all
- /// of the Loop objects it is nested in and our mapping from
- /// MachineBasicBlocks to loops.
- void removeBlock(MachineBasicBlock *BB) {
- LI.removeBlock(BB);
- }
+ MachineLoopInfo &getLI() { return LI; }
};
// Allow clients to walk the list of nested loops...
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index 421c09ada7a19..9d96e0f25ec1e 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -195,7 +195,7 @@ void initializeMachineFunctionPrinterPassPass(PassRegistry&);
void initializeMachineFunctionSplitterPass(PassRegistry &);
void initializeMachineLateInstrsCleanupPass(PassRegistry&);
void initializeMachineLICMPass(PassRegistry&);
-void initializeMachineLoopInfoPass(PassRegistry&);
+void initializeMachineLoopInfoWrapperPassPass(PassRegistry &);
void initializeMachineModuleInfoWrapperPassPass(PassRegistry &);
void initializeMachineOptimizationRemarkEmitterPassPass(PassRegistry&);
void initializeMachineOutlinerPass(PassRegistry&);
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index b1542ab139286..95c618f743d2a 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -92,6 +92,7 @@ LOOP_PASS("loop-reduce", LoopStrengthReducePass())
MACHINE_FUNCTION_ANALYSIS("machine-branch-prob",
MachineBranchProbabilityAnalysis())
MACHINE_FUNCTION_ANALYSIS("machine-dom-tree", MachineDominatorTreeAnalysis())
+MACHINE_FUNCTION_ANALYSIS("machine-loops", MachineLoopAnalysis())
MACHINE_FUNCTION_ANALYSIS("machine-post-dom-tree",
MachinePostDominatorTreeAnalysis())
MACHINE_FUNCTION_ANALYSIS("pass-instrumentation", PassInstrumentationAnalysis(PIC))
@@ -136,6 +137,7 @@ MACHINE_FUNCTION_PASS("print<machine-branch-prob>",
MachineBranchProbabilityPrinterPass(dbgs()))
MACHINE_FUNCTION_PASS("print<machine-dom-tree>",
MachineDominatorTreePrinterPass(dbgs()))
+MACHINE_FUNCTION_PASS("print<machine-loops>", MachineLoopPrinterPass(dbgs()))
MACHINE_FUNCTION_PASS("print<machine-post-dom-tree>",
MachinePostDominatorTreePrinterPass(dbgs()))
MACHINE_FUNCTION_PASS("require-all-machine-function-properties",
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index c52cbff689dc5..f8efd5843c6bb 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -1704,10 +1704,11 @@ void AsmPrinter::emitFunctionBody() {
}
// Get MachineLoopInfo or compute it on the fly if it's unavailable
- MLI = getAnalysisIfAvailable<MachineLoopInfo>();
+ auto *MLIWrapper = getAnalysisIfAvailable<MachineLoopInfoWrapperPass>();
+ MLI = MLIWrapper ? &MLIWrapper->getLI() : nullptr;
if (!MLI) {
OwnedMLI = std::make_unique<MachineLoopInfo>();
- OwnedMLI->getBase().analyze(MDT->getBase());
+ OwnedMLI->analyze(MDT->getBase());
MLI = OwnedMLI.get();
}
}
diff --git a/llvm/lib/CodeGen/BranchFolding.cpp b/llvm/lib/CodeGen/BranchFolding.cpp
index 1b6a6ee2bbc72..afe797014095d 100644
--- a/llvm/lib/CodeGen/BranchFolding.cpp
+++ b/llvm/lib/CodeGen/BranchFolding.cpp
@@ -415,7 +415,7 @@ MachineBasicBlock *BranchFolder::SplitMBBAt(MachineBasicBlock &CurMBB,
// NewMBB belongs to the same loop as CurMBB.
if (MLI)
if (MachineLoop *ML = MLI->getLoopFor(&CurMBB))
- ML->addBasicBlockToLoop(NewMBB, MLI->getBase());
+ ML->addBasicBlockToLoop(NewMBB, *MLI);
// NewMBB inherits CurMBB's block frequency.
MBBFreqInfo.setBlockFreq(NewMBB, MBBFreqInfo.getBlockFreq(&CurMBB));
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index 7dcb0ea5d903c..35e27519378f2 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -84,7 +84,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializeMachineFunctionPrinterPassPass(Registry);
initializeMachineLateInstrsCleanupPass(Registry);
initializeMachineLICMPass(Registry);
- initializeMachineLoopInfoPass(Registry);
+ initializeMachineLoopInfoWrapperPassPass(Registry);
initializeMachineModuleInfoWrapperPassPass(Registry);
initializeMachineOptimizationRemarkEmitterPassPass(Registry);
initializeMachineOutlinerPass(Registry);
diff --git a/llvm/lib/CodeGen/EarlyIfConversion.cpp b/llvm/lib/CodeGen/EarlyIfConversion.cpp
index 5f3e85077cb56..a5c99498921db 100644
--- a/llvm/lib/CodeGen/EarlyIfConversion.cpp
+++ b/llvm/lib/CodeGen/EarlyIfConversion.cpp
@@ -797,8 +797,8 @@ void EarlyIfConverter::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
AU.addRequired<MachineTraceMetrics>();
AU.addPreserved<MachineTraceMetrics>();
MachineFunctionPass::getAnalysisUsage(AU);
@@ -1087,7 +1087,7 @@ bool EarlyIfConverter::runOnMachineFunction(MachineFunction &MF) {
SchedModel = STI.getSchedModel();
MRI = &MF.getRegInfo();
DomTree = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
- Loops = &getAnalysis<MachineLoopInfo>();
+ Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
Traces = &getAnalysis<MachineTraceMetrics>();
MinInstr = nullptr;
@@ -1150,8 +1150,8 @@ void EarlyIfPredicator::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -1221,7 +1221,7 @@ bool EarlyIfPredicator::runOnMachineFunction(MachineFunction &MF) {
MRI = &MF.getRegInfo();
SchedModel.init(&STI);
DomTree = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
- Loops = &getAnalysis<MachineLoopInfo>();
+ Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
MBPI = &getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI();
bool Changed = false;
diff --git a/llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp b/llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp
index 83b16fc883e8b..0cf01edbff6c8 100644
--- a/llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp
+++ b/llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp
@@ -24,7 +24,7 @@ using namespace llvm;
INITIALIZE_PASS_BEGIN(LazyMachineBlockFrequencyInfoPass, DEBUG_TYPE,
"Lazy Machine Block Frequency Analysis", true, true)
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfoWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_END(LazyMachineBlockFrequencyInfoPass, DEBUG_TYPE,
"Lazy Machine Block Frequency Analysis", true, true)
@@ -63,7 +63,8 @@ LazyMachineBlockFrequencyInfoPass::calculateIfNotAvailable() const {
}
auto &MBPI = getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI();
- auto *MLI = getAnalysisIfAvailable<MachineLoopInfo>();
+ auto *MLIWrapper = getAnalysisIfAvailable<MachineLoopInfoWrapperPass>();
+ auto *MLI = MLIWrapper ? &MLIWrapper->getLI() : nullptr;
auto *MDTWrapper = getAnalysisIfAvailable<MachineDominatorTreeWrapperPass>();
auto *MDT = MDTWrapper ? &MDTWrapper->getDomTree() : nullptr;
LLVM_DEBUG(dbgs() << "Building MachineBlockFrequencyInfo on the fly\n");
@@ -83,7 +84,7 @@ LazyMachineBlockFrequencyInfoPass::calculateIfNotAvailable() const {
// Generate LoopInfo from it.
OwnedMLI = std::make_unique<MachineLoopInfo>();
- OwnedMLI->getBase().analyze(MDT->getBase());
+ OwnedMLI->analyze(MDT->getBase());
MLI = OwnedMLI.get();
}
diff --git a/llvm/lib/CodeGen/MIRSampleProfile.cpp b/llvm/lib/CodeGen/MIRSampleProfile.cpp
index 84e6c612a3343..b77d8aabe029a 100644
--- a/llvm/lib/CodeGen/MIRSampleProfile.cpp
+++ b/llvm/lib/CodeGen/MIRSampleProfile.cpp
@@ -72,7 +72,7 @@ INITIALIZE_PASS_BEGIN(MIRProfileLoaderPass, DEBUG_TYPE,
INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineOptimizationRemarkEmitterPass)
INITIALIZE_PASS_END(MIRProfileLoaderPass, DEBUG_TYPE, "Load MIR Sample Profile",
/* cfg = */ false, /* is_analysis = */ false)
@@ -367,7 +367,7 @@ bool MIRProfileLoaderPass::runOnMachineFunction(MachineFunction &MF) {
MIRSampleLoader->setInitVals(
&getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree(),
&getAnalysis<MachinePostDominatorTreeWrapperPass>().getPostDomTree(),
- &getAnalysis<MachineLoopInfo>(), MBFI,
+ &getAnalysis<MachineLoopInfoWrapperPass>().getLI(), MBFI,
&getAnalysis<MachineOptimizationRemarkEmitterPass>().getORE());
MF.RenumberBlocks();
@@ -379,7 +379,8 @@ bool MIRProfileLoaderPass::runOnMachineFunction(MachineFunction &MF) {
bool Changed = MIRSampleLoader->runOnFunction(MF);
if (Changed)
- MBFI->calculate(MF, *MBFI->getMBPI(), *&getAnalysis<MachineLoopInfo>());
+ MBFI->calculate(MF, *MBFI->getMBPI(),
+ *&getAnalysis<MachineLoopInfoWrapperPass>().getLI());
if (ViewBFIAfter && ViewBlockLayoutWithBFI != GVDT_None &&
(ViewBlockFreqFuncName.empty() ||
@@ -403,7 +404,7 @@ void MIRProfileLoaderPass::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<MachineBlockFrequencyInfo>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addRequired<MachinePostDominatorTreeWrapperPass>();
- AU.addRequiredTransitive<MachineLoopInfo>();
+ AU.addRequiredTransitive<MachineLoopInfoWrapperPass>();
AU.addRequired<MachineOptimizationRemarkEmitterPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
diff --git a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
index 5698f6d6fea00..7f90457d720b4 100644
--- a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
+++ b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
@@ -389,7 +389,7 @@ class ReleaseModeEvictionAdvisorAnalysis final
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachineBlockFrequencyInfo>();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
RegAllocEvictionAdvisorAnalysis::getAnalysisUsage(AU);
}
@@ -407,7 +407,7 @@ class ReleaseModeEvictionAdvisorAnalysis final
}
return std::make_unique<MLEvictAdvisor>(
MF, RA, Runner.get(), getAnalysis<MachineBlockFrequencyInfo>(),
- getAnalysis<MachineLoopInfo>());
+ getAnalysis<MachineLoopInfoWrapperPass>().getLI());
}
std::unique_ptr<MLModelRunner> Runner;
};
@@ -496,7 +496,7 @@ class DevelopmentModeEvictionAdvisorAnalysis final
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachineBlockFrequencyInfo>();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
RegAllocEvictionAdvisorAnalysis::getAnalysisUsage(AU);
}
@@ -545,7 +545,7 @@ class DevelopmentModeEvictionAdvisorAnalysis final
Log->switchContext(MF.getName());
return std::make_unique<DevelopmentModeEvictAdvisor>(
MF, RA, Runner.get(), getAnalysis<MachineBlockFrequencyInfo>(),
- getAnalysis<MachineLoopInfo>(), Log.get());
+ getAnalysis<MachineLoopInfoWrapperPass>().getLI(), Log.get());
}
std::unique_ptr<MLModelRunner> Runner;
diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp
index 533ab7cccaeb7..b5c3e1625f1ac 100644
--- a/llvm/lib/CodeGen/MachineBasicBlock.cpp
+++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp
@@ -1340,20 +1340,21 @@ MachineBasicBlock *MachineBasicBlock::SplitCriticalEdge(
P.getAnalysisIfAvailable<MachineDominatorTreeWrapperPass>())
MDTWrapper->getDomTree().recordSplitCriticalEdge(this, Succ, NMBB);
- if (MachineLoopInfo *MLI = P.getAnalysisIfAvailable<MachineLoopInfo>())
+ auto *MLIWrapper = P.getAnalysisIfAvailable<MachineLoopInfoWrapperPass>();
+ if (MachineLoopInfo *MLI = MLIWrapper ? &MLIWrapper->getLI() : nullptr)
if (MachineLoop *TIL = MLI->getLoopFor(this)) {
// If one or the other blocks were not in a loop, the new block is not
// either, and thus LI doesn't need to be updated.
if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {
if (TIL == DestLoop) {
// Both in the same loop, the NMBB joins loop.
- DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
+ DestLoop->addBasicBlockToLoop(NMBB, *MLI);
} else if (TIL->contains(DestLoop)) {
// Edge from an outer loop to an inner loop. Add to the outer loop.
- TIL->addBasicBlockToLoop(NMBB, MLI->getBase());
+ TIL->addBasicBlockToLoop(NMBB, *MLI);
} else if (DestLoop->contains(TIL)) {
// Edge from an inner loop to an outer loop. Add to the outer loop.
- DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
+ DestLoop->addBasicBlockToLoop(NMBB, *MLI);
} else {
// Edge from two loops with no containment relation. Because these
// are natural loops, we know that the destination block must be the
@@ -1362,7 +1363,7 @@ MachineBasicBlock *MachineBasicBlock::SplitCriticalEdge(
assert(DestLoop->getHeader() == Succ &&
"Should not create irreducible loops!");
if (MachineLoop *P = DestLoop->getParentLoop())
- P->addBasicBlockToLoop(NMBB, MLI->getBase());
+ P->addBasicBlockToLoop(NMBB, *MLI);
}
}
}
diff --git a/llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp b/llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp
index 2a68f18d9bc76..5c053a4f1cdb8 100644
--- a/llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp
+++ b/llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp
@@ -164,7 +164,7 @@ struct DOTGraphTraits<MachineBlockFrequencyInfo *>
INITIALIZE_PASS_BEGIN(MachineBlockFrequencyInfo, DEBUG_TYPE,
"Machine Block Frequency Analysis", true, true)
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfoWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_END(MachineBlockFrequencyInfo, DEBUG_TYPE,
"Machine Block Frequency Analysis", true, true)
@@ -186,7 +186,7 @@ MachineBlockFrequencyInfo::~MachineBlockFrequencyInfo() = default;
void MachineBlockFrequencyInfo::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -210,7 +210,7 @@ void MachineBlockFrequencyInfo::calculate(
bool MachineBlockFrequencyInfo::runOnMachineFunction(MachineFunction &F) {
MachineBranchProbabilityInfo &MBPI =
getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI();
- MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>();
+ MachineLoopInfo &MLI = getAnalysis<MachineLoopInfoWrapperPass>().getLI();
calculate(F, MBPI, MLI);
return false;
}
diff --git a/llvm/lib/CodeGen/MachineBlockPlacement.cpp b/llvm/lib/CodeGen/MachineBlockPlacement.cpp
index a229475df8fee..14e01265862f9 100644
--- a/llvm/lib/CodeGen/MachineBlockPlacement.cpp
+++ b/llvm/lib/CodeGen/MachineBlockPlacement.cpp
@@ -612,7 +612,7 @@ class MachineBlockPlacement : public MachineFunctionPass {
AU.addRequired<MachineBlockFrequencyInfo>();
if (TailDupPlacement)
AU.addRequired<MachinePostDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
AU.addRequired<ProfileSummaryInfoWrapperPass>();
AU.addRequired<TargetPassConfig>();
MachineFunctionPass::getAnalysisUsage(AU);
@@ -630,7 +630,7 @@ INITIALIZE_PASS_BEGIN(MachineBlockPlacement, DEBUG_TYPE,
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(ProfileSummaryInfoWrapperPass)
INITIALIZE_PASS_END(MachineBlockPlacement, DEBUG_TYPE,
"Branch Probability Basic Block Placement", false, false)
@@ -3428,7 +3428,7 @@ bool MachineBlockPlacement::runOnMachineFunction(MachineFunction &MF) {
MBPI = &getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI();
MBFI = std::make_unique<MBFIWrapper>(
getAnalysis<MachineBlockFrequencyInfo>());
- MLI = &getAnalysis<MachineLoopInfo>();
+ MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
TII = MF.getSubtarget().getInstrInfo();
TLI = MF.getSubtarget().getTargetLowering();
MPDT = nullptr;
diff --git a/llvm/lib/CodeGen/MachineCombiner.cpp b/llvm/lib/CodeGen/MachineCombiner.cpp
index 3bd3b8a386b41..1a19e053d30fe 100644
--- a/llvm/lib/CodeGen/MachineCombiner.cpp
+++ b/llvm/lib/CodeGen/MachineCombiner.cpp
@@ -132,7 +132,7 @@ char &llvm::MachineCombinerID = MachineCombiner::ID;
INITIALIZE_PASS_BEGIN(MachineCombiner, DEBUG_TYPE,
"Machine InstCombiner", false, false)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineTraceMetrics)
INITIALIZE_PASS_END(MachineCombiner, DEBUG_TYPE, "Machine InstCombiner",
false, false)
@@ -140,8 +140,8 @@ INITIALIZE_PASS_END(MachineCombiner, DEBUG_TYPE, "Machine InstCombiner",
void MachineCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesCFG();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
AU.addRequired<MachineTraceMetrics>();
AU.addPreserved<MachineTraceMetrics>();
AU.addRequired<LazyMachineBlockFrequencyInfoPass>();
@@ -726,7 +726,7 @@ bool MachineCombiner::runOnMachineFunction(MachineFunction &MF) {
SchedModel = STI->getSchedModel();
TSchedModel.init(STI);
MRI = &MF.getRegInfo();
- MLI = &getAnalysis<MachineLoopInfo>();
+ MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
Traces = &getAnalysis<MachineTraceMetrics>();
PSI = &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
MBFI = (PSI && PSI->hasProfileSummary()) ?
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp
index 287bd00aeba82..7a0c8ba081850 100644
--- a/llvm/lib/CodeGen/MachineLICM.cpp
+++ b/llvm/lib/CodeGen/MachineLICM.cpp
@@ -188,12 +188,12 @@ namespace {
bool runOnMachineFunction(MachineFunction &MF) override;
void getAnalysisUsage(AnalysisUsage &AU) const override {
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
if (DisableHoistingToHotterBlocks != UseBFI::None)
AU.addRequired<MachineBlockFrequencyInfo>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addRequired<AAResultsWrapperPass>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -323,7 +323,7 @@ char &llvm::EarlyMachineLICMID = EarlyMachineLICM::ID;
INITIALIZE_PASS_BEGIN(MachineLICM, DEBUG_TYPE,
"Machine Loop Invariant Code Motion", false, false)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
@@ -332,7 +332,7 @@ INITIALIZE_PASS_END(MachineLICM, DEBUG_TYPE,
INITIALIZE_PASS_BEGIN(EarlyMachineLICM, "early-machinelicm",
"Early Machine Loop Invariant Code Motion", false, false)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
@@ -374,7 +374,7 @@ bool MachineLICMBase::runOnMachineFunction(MachineFunction &MF) {
// Get our Loop information...
if (DisableHoistingToHotterBlocks != UseBFI::None)
MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
- MLI = &getAnalysis<MachineLoopInfo>();
+ MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
DT = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
diff --git a/llvm/lib/CodeGen/MachineLoopInfo.cpp b/llvm/lib/CodeGen/MachineLoopInfo.cpp
index 9fb103945838a..a03c008e6045a 100644
--- a/llvm/lib/CodeGen/MachineLoopInfo.cpp
+++ b/llvm/lib/CodeGen/MachineLoopInfo.cpp
@@ -30,29 +30,57 @@ using namespace llvm;
template class llvm::LoopBase<MachineBasicBlock, MachineLoop>;
template class llvm::LoopInfoBase<MachineBasicBlock, MachineLoop>;
-char MachineLoopInfo::ID = 0;
-MachineLoopInfo::MachineLoopInfo() : MachineFunctionPass(ID) {
- initializeMachineLoopInfoPass(*PassRegistry::getPassRegistry());
+AnalysisKey MachineLoopAnalysis::Key;
+
+MachineLoopAnalysis::Result
+MachineLoopAnalysis::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ return MachineLoopInfo(MFAM.getResult<MachineDominatorTreeAnalysis>(MF));
+}
+
+PreservedAnalyses
+MachineLoopPrinterPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ OS << "Machine loop info for machine function '" << MF.getName() << "':\n";
+ MFAM.getResult<MachineLoopAnalysis>(MF).print(OS);
+ return PreservedAnalyses::all();
}
-INITIALIZE_PASS_BEGIN(MachineLoopInfo, "machine-loops",
- "Machine Natural Loop Construction", true, true)
+
+char MachineLoopInfoWrapperPass::ID = 0;
+MachineLoopInfoWrapperPass::MachineLoopInfoWrapperPass()
+ : MachineFunctionPass(ID) {
+ initializeMachineLoopInfoWrapperPassPass(*PassRegistry::getPassRegistry());
+}
+INITIALIZE_PASS_BEGIN(MachineLoopInfoWrapperPass, "machine-loops",
+ "Machine Natural Loop Construction", true, true)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
-INITIALIZE_PASS_END(MachineLoopInfo, "machine-loops",
- "Machine Natural Loop Construction", true, true)
+INITIALIZE_PASS_END(MachineLoopInfoWrapperPass, "machine-loops",
+ "Machine Natural Loop Construction", true, true)
-char &llvm::MachineLoopInfoID = MachineLoopInfo::ID;
+char &llvm::MachineLoopInfoID = MachineLoopInfoWrapperPass::ID;
-bool MachineLoopInfo::runOnMachineFunction(MachineFunction &) {
- calculate(getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree());
+bool MachineLoopInfoWrapperPass::runOnMachineFunction(MachineFunction &) {
+ LI.calculate(getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree());
return false;
}
+bool MachineLoopInfo::invalidate(
+ MachineFunction &, const PreservedAnalyses &PA,
+ MachineFunctionAnalysisManager::Invalidator &) {
+ // Check whether the analysis, all analyses on functions, or the function's
+ // CFG have been preserved.
+ auto PAC = PA.getChecker<MachineLoopAnalysis>();
+ return !PAC.preserved() &&
+ !PAC.preservedSet<AllAnalysesOn<MachineFunction>>() &&
+ !PAC.preservedSet<CFGAnalyses>();
+}
+
void MachineLoopInfo::calculate(MachineDominatorTree &MDT) {
releaseMemory();
- LI.analyze(MDT.getBase());
+ analyze(MDT.getBase());
}
-void MachineLoopInfo::getAnalysisUsage(AnalysisUsage &AU) const {
+void MachineLoopInfoWrapperPass::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
AU.addRequired<MachineDominatorTreeWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp b/llvm/lib/CodeGen/MachinePipeliner.cpp
index 7ff14a6cf36bf..cea8660db2e86 100644
--- a/llvm/lib/CodeGen/MachinePipeliner.cpp
+++ b/llvm/lib/CodeGen/MachinePipeliner.cpp
@@ -234,7 +234,7 @@ char &llvm::MachinePipelinerID = MachinePipeliner::ID;
INITIALIZE_PASS_BEGIN(MachinePipeliner, DEBUG_TYPE,
"Modulo Software Pipelining", false, false)
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
INITIALIZE_PASS_END(MachinePipeliner, DEBUG_TYPE,
@@ -263,7 +263,7 @@ bool MachinePipeliner::runOnMachineFunction(MachineFunction &mf) {
return false;
MF = &mf;
- MLI = &getAnalysis<MachineLoopInfo>();
+ MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
MDT = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
ORE = &getAnalysis<MachineOptimizationRemarkEmitterPass>().getORE();
TII = MF->getSubtarget().getInstrInfo();
@@ -499,7 +499,7 @@ bool MachinePipeliner::swingModuloScheduler(MachineLoop &L) {
void MachinePipeliner::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<AAResultsWrapperPass>();
AU.addPreserved<AAResultsWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addRequired<LiveIntervals>();
AU.addRequired<MachineOptimizationRemarkEmitterPass>();
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
index 4a6d5edcfc885..84ba703742553 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -267,7 +267,7 @@ INITIALIZE_PASS_BEGIN(MachineScheduler, DEBUG_TYPE,
"Machine Instruction Scheduler", false, false)
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
INITIALIZE_PASS_END(MachineScheduler, DEBUG_TYPE,
@@ -280,7 +280,7 @@ MachineScheduler::MachineScheduler() : MachineSchedulerBase(ID) {
void MachineScheduler::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesCFG();
AU.addRequired<MachineDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
AU.addRequired<AAResultsWrapperPass>();
AU.addRequired<TargetPassConfig>();
AU.addRequired<SlotIndexes>();
@@ -297,7 +297,7 @@ char &llvm::PostMachineSchedulerID = PostMachineScheduler::ID;
INITIALIZE_PASS_BEGIN(PostMachineScheduler, "postmisched",
"PostRA Machine Instruction Scheduler", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
INITIALIZE_PASS_END(PostMachineScheduler, "postmisched",
"PostRA Machine Instruction Scheduler", false, false)
@@ -309,7 +309,7 @@ PostMachineScheduler::PostMachineScheduler() : MachineSchedulerBase(ID) {
void PostMachineScheduler::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesCFG();
AU.addRequired<MachineDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
AU.addRequired<AAResultsWrapperPass>();
AU.addRequired<TargetPassConfig>();
MachineFunctionPass::getAnalysisUsage(AU);
@@ -444,7 +444,7 @@ bool MachineScheduler::runOnMachineFunction(MachineFunction &mf) {
// Initialize the context of the pass.
MF = &mf;
- MLI = &getAnalysis<MachineLoopInfo>();
+ MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
MDT = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
PassConfig = &getAnalysis<TargetPassConfig>();
AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
@@ -491,7 +491,7 @@ bool PostMachineScheduler::runOnMachineFunction(MachineFunction &mf) {
// Initialize the context of the pass.
MF = &mf;
- MLI = &getAnalysis<MachineLoopInfo>();
+ MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
PassConfig = &getAnalysis<TargetPassConfig>();
AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index 4dabaabe3659f..83c2895f91fbb 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -189,7 +189,7 @@ namespace {
AU.addRequired<MachineCycleInfoWrapperPass>();
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
AU.addPreserved<MachineCycleInfoWrapperPass>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
if (UseBlockFreqInfo)
AU.addRequired<MachineBlockFrequencyInfo>();
AU.addRequired<TargetPassConfig>();
diff --git a/llvm/lib/CodeGen/MachineTraceMetrics.cpp b/llvm/lib/CodeGen/MachineTraceMetrics.cpp
index 0f44777634e6d..bf3add010574b 100644
--- a/llvm/lib/CodeGen/MachineTraceMetrics.cpp
+++ b/llvm/lib/CodeGen/MachineTraceMetrics.cpp
@@ -47,7 +47,7 @@ char &llvm::MachineTraceMetricsID = MachineTraceMetrics::ID;
INITIALIZE_PASS_BEGIN(MachineTraceMetrics, DEBUG_TYPE,
"Machine Trace Metrics", false, true)
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfoWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_END(MachineTraceMetrics, DEBUG_TYPE,
"Machine Trace Metrics", false, true)
@@ -58,7 +58,7 @@ MachineTraceMetrics::MachineTraceMetrics() : MachineFunctionPass(ID) {
void MachineTraceMetrics::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -68,7 +68,7 @@ bool MachineTraceMetrics::runOnMachineFunction(MachineFunction &Func) {
TII = ST.getInstrInfo();
TRI = ST.getRegisterInfo();
MRI = &MF->getRegInfo();
- Loops = &getAnalysis<MachineLoopInfo>();
+ Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
SchedModel.init(&ST);
BlockInfo.resize(MF->getNumBlockIDs());
ProcReleaseAtCycles.resize(MF->getNumBlockIDs() *
diff --git a/llvm/lib/CodeGen/ModuloSchedule.cpp b/llvm/lib/CodeGen/ModuloSchedule.cpp
index 0aed235ec39b5..8b4a6fe1d4cec 100644
--- a/llvm/lib/CodeGen/ModuloSchedule.cpp
+++ b/llvm/lib/CodeGen/ModuloSchedule.cpp
@@ -2763,7 +2763,7 @@ class ModuloScheduleTest : public MachineFunctionPass {
void runOnLoop(MachineFunction &MF, MachineLoop &L);
void getAnalysisUsage(AnalysisUsage &AU) const override {
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
AU.addRequired<LiveIntervals>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -2774,13 +2774,13 @@ char ModuloScheduleTest::ID = 0;
INITIALIZE_PASS_BEGIN(ModuloScheduleTest, "modulo-schedule-test",
"Modulo Schedule test pass", false, false)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
INITIALIZE_PASS_END(ModuloScheduleTest, "modulo-schedule-test",
"Modulo Schedule test pass", false, false)
bool ModuloScheduleTest::runOnMachineFunction(MachineFunction &MF) {
- MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>();
+ MachineLoopInfo &MLI = getAnalysis<MachineLoopInfoWrapperPass>().getLI();
for (auto *L : MLI) {
if (L->getTopBlock() != L->getBottomBlock())
continue;
diff --git a/llvm/lib/CodeGen/PHIElimination.cpp b/llvm/lib/CodeGen/PHIElimination.cpp
index 592972f5c83b2..2a5c8e478ebb1 100644
--- a/llvm/lib/CodeGen/PHIElimination.cpp
+++ b/llvm/lib/CodeGen/PHIElimination.cpp
@@ -140,7 +140,7 @@ void PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<SlotIndexes>();
AU.addPreserved<LiveIntervals>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -182,7 +182,9 @@ bool PHIElimination::runOnMachineFunction(MachineFunction &MF) {
}
}
- MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>();
+ MachineLoopInfoWrapperPass *MLIWrapper =
+ getAnalysisIfAvailable<MachineLoopInfoWrapperPass>();
+ MachineLoopInfo *MLI = MLIWrapper ? &MLIWrapper->getLI() : nullptr;
for (auto &MBB : MF)
Changed |= SplitPHIEdges(MF, MBB, MLI, (LV ? &LiveInSets : nullptr));
}
diff --git a/llvm/lib/CodeGen/PeepholeOptimizer.cpp b/llvm/lib/CodeGen/PeepholeOptimizer.cpp
index 2e078be29082d..746ec0fa9da09 100644
--- a/llvm/lib/CodeGen/PeepholeOptimizer.cpp
+++ b/llvm/lib/CodeGen/PeepholeOptimizer.cpp
@@ -169,8 +169,8 @@ namespace {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
MachineFunctionPass::getAnalysisUsage(AU);
- AU.addRequired<MachineLoopInfo>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
if (Aggressive) {
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
@@ -488,7 +488,7 @@ char &llvm::PeepholeOptimizerID = PeepholeOptimizer::ID;
INITIALIZE_PASS_BEGIN(PeepholeOptimizer, DEBUG_TYPE,
"Peephole Optimizations", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_END(PeepholeOptimizer, DEBUG_TYPE,
"Peephole Optimizations", false, false)
@@ -1671,7 +1671,7 @@ bool PeepholeOptimizer::runOnMachineFunction(MachineFunction &MF) {
MRI = &MF.getRegInfo();
DT = Aggressive ? &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree()
: nullptr;
- MLI = &getAnalysis<MachineLoopInfo>();
+ MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
MF.setDelegate(this);
bool Changed = false;
diff --git a/llvm/lib/CodeGen/PostRASchedulerList.cpp b/llvm/lib/CodeGen/PostRASchedulerList.cpp
index 8005050d5215a..2f7cfdd275b4f 100644
--- a/llvm/lib/CodeGen/PostRASchedulerList.cpp
+++ b/llvm/lib/CodeGen/PostRASchedulerList.cpp
@@ -87,8 +87,8 @@ namespace {
AU.addRequired<TargetPassConfig>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -279,7 +279,7 @@ bool PostRAScheduler::runOnMachineFunction(MachineFunction &Fn) {
return false;
TII = Fn.getSubtarget().getInstrInfo();
- MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>();
+ MachineLoopInfo &MLI = getAnalysis<MachineLoopInfoWrapperPass>().getLI();
AliasAnalysis *AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
TargetPassConfig *PassConfig = &getAnalysis<TargetPassConfig>();
diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
index ca54e88177e98..3db5e17615fd4 100644
--- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
@@ -150,7 +150,7 @@ char &llvm::PrologEpilogCodeInserterID = PEI::ID;
INITIALIZE_PASS_BEGIN(PEI, DEBUG_TYPE, "Prologue/Epilogue Insertion", false,
false)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineOptimizationRemarkEmitterPass)
INITIALIZE_PASS_END(PEI, DEBUG_TYPE,
@@ -166,7 +166,7 @@ STATISTIC(NumBytesStackSpace,
void PEI::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesCFG();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
AU.addRequired<MachineOptimizationRemarkEmitterPass>();
MachineFunctionPass::getAnalysisUsage(AU);
diff --git a/llvm/lib/CodeGen/RegAllocBasic.cpp b/llvm/lib/CodeGen/RegAllocBasic.cpp
index f465c63cf1040..2062334bd7f4b 100644
--- a/llvm/lib/CodeGen/RegAllocBasic.cpp
+++ b/llvm/lib/CodeGen/RegAllocBasic.cpp
@@ -137,7 +137,7 @@ INITIALIZE_PASS_DEPENDENCY(MachineScheduler)
INITIALIZE_PASS_DEPENDENCY(LiveStacks)
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMap)
INITIALIZE_PASS_DEPENDENCY(LiveRegMatrix)
INITIALIZE_PASS_END(RABasic, "regallocbasic", "Basic Register Allocator", false,
@@ -188,8 +188,8 @@ void RABasic::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<MachineBlockFrequencyInfo>();
AU.addRequiredID(MachineDominatorsID);
AU.addPreservedID(MachineDominatorsID);
- AU.addRequired<MachineLoopInfo>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
AU.addRequired<VirtRegMap>();
AU.addPreserved<VirtRegMap>();
AU.addRequired<LiveRegMatrix>();
@@ -312,7 +312,8 @@ bool RABasic::runOnMachineFunction(MachineFunction &mf) {
RegAllocBase::init(getAnalysis<VirtRegMap>(),
getAnalysis<LiveIntervals>(),
getAnalysis<LiveRegMatrix>());
- VirtRegAuxInfo VRAI(*MF, *LIS, *VRM, getAnalysis<MachineLoopInfo>(),
+ VirtRegAuxInfo VRAI(*MF, *LIS, *VRM,
+ getAnalysis<MachineLoopInfoWrapperPass>().getLI(),
getAnalysis<MachineBlockFrequencyInfo>());
VRAI.calculateSpillWeightsAndHints();
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index 19c1ee23af858..b79b0e54124ce 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -161,7 +161,7 @@ INITIALIZE_PASS_DEPENDENCY(RegisterCoalescer)
INITIALIZE_PASS_DEPENDENCY(MachineScheduler)
INITIALIZE_PASS_DEPENDENCY(LiveStacks)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMap)
INITIALIZE_PASS_DEPENDENCY(LiveRegMatrix)
INITIALIZE_PASS_DEPENDENCY(EdgeBundles)
@@ -215,8 +215,8 @@ void RAGreedy::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<LiveStacks>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
AU.addRequired<VirtRegMap>();
AU.addPreserved<VirtRegMap>();
AU.addRequired<LiveRegMatrix>();
@@ -2731,7 +2731,7 @@ bool RAGreedy::runOnMachineFunction(MachineFunction &mf) {
MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
DomTree = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
ORE = &getAnalysis<MachineOptimizationRemarkEmitterPass>().getORE();
- Loops = &getAnalysis<MachineLoopInfo>();
+ Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
Bundles = &getAnalysis<EdgeBundles>();
SpillPlacer = &getAnalysis<SpillPlacement>();
DebugVars = &getAnalysis<LiveDebugVariables>();
diff --git a/llvm/lib/CodeGen/RegAllocPBQP.cpp b/llvm/lib/CodeGen/RegAllocPBQP.cpp
index 88ba843067e5a..293c01b0f1176 100644
--- a/llvm/lib/CodeGen/RegAllocPBQP.cpp
+++ b/llvm/lib/CodeGen/RegAllocPBQP.cpp
@@ -555,8 +555,8 @@ void RegAllocPBQP::getAnalysisUsage(AnalysisUsage &au) const {
au.addPreserved<LiveStacks>();
au.addRequired<MachineBlockFrequencyInfo>();
au.addPreserved<MachineBlockFrequencyInfo>();
- au.addRequired<MachineLoopInfo>();
- au.addPreserved<MachineLoopInfo>();
+ au.addRequired<MachineLoopInfoWrapperPass>();
+ au.addPreserved<MachineLoopInfoWrapperPass>();
au.addRequired<MachineDominatorTreeWrapperPass>();
au.addPreserved<MachineDominatorTreeWrapperPass>();
au.addRequired<VirtRegMap>();
@@ -797,15 +797,16 @@ bool RegAllocPBQP::runOnMachineFunction(MachineFunction &MF) {
VirtRegMap &VRM = getAnalysis<VirtRegMap>();
- PBQPVirtRegAuxInfo VRAI(MF, LIS, VRM, getAnalysis<MachineLoopInfo>(), MBFI);
+ PBQPVirtRegAuxInfo VRAI(
+ MF, LIS, VRM, getAnalysis<MachineLoopInfoWrapperPass>().getLI(), MBFI);
VRAI.calculateSpillWeightsAndHints();
// FIXME: we create DefaultVRAI here to match existing behavior pre-passing
// the VRAI through the spiller to the live range editor. However, it probably
// makes more sense to pass the PBQP VRAI. The existing behavior had
// LiveRangeEdit make its own VirtRegAuxInfo object.
- VirtRegAuxInfo DefaultVRAI(MF, LIS, VRM, getAnalysis<MachineLoopInfo>(),
- MBFI);
+ VirtRegAuxInfo DefaultVRAI(
+ MF, LIS, VRM, getAnalysis<MachineLoopInfoWrapperPass>().getLI(), MBFI);
std::unique_ptr<Spiller> VRegSpiller(
createInlineSpiller(*this, MF, VRM, DefaultVRAI));
diff --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp
index 9f4f23807d82f..7c7fb8fe0cfe2 100644
--- a/llvm/lib/CodeGen/RegisterCoalescer.cpp
+++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp
@@ -408,7 +408,7 @@ INITIALIZE_PASS_BEGIN(RegisterCoalescer, "register-coalescer",
"Register Coalescer", false, false)
INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
INITIALIZE_PASS_END(RegisterCoalescer, "register-coalescer",
"Register Coalescer", false, false)
@@ -591,8 +591,8 @@ void RegisterCoalescer::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<LiveIntervals>();
AU.addPreserved<LiveIntervals>();
AU.addPreserved<SlotIndexes>();
- AU.addRequired<MachineLoopInfo>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
AU.addPreservedID(MachineDominatorsID);
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -4208,7 +4208,7 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
TII = STI.getInstrInfo();
LIS = &getAnalysis<LiveIntervals>();
AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
- Loops = &getAnalysis<MachineLoopInfo>();
+ Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
if (EnableGlobalCopies == cl::BOU_UNSET)
JoinGlobalCopies = STI.enableJoinGlobalCopies();
else
diff --git a/llvm/lib/CodeGen/ShrinkWrap.cpp b/llvm/lib/CodeGen/ShrinkWrap.cpp
index eb370163e1f4e..28b2beceb2ddb 100644
--- a/llvm/lib/CodeGen/ShrinkWrap.cpp
+++ b/llvm/lib/CodeGen/ShrinkWrap.cpp
@@ -230,7 +230,7 @@ class ShrinkWrap : public MachineFunctionPass {
Save = nullptr;
Restore = nullptr;
MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
- MLI = &getAnalysis<MachineLoopInfo>();
+ MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
ORE = &getAnalysis<MachineOptimizationRemarkEmitterPass>().getORE();
EntryFreq = MBFI->getEntryFreq();
const TargetSubtargetInfo &Subtarget = MF.getSubtarget();
@@ -264,7 +264,7 @@ class ShrinkWrap : public MachineFunctionPass {
AU.addRequired<MachineBlockFrequencyInfo>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addRequired<MachinePostDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
AU.addRequired<MachineOptimizationRemarkEmitterPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -291,7 +291,7 @@ INITIALIZE_PASS_BEGIN(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineOptimizationRemarkEmitterPass)
INITIALIZE_PASS_END(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)
diff --git a/llvm/lib/CodeGen/StackSlotColoring.cpp b/llvm/lib/CodeGen/StackSlotColoring.cpp
index a24e3479a1229..5f039ea63a823 100644
--- a/llvm/lib/CodeGen/StackSlotColoring.cpp
+++ b/llvm/lib/CodeGen/StackSlotColoring.cpp
@@ -187,7 +187,7 @@ INITIALIZE_PASS_BEGIN(StackSlotColoring, DEBUG_TYPE,
"Stack Slot Coloring", false, false)
INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
INITIALIZE_PASS_DEPENDENCY(LiveStacks)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_END(StackSlotColoring, DEBUG_TYPE,
"Stack Slot Coloring", false, false)
diff --git a/llvm/lib/CodeGen/UnreachableBlockElim.cpp b/llvm/lib/CodeGen/UnreachableBlockElim.cpp
index 4cf025261d620..8194f3ca5610f 100644
--- a/llvm/lib/CodeGen/UnreachableBlockElim.cpp
+++ b/llvm/lib/CodeGen/UnreachableBlockElim.cpp
@@ -89,7 +89,7 @@ INITIALIZE_PASS(UnreachableMachineBlockElim, "unreachable-mbb-elimination",
char &llvm::UnreachableMachineBlockElimID = UnreachableMachineBlockElim::ID;
void UnreachableMachineBlockElim::getAnalysisUsage(AnalysisUsage &AU) const {
- AU.addPreserved<MachineLoopInfo>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -101,7 +101,9 @@ bool UnreachableMachineBlockElim::runOnMachineFunction(MachineFunction &F) {
MachineDominatorTreeWrapperPass *MDTWrapper =
getAnalysisIfAvailable<MachineDominatorTreeWrapperPass>();
MachineDominatorTree *MDT = MDTWrapper ? &MDTWrapper->getDomTree() : nullptr;
- MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>();
+ MachineLoopInfoWrapperPass *MLIWrapper =
+ getAnalysisIfAvailable<MachineLoopInfoWrapperPass>();
+ MachineLoopInfo *MLI = MLIWrapper ? &MLIWrapper->getLI() : nullptr;
// Mark all reachable blocks.
for (MachineBasicBlock *BB : depth_first_ext(&F, Reachable))
diff --git a/llvm/lib/CodeGen/XRayInstrumentation.cpp b/llvm/lib/CodeGen/XRayInstrumentation.cpp
index a74362e888397..d7cc5d5c2b41d 100644
--- a/llvm/lib/CodeGen/XRayInstrumentation.cpp
+++ b/llvm/lib/CodeGen/XRayInstrumentation.cpp
@@ -52,7 +52,7 @@ struct XRayInstrumentation : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -180,10 +180,11 @@ bool XRayInstrumentation::runOnMachineFunction(MachineFunction &MF) {
}
// Get MachineLoopInfo or compute it on the fly if it's unavailable
- auto *MLI = getAnalysisIfAvailable<MachineLoopInfo>();
+ auto *MLIWrapper = getAnalysisIfAvailable<MachineLoopInfoWrapperPass>();
+ auto *MLI = MLIWrapper ? &MLIWrapper->getLI() : nullptr;
MachineLoopInfo ComputedMLI;
if (!MLI) {
- ComputedMLI.getBase().analyze(MDT->getBase());
+ ComputedMLI.analyze(MDT->getBase());
MLI = &ComputedMLI;
}
@@ -266,6 +267,6 @@ char XRayInstrumentation::ID = 0;
char &llvm::XRayInstrumentationID = XRayInstrumentation::ID;
INITIALIZE_PASS_BEGIN(XRayInstrumentation, "xray-instrumentation",
"Insert XRay ops", false, false)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_END(XRayInstrumentation, "xray-instrumentation",
"Insert XRay ops", false, false)
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index 17cc156846d36..6afcf35eb9869 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -96,6 +96,7 @@
#include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunctionAnalysis.h"
+#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/MachinePostDominators.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
diff --git a/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp b/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
index 3c2201ec4c998..fc4d05c4b8b21 100644
--- a/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
@@ -808,8 +808,8 @@ void AArch64ConditionalCompares::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
AU.addRequired<MachineTraceMetrics>();
AU.addPreserved<MachineTraceMetrics>();
MachineFunctionPass::getAnalysisUsage(AU);
@@ -934,7 +934,7 @@ bool AArch64ConditionalCompares::runOnMachineFunction(MachineFunction &MF) {
SchedModel = MF.getSubtarget().getSchedModel();
MRI = &MF.getRegInfo();
DomTree = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
- Loops = &getAnalysis<MachineLoopInfo>();
+ Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
MBPI = &getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI();
Traces = &getAnalysis<MachineTraceMetrics>();
MinInstr = nullptr;
diff --git a/llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp b/llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
index 7544786d9f6c8..836773013209c 100644
--- a/llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
@@ -188,7 +188,7 @@ class FalkorHWPFFix : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -223,7 +223,7 @@ char FalkorHWPFFix::ID = 0;
INITIALIZE_PASS_BEGIN(FalkorHWPFFix, "aarch64-falkor-hwpf-fix-late",
"Falkor HW Prefetch Fix Late Phase", false, false)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_END(FalkorHWPFFix, "aarch64-falkor-hwpf-fix-late",
"Falkor HW Prefetch Fix Late Phase", false, false)
@@ -821,7 +821,7 @@ bool FalkorHWPFFix::runOnMachineFunction(MachineFunction &Fn) {
TII = static_cast<const AArch64InstrInfo *>(ST.getInstrInfo());
TRI = ST.getRegisterInfo();
- MachineLoopInfo &LI = getAnalysis<MachineLoopInfo>();
+ MachineLoopInfo &LI = getAnalysis<MachineLoopInfoWrapperPass>().getLI();
Modified = false;
diff --git a/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp b/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
index 22da7ddef98a2..bd11bc4dd6e3f 100644
--- a/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
+++ b/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
@@ -136,7 +136,7 @@ struct AArch64MIPeepholeOpt : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
};
@@ -697,7 +697,7 @@ bool AArch64MIPeepholeOpt::runOnMachineFunction(MachineFunction &MF) {
TII = static_cast<const AArch64InstrInfo *>(MF.getSubtarget().getInstrInfo());
TRI = static_cast<const AArch64RegisterInfo *>(
MF.getSubtarget().getRegisterInfo());
- MLI = &getAnalysis<MachineLoopInfo>();
+ MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
MRI = &MF.getRegInfo();
assert(MRI->isSSA() && "Expected to be run on SSA form!");
diff --git a/llvm/lib/Target/AMDGPU/R600MachineCFGStructurizer.cpp b/llvm/lib/Target/AMDGPU/R600MachineCFGStructurizer.cpp
index 1a73fdf028c9a..5f9a77ea6d8c3 100644
--- a/llvm/lib/Target/AMDGPU/R600MachineCFGStructurizer.cpp
+++ b/llvm/lib/Target/AMDGPU/R600MachineCFGStructurizer.cpp
@@ -115,7 +115,7 @@ class R600MachineCFGStructurizer : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addRequired<MachinePostDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -138,7 +138,7 @@ class R600MachineCFGStructurizer : public MachineFunctionPass {
OrderedBlks.clear();
Visited.clear();
FuncRep = &MF;
- MLI = &getAnalysis<MachineLoopInfo>();
+ MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
LLVM_DEBUG(dbgs() << "LoopInfo:\n"; PrintLoopinfo(*MLI););
MDT = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
LLVM_DEBUG(MDT->print(dbgs()););
@@ -1631,7 +1631,7 @@ INITIALIZE_PASS_BEGIN(R600MachineCFGStructurizer, "amdgpustructurizer",
"AMDGPU CFG Structurizer", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_END(R600MachineCFGStructurizer, "amdgpustructurizer",
"AMDGPU CFG Structurizer", false, false)
diff --git a/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp b/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
index 8bac570d59d4a..affbae9b31d9f 100644
--- a/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
+++ b/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
@@ -105,8 +105,8 @@ class R600VectorRegMerger : public MachineFunctionPass {
AU.setPreservesCFG();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
diff --git a/llvm/lib/Target/AMDGPU/R600Packetizer.cpp b/llvm/lib/Target/AMDGPU/R600Packetizer.cpp
index 64185db02ec1d..8addd09b1eb56 100644
--- a/llvm/lib/Target/AMDGPU/R600Packetizer.cpp
+++ b/llvm/lib/Target/AMDGPU/R600Packetizer.cpp
@@ -37,8 +37,8 @@ class R600Packetizer : public MachineFunctionPass {
AU.setPreservesCFG();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -321,7 +321,7 @@ bool R600Packetizer::runOnMachineFunction(MachineFunction &Fn) {
const R600Subtarget &ST = Fn.getSubtarget<R600Subtarget>();
const R600InstrInfo *TII = ST.getInstrInfo();
- MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>();
+ MachineLoopInfo &MLI = getAnalysis<MachineLoopInfoWrapperPass>().getLI();
// Instantiate the packetizer.
R600PacketizerList Packetizer(Fn, ST, MLI);
diff --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
index 4c53a081cdb29..00eb4d60521ea 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -640,7 +640,7 @@ class SIInsertWaitcnts : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
AU.addRequired<MachinePostDominatorTreeWrapperPass>();
AU.addUsedIfAvailable<AAResultsWrapperPass>();
AU.addPreserved<AAResultsWrapperPass>();
@@ -1117,7 +1117,7 @@ bool WaitcntBrackets::counterOutOfOrder(InstCounterType T) const {
INITIALIZE_PASS_BEGIN(SIInsertWaitcnts, DEBUG_TYPE, "SI Insert Waitcnts", false,
false)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass)
INITIALIZE_PASS_END(SIInsertWaitcnts, DEBUG_TYPE, "SI Insert Waitcnts", false,
false)
@@ -2397,7 +2397,7 @@ bool SIInsertWaitcnts::runOnMachineFunction(MachineFunction &MF) {
TRI = &TII->getRegisterInfo();
MRI = &MF.getRegInfo();
const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
- MLI = &getAnalysis<MachineLoopInfo>();
+ MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
PDT = &getAnalysis<MachinePostDominatorTreeWrapperPass>().getPostDomTree();
if (auto AAR = getAnalysisIfAvailable<AAResultsWrapperPass>())
AA = &AAR->getAAResults();
diff --git a/llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp b/llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
index 18d66e4191522..1e0d1369f09d5 100644
--- a/llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
+++ b/llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
@@ -149,10 +149,10 @@ class SIOptimizeVGPRLiveRange : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<LiveVariables>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
AU.addPreserved<LiveVariables>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -619,7 +619,7 @@ char SIOptimizeVGPRLiveRange::ID = 0;
INITIALIZE_PASS_BEGIN(SIOptimizeVGPRLiveRange, DEBUG_TYPE,
"SI Optimize VGPR LiveRange", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(LiveVariables)
INITIALIZE_PASS_END(SIOptimizeVGPRLiveRange, DEBUG_TYPE,
"SI Optimize VGPR LiveRange", false, false)
@@ -636,7 +636,7 @@ bool SIOptimizeVGPRLiveRange::runOnMachineFunction(MachineFunction &MF) {
TII = ST.getInstrInfo();
TRI = &TII->getRegisterInfo();
MDT = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
- Loops = &getAnalysis<MachineLoopInfo>();
+ Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
LV = &getAnalysis<LiveVariables>();
MRI = &MF.getRegInfo();
diff --git a/llvm/lib/Target/ARM/ARMBlockPlacement.cpp b/llvm/lib/Target/ARM/ARMBlockPlacement.cpp
index 65538009b510d..ec907995e3abc 100644
--- a/llvm/lib/Target/ARM/ARMBlockPlacement.cpp
+++ b/llvm/lib/Target/ARM/ARMBlockPlacement.cpp
@@ -47,7 +47,7 @@ class ARMBlockPlacement : public MachineFunctionPass {
bool revertWhileToDoLoop(MachineInstr *WLS);
void getAnalysisUsage(AnalysisUsage &AU) const override {
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
};
@@ -217,7 +217,7 @@ bool ARMBlockPlacement::runOnMachineFunction(MachineFunction &MF) {
if (!ST.hasLOB())
return false;
LLVM_DEBUG(dbgs() << DEBUG_PREFIX << "Running on " << MF.getName() << "\n");
- MLI = &getAnalysis<MachineLoopInfo>();
+ MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
TII = static_cast<const ARMBaseInstrInfo *>(ST.getInstrInfo());
BBUtils = std::make_unique<ARMBasicBlockUtils>(MF);
MF.RenumberBlocks();
diff --git a/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp b/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
index 48df7d43a280d..65f93e6b0634c 100644
--- a/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
+++ b/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
@@ -484,7 +484,7 @@ namespace {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
AU.addRequired<ReachingDefAnalysis>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -1295,7 +1295,7 @@ bool ARMLowOverheadLoops::runOnMachineFunction(MachineFunction &mf) {
MF = &mf;
LLVM_DEBUG(dbgs() << "ARM Loops on " << MF->getName() << " ------------- \n");
- MLI = &getAnalysis<MachineLoopInfo>();
+ MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
RDA = &getAnalysis<ReachingDefAnalysis>();
MF->getProperties().set(MachineFunctionProperties::Property::TracksLiveness);
MRI = &MF->getRegInfo();
diff --git a/llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp b/llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp
index 4882e8533caf1..006882874019c 100644
--- a/llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp
+++ b/llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp
@@ -57,8 +57,8 @@ class MVETPAndVPTOptimisations : public MachineFunctionPass {
bool runOnMachineFunction(MachineFunction &Fn) override;
void getAnalysisUsage(AnalysisUsage &AU) const override {
- AU.addRequired<MachineLoopInfo>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
@@ -92,7 +92,7 @@ char MVETPAndVPTOptimisations::ID = 0;
INITIALIZE_PASS_BEGIN(MVETPAndVPTOptimisations, DEBUG_TYPE,
"ARM MVE TailPred and VPT Optimisations pass", false,
false)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_END(MVETPAndVPTOptimisations, DEBUG_TYPE,
"ARM MVE TailPred and VPT Optimisations pass", false, false)
@@ -1064,7 +1064,7 @@ bool MVETPAndVPTOptimisations::runOnMachineFunction(MachineFunction &Fn) {
TII = static_cast<const Thumb2InstrInfo *>(STI.getInstrInfo());
MRI = &Fn.getRegInfo();
- MachineLoopInfo *MLI = &getAnalysis<MachineLoopInfo>();
+ MachineLoopInfo *MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
MachineDominatorTree *DT =
&getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
diff --git a/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp b/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
index e99496da8a260..9ddeb0565c764 100644
--- a/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
@@ -164,7 +164,7 @@ namespace {
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -1055,7 +1055,7 @@ bool HexagonEarlyIfConversion::runOnMachineFunction(MachineFunction &MF) {
MFN = &MF;
MRI = &MF.getRegInfo();
MDT = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
- MLI = &getAnalysis<MachineLoopInfo>();
+ MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
MBPI = EnableHexagonBP
? &getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI()
: nullptr;
diff --git a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
index 19a024078b104..2612407659038 100644
--- a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
@@ -119,7 +119,7 @@ namespace {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachineDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -369,7 +369,7 @@ namespace {
INITIALIZE_PASS_BEGIN(HexagonHardwareLoops, "hwloops",
"Hexagon Hardware Loops", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_END(HexagonHardwareLoops, "hwloops",
"Hexagon Hardware Loops", false, false)
@@ -384,7 +384,7 @@ bool HexagonHardwareLoops::runOnMachineFunction(MachineFunction &MF) {
bool Changed = false;
- MLI = &getAnalysis<MachineLoopInfo>();
+ MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
MRI = &MF.getRegInfo();
MDT = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
const HexagonSubtarget &HST = MF.getSubtarget<HexagonSubtarget>();
diff --git a/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp b/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
index 58d4880642125..b29cd86cc3412 100644
--- a/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
@@ -71,8 +71,8 @@ namespace {
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
- AU.addRequired<MachineLoopInfo>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -1191,7 +1191,7 @@ bool HexagonSplitDoubleRegs::runOnMachineFunction(MachineFunction &MF) {
TRI = ST.getRegisterInfo();
TII = ST.getInstrInfo();
MRI = &MF.getRegInfo();
- MLI = &getAnalysis<MachineLoopInfo>();
+ MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
UUSetMap P2Rs;
LoopRegMap IRM;
diff --git a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
index ef2677a6af46a..a92e2b0197d09 100644
--- a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
@@ -98,9 +98,9 @@ namespace {
AU.addRequired<AAResultsWrapperPass>();
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -126,7 +126,7 @@ INITIALIZE_PASS_BEGIN(HexagonPacketizer, "hexagon-packetizer",
"Hexagon Packetizer", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfoWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
INITIALIZE_PASS_END(HexagonPacketizer, "hexagon-packetizer",
"Hexagon Packetizer", false, false)
@@ -211,7 +211,7 @@ bool HexagonPacketizer::runOnMachineFunction(MachineFunction &MF) {
auto &HST = MF.getSubtarget<HexagonSubtarget>();
HII = HST.getInstrInfo();
HRI = HST.getRegisterInfo();
- auto &MLI = getAnalysis<MachineLoopInfo>();
+ auto &MLI = getAnalysis<MachineLoopInfoWrapperPass>().getLI();
auto *AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
auto *MBPI =
&getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI();
diff --git a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
index 1645261d74d06..d6e20932a247e 100644
--- a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
@@ -417,7 +417,7 @@ void NVPTXAsmPrinter::printReturnValStr(const MachineFunction &MF,
// llvm.loop.unroll.disable or llvm.loop.unroll.count=1.
bool NVPTXAsmPrinter::isLoopHeaderOfNoUnroll(
const MachineBasicBlock &MBB) const {
- MachineLoopInfo &LI = getAnalysis<MachineLoopInfo>();
+ MachineLoopInfo &LI = getAnalysis<MachineLoopInfoWrapperPass>().getLI();
// We insert .pragma "nounroll" only to the loop header.
if (!LI.isLoopHeader(&MBB))
return false;
diff --git a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
index 979d185a97f79..d950047dc92c7 100644
--- a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
+++ b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
@@ -255,7 +255,7 @@ class LLVM_LIBRARY_VISIBILITY NVPTXAsmPrinter : public AsmPrinter {
bool runOnMachineFunction(MachineFunction &F) override;
void getAnalysisUsage(AnalysisUsage &AU) const override {
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
AsmPrinter::getAnalysisUsage(AU);
}
diff --git a/llvm/lib/Target/PowerPC/PPCCTRLoops.cpp b/llvm/lib/Target/PowerPC/PPCCTRLoops.cpp
index 491779124e8a7..15401f4284781 100644
--- a/llvm/lib/Target/PowerPC/PPCCTRLoops.cpp
+++ b/llvm/lib/Target/PowerPC/PPCCTRLoops.cpp
@@ -64,7 +64,7 @@ class PPCCTRLoops : public MachineFunctionPass {
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -86,7 +86,7 @@ char PPCCTRLoops::ID = 0;
INITIALIZE_PASS_BEGIN(PPCCTRLoops, DEBUG_TYPE, "PowerPC CTR loops generation",
false, false)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_END(PPCCTRLoops, DEBUG_TYPE, "PowerPC CTR loops generation",
false, false)
@@ -95,7 +95,7 @@ FunctionPass *llvm::createPPCCTRLoopsPass() { return new PPCCTRLoops(); }
bool PPCCTRLoops::runOnMachineFunction(MachineFunction &MF) {
bool Changed = false;
- auto &MLI = getAnalysis<MachineLoopInfo>();
+ auto &MLI = getAnalysis<MachineLoopInfoWrapperPass>().getLI();
TII = static_cast<const PPCInstrInfo *>(MF.getSubtarget().getInstrInfo());
MRI = &MF.getRegInfo();
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
index f746bf4307a08..53bac88df65fb 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
@@ -55,8 +55,8 @@ class WebAssemblyCFGSort final : public MachineFunctionPass {
AU.setPreservesCFG();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
AU.addRequired<WebAssemblyExceptionInfo>();
AU.addPreserved<WebAssemblyExceptionInfo>();
MachineFunctionPass::getAnalysisUsage(AU);
@@ -385,7 +385,7 @@ bool WebAssemblyCFGSort::runOnMachineFunction(MachineFunction &MF) {
"********** Function: "
<< MF.getName() << '\n');
- const auto &MLI = getAnalysis<MachineLoopInfo>();
+ const auto &MLI = getAnalysis<MachineLoopInfoWrapperPass>().getLI();
const auto &WEI = getAnalysis<WebAssemblyExceptionInfo>();
auto &MDT = getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
// Liveness is not tracked for VALUE_STACK physreg.
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
index 77e82a32545f1..70b91c266c497 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
@@ -49,7 +49,7 @@ class WebAssemblyCFGStackify final : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachineDominatorTreeWrapperPass>();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
AU.addRequired<WebAssemblyExceptionInfo>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -397,7 +397,7 @@ void WebAssemblyCFGStackify::placeBlockMarker(MachineBasicBlock &MBB) {
/// Insert a LOOP marker for a loop starting at MBB (if it's a loop header).
void WebAssemblyCFGStackify::placeLoopMarker(MachineBasicBlock &MBB) {
MachineFunction &MF = *MBB.getParent();
- const auto &MLI = getAnalysis<MachineLoopInfo>();
+ const auto &MLI = getAnalysis<MachineLoopInfoWrapperPass>().getLI();
const auto &WEI = getAnalysis<WebAssemblyExceptionInfo>();
SortRegionInfo SRI(MLI, WEI);
const auto &TII = *MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
@@ -467,7 +467,7 @@ void WebAssemblyCFGStackify::placeTryMarker(MachineBasicBlock &MBB) {
MachineFunction &MF = *MBB.getParent();
auto &MDT = getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
const auto &TII = *MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
- const auto &MLI = getAnalysis<MachineLoopInfo>();
+ const auto &MLI = getAnalysis<MachineLoopInfoWrapperPass>().getLI();
const auto &WEI = getAnalysis<WebAssemblyExceptionInfo>();
SortRegionInfo SRI(MLI, WEI);
const auto &MFI = *MF.getInfo<WebAssemblyFunctionInfo>();
diff --git a/llvm/lib/Target/X86/X86CmovConversion.cpp b/llvm/lib/Target/X86/X86CmovConversion.cpp
index 297acf07115a9..86922fb7c1dfb 100644
--- a/llvm/lib/Target/X86/X86CmovConversion.cpp
+++ b/llvm/lib/Target/X86/X86CmovConversion.cpp
@@ -159,7 +159,7 @@ char X86CmovConverterPass::ID = 0;
void X86CmovConverterPass::getAnalysisUsage(AnalysisUsage &AU) const {
MachineFunctionPass::getAnalysisUsage(AU);
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
}
bool X86CmovConverterPass::runOnMachineFunction(MachineFunction &MF) {
@@ -176,7 +176,7 @@ bool X86CmovConverterPass::runOnMachineFunction(MachineFunction &MF) {
<< "**********\n");
bool Changed = false;
- MLI = &getAnalysis<MachineLoopInfo>();
+ MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
const TargetSubtargetInfo &STI = MF.getSubtarget();
MRI = &MF.getRegInfo();
TII = STI.getInstrInfo();
@@ -882,14 +882,14 @@ void X86CmovConverterPass::convertCmovInstsToBranches(
// Add new basic blocks to MachineLoopInfo.
if (MachineLoop *L = MLI->getLoopFor(MBB)) {
- L->addBasicBlockToLoop(FalseMBB, MLI->getBase());
- L->addBasicBlockToLoop(SinkMBB, MLI->getBase());
+ L->addBasicBlockToLoop(FalseMBB, *MLI);
+ L->addBasicBlockToLoop(SinkMBB, *MLI);
}
}
INITIALIZE_PASS_BEGIN(X86CmovConverterPass, DEBUG_TYPE, "X86 cmov Conversion",
false, false)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_END(X86CmovConverterPass, DEBUG_TYPE, "X86 cmov Conversion",
false, false)
diff --git a/llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp b/llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
index d5c23295ee9a6..65dd3111f492d 100644
--- a/llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
+++ b/llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
@@ -236,7 +236,7 @@ char X86LoadValueInjectionLoadHardeningPass::ID = 0;
void X86LoadValueInjectionLoadHardeningPass::getAnalysisUsage(
AnalysisUsage &AU) const {
MachineFunctionPass::getAnalysisUsage(AU);
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addRequired<MachineDominanceFrontier>();
AU.setPreservesCFG();
@@ -269,7 +269,7 @@ bool X86LoadValueInjectionLoadHardeningPass::runOnMachineFunction(
TII = STI->getInstrInfo();
TRI = STI->getRegisterInfo();
LLVM_DEBUG(dbgs() << "Building gadget graph...\n");
- const auto &MLI = getAnalysis<MachineLoopInfo>();
+ const auto &MLI = getAnalysis<MachineLoopInfoWrapperPass>().getLI();
const auto &MDT = getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
const auto &MDF = getAnalysis<MachineDominanceFrontier>();
std::unique_ptr<MachineGadgetGraph> Graph = getGadgetGraph(MF, MLI, MDT, MDF);
@@ -799,7 +799,7 @@ bool X86LoadValueInjectionLoadHardeningPass::instrUsesRegToBranch(
INITIALIZE_PASS_BEGIN(X86LoadValueInjectionLoadHardeningPass, PASS_KEY,
"X86 LVI load hardening", false, false)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineDominanceFrontier)
INITIALIZE_PASS_END(X86LoadValueInjectionLoadHardeningPass, PASS_KEY,
diff --git a/llvm/lib/Target/X86/X86PreTileConfig.cpp b/llvm/lib/Target/X86/X86PreTileConfig.cpp
index 4c1c1b9cf0935..ee5fadf470dde 100644
--- a/llvm/lib/Target/X86/X86PreTileConfig.cpp
+++ b/llvm/lib/Target/X86/X86PreTileConfig.cpp
@@ -181,7 +181,7 @@ class X86PreTileConfig : public MachineFunctionPass {
/// X86PreTileConfig analysis usage.
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
- AU.addRequired<MachineLoopInfo>();
+ AU.addRequired<MachineLoopInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -204,7 +204,7 @@ char X86PreTileConfig::ID = 0;
INITIALIZE_PASS_BEGIN(X86PreTileConfig, "tilepreconfig",
"Tile Register Pre-configure", false, false)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_END(X86PreTileConfig, "tilepreconfig",
"Tile Register Pre-configure", false, false)
@@ -254,7 +254,7 @@ bool X86PreTileConfig::runOnMachineFunction(MachineFunction &MF) {
// Iterate MF to collect information.
MRI = &MF.getRegInfo();
- MLI = &getAnalysis<MachineLoopInfo>();
+ MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
SmallSet<MIRef, 8> CfgNeedInsert;
SmallVector<MachineBasicBlock *, 8> CfgLiveInBBs;
for (auto &MBB : MF) {
diff --git a/llvm/test/CodeGen/X86/machine-loops.ll b/llvm/test/CodeGen/X86/machine-loops.ll
new file mode 100644
index 0000000000000..ef0ba4dbf8a88
--- /dev/null
+++ b/llvm/test/CodeGen/X86/machine-loops.ll
@@ -0,0 +1,43 @@
+; RUN: llc -mtriple=x86_64-linux-gnu -stop-after=x86-isel %s -o - | llc --passes='print<machine-loops>' -x mir -o - 2>&1 | FileCheck %s
+
+; Function Attrs: noinline nounwind optnone ssp uwtable
+define i32 @foo(i32 noundef %0) #0 {
+ %2 = alloca i32, align 4
+ %3 = alloca i32, align 4
+ %4 = alloca i32, align 4
+ store i32 %0, ptr %2, align 4
+ store i32 0, ptr %3, align 4
+ store i32 0, ptr %4, align 4
+ br label %5
+
+5: ; preds = %13, %1
+ %6 = load i32, ptr %4, align 4
+ %7 = load i32, ptr %2, align 4
+ %8 = icmp ne i32 %6, %7
+ br i1 %8, label %9, label %16
+
+9: ; preds = %5
+ %10 = load i32, ptr %4, align 4
+ %11 = load i32, ptr %3, align 4
+ %12 = add nsw i32 %11, %10
+ store i32 %12, ptr %3, align 4
+ br label %13
+
+13: ; preds = %9
+ %14 = load i32, ptr %4, align 4
+ %15 = add nsw i32 %14, 1
+ store i32 %15, ptr %4, align 4
+ br label %5, !llvm.loop !1
+
+16: ; preds = %5
+ %17 = load i32, ptr %3, align 4
+ %18 = load i32, ptr %2, align 4
+ %19 = add nsw i32 %17, %18
+ ret i32 %19
+}
+
+!0 = distinct !{!0, !1}
+!1 = !{!"llvm.loop.mustprogress"}
+
+; CHECK: Machine loop info for machine function 'foo':
+; CHECK: Loop at depth 1 containing: %bb.1<header><exiting>,%bb.2,%bb.3<latch>
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