[llvm] [RISCV] Lower unmasked zero-stride vp.stride to a splat of one scalar load. (PR #97394)

[Luke Lau via llvm-commits]

lukel97 wrote:

> Are you working on this? I can have a try.

No, go ahead! Not sure if this will end up being relevant or not, but I did a really quick experiment earlier today to see if we emit VLMAX for a "full-length" EVL computed via vscale:

```llvm
define <vscale x 2 x i32> @f(<vscale x 2 x i32> %x, <vscale x 2 x i32> %y, <vscale x 2 x i1> %mask) {
  %vscale = call i32 @llvm.vscale()
  %vlmax = mul i32 %vscale, 2
  %z = call <vscale x 2 x i32> @llvm.vp.add.nxv2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %y, <vscale x 2 x i1> %mask, i32 %vlmax)
  ret <vscale x 2 x i32> %z
}
```

But it turns out we don't:

```
f: 
	csrr	a0, vlenb
	srli	a0, a0, 2
	vsetvli	zero, a0, e32, m1, ta, ma
	vadd.vv	v8, v8, v9, v0.t
	ret
```

https://github.com/llvm/llvm-project/pull/97394