[llvm] [RISCV] Lower unmasked zero-stride vp.stride to a splat of one scalar load. (PR #97394)

[Pengcheng Wang via llvm-commits]

wangpc-pp wrote:

> As an aside, as I understand the `riscv_masked_strided_{load,store}` intrinsics are mainly used for RISCVGatherScatterLowering. I wonder if it would be worthwhile to teach RISCVGatherScatterLowering to emit `llvm.experimental.vp.strided.{load,store}` instead so we could remove the riscv_masked_strided intrinsics.
> 
> From a quick look, we could emulate the passthru via llvm.vp.merge. But we also need to set the EVL to VLMAX somehow.

Are you working on this? I can have a try.

https://github.com/llvm/llvm-project/pull/97394