[llvm] [ARM][FastISel]Fix FastISel fail for softfp when set target to armebv… (PR #97422)

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``````````bash
git-clang-format --diff fb6e024f49ddbf1a018eccab7ccfa7c1f41964d0 8bb18df5bc404415bc81e0131d0227c359b742ae -- llvm/lib/Target/ARM/ARMFastISel.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index 172c3f797f..b5b2c03a6e 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -1991,18 +1991,18 @@ bool ARMFastISel::ProcessCallArgs(SmallVectorImpl<Value*> &Args,
       assert(VA.isRegLoc() && NextVA.isRegLoc() &&
              "We only handle register args!");
 
-      if(MF->getDataLayout().isBigEndian()) {
+      if (MF->getDataLayout().isBigEndian()) {
         AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
-                    TII.get(ARM::VMOVRRD), NextVA.getLocReg())
-                .addReg(VA.getLocReg(), RegState::Define)
-                .addReg(Arg));
+                                TII.get(ARM::VMOVRRD), NextVA.getLocReg())
+                            .addReg(VA.getLocReg(), RegState::Define)
+                            .addReg(Arg));
         RegArgs.push_back(NextVA.getLocReg());
         RegArgs.push_back(VA.getLocReg());
       } else {
         AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
-                    TII.get(ARM::VMOVRRD), VA.getLocReg())
-                .addReg(NextVA.getLocReg(), RegState::Define)
-                .addReg(Arg));
+                                TII.get(ARM::VMOVRRD), VA.getLocReg())
+                            .addReg(NextVA.getLocReg(), RegState::Define)
+                            .addReg(Arg));
         RegArgs.push_back(VA.getLocReg());
         RegArgs.push_back(NextVA.getLocReg());
       }

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https://github.com/llvm/llvm-project/pull/97422