[llvm] [ARM][FastISel]Fix FastISel fail for softfp when set target to armebv… (PR #97422)

via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 2 07:21:48 PDT 2024


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-arm

Author: None (hstk30-hw)

<details>
<summary>Changes</summary>

…7-unknown-linux 

https://github.com/llvm/llvm-project/issues/96792



---
Full diff: https://github.com/llvm/llvm-project/pull/97422.diff


2 Files Affected:

- (modified) llvm/lib/Target/ARM/ARMFastISel.cpp (+15-6) 
- (modified) llvm/test/CodeGen/ARM/fast-isel-call.ll (+11) 


``````````diff
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index 61d2928fe6d41..172c3f797f8aa 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -1991,12 +1991,21 @@ bool ARMFastISel::ProcessCallArgs(SmallVectorImpl<Value*> &Args,
       assert(VA.isRegLoc() && NextVA.isRegLoc() &&
              "We only handle register args!");
 
-      AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
-                              TII.get(ARM::VMOVRRD), VA.getLocReg())
-                      .addReg(NextVA.getLocReg(), RegState::Define)
-                      .addReg(Arg));
-      RegArgs.push_back(VA.getLocReg());
-      RegArgs.push_back(NextVA.getLocReg());
+      if(MF->getDataLayout().isBigEndian()) {
+        AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
+                    TII.get(ARM::VMOVRRD), NextVA.getLocReg())
+                .addReg(VA.getLocReg(), RegState::Define)
+                .addReg(Arg));
+        RegArgs.push_back(NextVA.getLocReg());
+        RegArgs.push_back(VA.getLocReg());
+      } else {
+        AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
+                    TII.get(ARM::VMOVRRD), VA.getLocReg())
+                .addReg(NextVA.getLocReg(), RegState::Define)
+                .addReg(Arg));
+        RegArgs.push_back(VA.getLocReg());
+        RegArgs.push_back(NextVA.getLocReg());
+      }
     } else {
       assert(VA.isMemLoc());
       // Need to store on the stack.
diff --git a/llvm/test/CodeGen/ARM/fast-isel-call.ll b/llvm/test/CodeGen/ARM/fast-isel-call.ll
index eaf1850e62042..5f4381d9ded66 100644
--- a/llvm/test/CodeGen/ARM/fast-isel-call.ll
+++ b/llvm/test/CodeGen/ARM/fast-isel-call.ll
@@ -8,6 +8,8 @@
 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -mattr=-fpregs | FileCheck %s --check-prefix=ARM-NOVFP
 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -mattr=-fpregs | FileCheck %s --check-prefix=ARM-NOVFP
 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -mattr=-fpregs | FileCheck %s --check-prefix=THUMB-NOVFP
+; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armebv7-linux -mattr=+vfpv3 | FileCheck %s --check-prefix=ARMEB-SOFTFP
+; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armebv7 -mattr=+vfpv3 | FileCheck %s --check-prefix=ARMEB_SOFTFP
 
 ; Note that some of these tests assume that relocations are either
 ; movw/movt or constant pool loads. Different platforms will select
@@ -281,6 +283,14 @@ entry:
   ret void
 }
 
+define void @double_softfp_call() ssp {
+entry:
+; ARMEB-SOFTFP-LABEL: double_softfp_call:
+; ARMEB-SOFTFP: vmov r1, r0, {{d[0-9]+}}
+  call void @double_callee(double 0x3FC99999A0000000)
+  ret void
+}
+
 declare void @bar2(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6)
 
 define void @call_undef_args() {
@@ -297,3 +307,4 @@ define void @call_undef_args() {
 }
 
 declare void @print(float)
+declare void @double_callee(double)

``````````

</details>


https://github.com/llvm/llvm-project/pull/97422


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