[llvm] [AMDGPU] Define constrained multi-dword scalar load instructions. (PR #96161)

Christudasan Devadasan via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 2 02:05:45 PDT 2024


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@@ -167,6 +167,20 @@ multiclass SM_Pseudo_Loads<RegisterClass baseClass,
   def _IMM : SM_Load_Pseudo <opName, baseClass, dstClass, IMM_Offset>;
   def _SGPR : SM_Load_Pseudo <opName, baseClass, dstClass, SGPR_Offset>;
   def _SGPR_IMM : SM_Load_Pseudo <opName, baseClass, dstClass, SGPR_IMM_Offset>;
+
+  // The constrained multi-dword load equivalents with early clobber flag at
+  // the dst operand. They are needed only for codegen and there is no need for
+  // their real opcodes.
+  let SubtargetPredicate = isGFX8Plus,
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cdevadas wrote:

I guess, it is still ok to use `isGFX8Plus` predicate as this the only place we might need it (if introduce a new one).
Instead of adding a new subtarget predicate, what if I extend the comment to include xnack replay is supported for gfx8+ archs?

https://github.com/llvm/llvm-project/pull/96161


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