[llvm] 32273ea - [X86][test] Add a separate test for NDD CMOV

Shengchen Kan via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 1 00:33:05 PDT 2024


Author: Shengchen Kan
Date: 2024-07-01T15:32:23+08:00
New Revision: 32273ea22da6a65ed796b61c1e926649a28f9557

URL: https://github.com/llvm/llvm-project/commit/32273ea22da6a65ed796b61c1e926649a28f9557
DIFF: https://github.com/llvm/llvm-project/commit/32273ea22da6a65ed796b61c1e926649a28f9557.diff

LOG: [X86][test] Add a separate test for NDD CMOV

Added: 
    llvm/test/CodeGen/X86/apx/cmov.ll

Modified: 
    llvm/test/CodeGen/X86/cmov.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/apx/cmov.ll b/llvm/test/CodeGen/X86/apx/cmov.ll
new file mode 100644
index 0000000000000..7a6a63f813c0a
--- /dev/null
+++ b/llvm/test/CodeGen/X86/apx/cmov.ll
@@ -0,0 +1,125 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -x86-cmov-converter=false -show-mc-encoding -verify-machineinstrs | FileCheck %s
+
+define i8 @cmov8(i8 %a, i8 %b, i8 %x, ptr %y.ptr) {
+; CHECK-LABEL: cmov8:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    cmpb %sil, %dil # encoding: [0x40,0x38,0xf7]
+; CHECK-NEXT:    cmoval %edi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x47,0xd7]
+; CHECK-NEXT:    movzbl (%rcx), %ecx # encoding: [0x0f,0xb6,0x09]
+; CHECK-NEXT:    cmovbel %edx, %ecx # EVEX TO LEGACY Compression encoding: [0x0f,0x46,0xca]
+; CHECK-NEXT:    addb %cl, %al # EVEX TO LEGACY Compression encoding: [0x00,0xc8]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %cond = icmp ugt i8 %a, %b
+  %y = load i8, ptr %y.ptr
+  %z2 = select i1 %cond, i8 %a, i8 %x
+  %z1 = select i1 %cond, i8 %y, i8 %x
+  %s1 = add i8 %z1, %z2
+  ret i8 %s1
+}
+
+define i16 @cmov16(i16 %a, i16 %b, i16 %x, ptr %y.ptr) {
+; CHECK-LABEL: cmov16:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    cmpw %si, %di # encoding: [0x66,0x39,0xf7]
+; CHECK-NEXT:    cmoval %edi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x47,0xd7]
+; CHECK-NEXT:    cmovaw (%rcx), %dx, %cx # encoding: [0x62,0xf4,0x75,0x18,0x47,0x11]
+; CHECK-NEXT:    addw %cx, %ax # EVEX TO LEGACY Compression encoding: [0x66,0x01,0xc8]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %cond = icmp ugt i16 %a, %b
+  %y = load i16, ptr %y.ptr
+  %z2 = select i1 %cond, i16 %a, i16 %x
+  %z1 = select i1 %cond, i16 %y, i16 %x
+  %s1 = add i16 %z1, %z2
+  ret i16 %s1
+}
+
+define i32 @cmov32(i32 %a, i32 %b, i32 %x, ptr %y.ptr) {
+; CHECK-LABEL: cmov32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    cmpl %esi, %edi # encoding: [0x39,0xf7]
+; CHECK-NEXT:    cmoval %edi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x47,0xd7]
+; CHECK-NEXT:    cmoval (%rcx), %edx, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x47,0x11]
+; CHECK-NEXT:    addl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x01,0xc8]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %cond = icmp ugt i32 %a, %b
+  %y = load i32, ptr %y.ptr
+  %z2 = select i1 %cond, i32 %a, i32 %x
+  %z1 = select i1 %cond, i32 %y, i32 %x
+  %s1 = add i32 %z1, %z2
+  ret i32 %s1
+}
+
+define i64 @cmov64(i64 %a, i64 %b, i64 %x, ptr %y.ptr) {
+; CHECK-LABEL: cmov64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    cmpq %rsi, %rdi # encoding: [0x48,0x39,0xf7]
+; CHECK-NEXT:    cmovaq %rdi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x47,0xd7]
+; CHECK-NEXT:    cmovaq (%rcx), %rdx, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x47,0x11]
+; CHECK-NEXT:    addq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x01,0xc8]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %cond = icmp ugt i64 %a, %b
+  %y = load i64, ptr %y.ptr
+  %z2 = select i1 %cond, i64 %a, i64 %x
+  %z1 = select i1 %cond, i64 %y, i64 %x
+  %s1 = add i64 %z1, %z2
+  ret i64 %s1
+}
+
+define i8 @cmov8rm_inv(i8 %a, i8 %x, ptr %y.ptr) {
+; CHECK-LABEL: cmov8rm_inv:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    testb %dil, %dil # encoding: [0x40,0x84,0xff]
+; CHECK-NEXT:    movzbl (%rdx), %eax # encoding: [0x0f,0xb6,0x02]
+; CHECK-NEXT:    cmovsl %esi, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x48,0xc6]
+; CHECK-NEXT:    # kill: def $al killed $al killed $eax
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %y = load i8, ptr %y.ptr
+  %cmp = icmp slt i8 %a, 0
+  %cmov = select i1 %cmp, i8 %x, i8 %y
+  ret i8 %cmov
+}
+
+define i16 @cmov16rm_inv(i16 %a, i16 %x, ptr %y.ptr) {
+; CHECK-LABEL: cmov16rm_inv:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    testw %di, %di # encoding: [0x66,0x85,0xff]
+; CHECK-NEXT:    cmovnsw (%rdx), %si, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x49,0x32]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %y = load i16, ptr %y.ptr
+  %cmp = icmp slt i16 %a, 0
+  %cmov = select i1 %cmp, i16 %x, i16 %y
+  ret i16 %cmov
+}
+
+define i32 @cmov32rm_inv(i32 %a, i32 %x, ptr %y.ptr) {
+; CHECK-LABEL: cmov32rm_inv:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    testl %edi, %edi # encoding: [0x85,0xff]
+; CHECK-NEXT:    cmovnsl (%rdx), %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x49,0x32]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %y = load i32, ptr %y.ptr
+  %cmp = icmp slt i32 %a, 0
+  %cmov = select i1 %cmp, i32 %x, i32 %y
+  ret i32 %cmov
+}
+
+define i64 @cmov64rm_inv(i64 %a, i64 %x, ptr %y.ptr) {
+; CHECK-LABEL: cmov64rm_inv:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    testq %rdi, %rdi # encoding: [0x48,0x85,0xff]
+; CHECK-NEXT:    cmovnsq (%rdx), %rsi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x49,0x32]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %y = load i64, ptr %y.ptr
+  %cmp = icmp slt i64 %a, 0
+  %cmov = select i1 %cmp, i64 %x, i64 %y
+  ret i64 %cmov
+}

diff  --git a/llvm/test/CodeGen/X86/cmov.ll b/llvm/test/CodeGen/X86/cmov.ll
index a8c068fc5b865..374e75967d52f 100644
--- a/llvm/test/CodeGen/X86/cmov.ll
+++ b/llvm/test/CodeGen/X86/cmov.ll
@@ -1,6 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -disable-cgp-select2branch -x86-cmov-converter=false | FileCheck %s
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -disable-cgp-select2branch -x86-cmov-converter=false -mattr=+ndd --show-mc-encoding | FileCheck %s --check-prefix=NDD
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
 
 define i32 @test1(i32 %x, i32 %n, i32 %w, ptr %vp) nounwind readnone {
@@ -10,13 +9,6 @@ define i32 @test1(i32 %x, i32 %n, i32 %w, ptr %vp) nounwind readnone {
 ; CHECK-NEXT:    movl $12, %eax
 ; CHECK-NEXT:    cmovael (%rcx), %eax
 ; CHECK-NEXT:    retq
-;
-; NDD-LABEL: test1:
-; NDD:       # %bb.0: # %entry
-; NDD-NEXT:    btl %esi, %edi # encoding: [0x0f,0xa3,0xf7]
-; NDD-NEXT:    movl $12, %eax # encoding: [0xb8,0x0c,0x00,0x00,0x00]
-; NDD-NEXT:    cmovael (%rcx), %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0x01]
-; NDD-NEXT:    retq # encoding: [0xc3]
 entry:
 	%0 = lshr i32 %x, %n
 	%1 = and i32 %0, 1
@@ -33,13 +25,6 @@ define i32 @test2(i32 %x, i32 %n, i32 %w, ptr %vp) nounwind readnone {
 ; CHECK-NEXT:    movl $12, %eax
 ; CHECK-NEXT:    cmovbl (%rcx), %eax
 ; CHECK-NEXT:    retq
-;
-; NDD-LABEL: test2:
-; NDD:       # %bb.0: # %entry
-; NDD-NEXT:    btl %esi, %edi # encoding: [0x0f,0xa3,0xf7]
-; NDD-NEXT:    movl $12, %eax # encoding: [0xb8,0x0c,0x00,0x00,0x00]
-; NDD-NEXT:    cmovbl (%rcx), %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0x01]
-; NDD-NEXT:    retq # encoding: [0xc3]
 entry:
 	%0 = lshr i32 %x, %n
 	%1 = and i32 %0, 1
@@ -65,16 +50,6 @@ define void @test3(i64 %a, i64 %b, i1 %p) nounwind {
 ; CHECK-NEXT:    callq bar at PLT
 ; CHECK-NEXT:    popq %rax
 ; CHECK-NEXT:    retq
-;
-; NDD-LABEL: test3:
-; NDD:       # %bb.0:
-; NDD-NEXT:    pushq %rax # encoding: [0x50]
-; NDD-NEXT:    testb $1, %dl # encoding: [0xf6,0xc2,0x01]
-; NDD-NEXT:    cmovel %esi, %edi # EVEX TO LEGACY Compression encoding: [0x0f,0x44,0xfe]
-; NDD-NEXT:    callq bar at PLT # encoding: [0xe8,A,A,A,A]
-; NDD-NEXT:    # fixup A - offset: 1, value: bar at PLT-4, kind: FK_PCRel_4
-; NDD-NEXT:    popq %rax # encoding: [0x58]
-; NDD-NEXT:    retq # encoding: [0xc3]
   %c = trunc i64 %a to i32
   %d = trunc i64 %b to i32
   %e = select i1 %p, i32 %c, i32 %d
@@ -139,54 +114,6 @@ define i1 @test4() nounwind {
 ; CHECK-NEXT:    movl %ebx, %eax
 ; CHECK-NEXT:    popq %rbx
 ; CHECK-NEXT:    retq
-;
-; NDD-LABEL: test4:
-; NDD:       # %bb.0: # %entry
-; NDD-NEXT:    movsbl g_3(%rip), %eax # encoding: [0x0f,0xbe,0x05,A,A,A,A]
-; NDD-NEXT:    # fixup A - offset: 3, value: g_3-4, kind: reloc_riprel_4byte
-; NDD-NEXT:    movzbl %al, %ecx # encoding: [0x0f,0xb6,0xc8]
-; NDD-NEXT:    shrl $7, %ecx # EVEX TO LEGACY Compression encoding: [0xc1,0xe9,0x07]
-; NDD-NEXT:    xorb $1, %cl # EVEX TO LEGACY Compression encoding: [0x80,0xf1,0x01]
-; NDD-NEXT:    sarl %cl, %eax, %ecx # encoding: [0x62,0xf4,0x74,0x18,0xd3,0xf8]
-; NDD-NEXT:    movzbl g_96(%rip), %eax # encoding: [0x0f,0xb6,0x05,A,A,A,A]
-; NDD-NEXT:    # fixup A - offset: 3, value: g_96-4, kind: reloc_riprel_4byte
-; NDD-NEXT:    testb %al, %al # encoding: [0x84,0xc0]
-; NDD-NEXT:    je .LBB3_2 # encoding: [0x74,A]
-; NDD-NEXT:    # fixup A - offset: 1, value: .LBB3_2-1, kind: FK_PCRel_1
-; NDD-NEXT:  # %bb.1: # %bb.i.i.i
-; NDD-NEXT:    movzbl g_100(%rip), %edx # encoding: [0x0f,0xb6,0x15,A,A,A,A]
-; NDD-NEXT:    # fixup A - offset: 3, value: g_100-4, kind: reloc_riprel_4byte
-; NDD-NEXT:  .LBB3_2: # %func_4.exit.i
-; NDD-NEXT:    pushq %rbx # encoding: [0x53]
-; NDD-NEXT:    xorl %edx, %edx # encoding: [0x31,0xd2]
-; NDD-NEXT:    testb %cl, %cl # encoding: [0x84,0xc9]
-; NDD-NEXT:    setne %bl # encoding: [0x0f,0x95,0xc3]
-; NDD-NEXT:    movzbl %al, %ecx # encoding: [0x0f,0xb6,0xc8]
-; NDD-NEXT:    cmovnel %edx, %ecx # EVEX TO LEGACY Compression encoding: [0x0f,0x45,0xca]
-; NDD-NEXT:    testb %al, %al # encoding: [0x84,0xc0]
-; NDD-NEXT:    je .LBB3_5 # encoding: [0x74,A]
-; NDD-NEXT:    # fixup A - offset: 1, value: .LBB3_5-1, kind: FK_PCRel_1
-; NDD-NEXT:  # %bb.3: # %func_4.exit.i
-; NDD-NEXT:    testb %bl, %bl # encoding: [0x84,0xdb]
-; NDD-NEXT:    jne .LBB3_5 # encoding: [0x75,A]
-; NDD-NEXT:    # fixup A - offset: 1, value: .LBB3_5-1, kind: FK_PCRel_1
-; NDD-NEXT:  # %bb.4: # %bb.i.i
-; NDD-NEXT:    movzbl g_100(%rip), %ecx # encoding: [0x0f,0xb6,0x0d,A,A,A,A]
-; NDD-NEXT:    # fixup A - offset: 3, value: g_100-4, kind: reloc_riprel_4byte
-; NDD-NEXT:    xorl %ebx, %ebx # encoding: [0x31,0xdb]
-; NDD-NEXT:    movl %eax, %ecx # encoding: [0x89,0xc1]
-; NDD-NEXT:  .LBB3_5: # %func_1.exit
-; NDD-NEXT:    movb %cl, g_96(%rip) # encoding: [0x88,0x0d,A,A,A,A]
-; NDD-NEXT:    # fixup A - offset: 2, value: g_96-4, kind: reloc_riprel_4byte
-; NDD-NEXT:    movzbl %cl, %esi # encoding: [0x0f,0xb6,0xf1]
-; NDD-NEXT:    movl $_2E_str, %edi # encoding: [0xbf,A,A,A,A]
-; NDD-NEXT:    # fixup A - offset: 1, value: _2E_str, kind: FK_Data_4
-; NDD-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
-; NDD-NEXT:    callq printf at PLT # encoding: [0xe8,A,A,A,A]
-; NDD-NEXT:    # fixup A - offset: 1, value: printf at PLT-4, kind: FK_PCRel_4
-; NDD-NEXT:    movl %ebx, %eax # encoding: [0x89,0xd8]
-; NDD-NEXT:    popq %rbx # encoding: [0x5b]
-; NDD-NEXT:    retq # encoding: [0xc3]
 entry:
   %0 = load i8, ptr @g_3, align 1
   %1 = sext i8 %0 to i32
@@ -236,14 +163,6 @@ define i32 @test5(ptr nocapture %P) nounwind readonly {
 ; CHECK-NEXT:    setge %al
 ; CHECK-NEXT:    orl $-2, %eax
 ; CHECK-NEXT:    retq
-;
-; NDD-LABEL: test5:
-; NDD:       # %bb.0: # %entry
-; NDD-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
-; NDD-NEXT:    cmpl $42, (%rdi) # encoding: [0x83,0x3f,0x2a]
-; NDD-NEXT:    setge %al # encoding: [0x0f,0x9d,0xc0]
-; NDD-NEXT:    orl $-2, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc8,0xfe]
-; NDD-NEXT:    retq # encoding: [0xc3]
 entry:
 	%0 = load i32, ptr %P, align 4
 	%1 = icmp sgt i32 %0, 41
@@ -259,14 +178,6 @@ define i32 @test6(ptr nocapture %P) nounwind readonly {
 ; CHECK-NEXT:    setl %al
 ; CHECK-NEXT:    leal 4(%rax,%rax,8), %eax
 ; CHECK-NEXT:    retq
-;
-; NDD-LABEL: test6:
-; NDD:       # %bb.0: # %entry
-; NDD-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
-; NDD-NEXT:    cmpl $42, (%rdi) # encoding: [0x83,0x3f,0x2a]
-; NDD-NEXT:    setl %al # encoding: [0x0f,0x9c,0xc0]
-; NDD-NEXT:    leal 4(%rax,%rax,8), %eax # encoding: [0x8d,0x44,0xc0,0x04]
-; NDD-NEXT:    retq # encoding: [0xc3]
 entry:
 	%0 = load i32, ptr %P, align 4
 	%1 = icmp sgt i32 %0, 41
@@ -283,13 +194,6 @@ define i8 @test7(i1 inreg %c, i8 inreg %a, i8 inreg %b) nounwind {
 ; CHECK-NEXT:    cmovel %edx, %eax
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    retq
-;
-; NDD-LABEL: test7:
-; NDD:       # %bb.0:
-; NDD-NEXT:    testb $1, %dil # encoding: [0x40,0xf6,0xc7,0x01]
-; NDD-NEXT:    cmovnel %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x45,0xd6]
-; NDD-NEXT:    # kill: def $al killed $al killed $eax
-; NDD-NEXT:    retq # encoding: [0xc3]
   %d = select i1 %c, i8 %a, i8 %b
   ret i8 %d
 }
@@ -301,13 +205,6 @@ define i64 @test8(i64 %0, i64 %1, i64 %2) {
 ; CHECK-NEXT:    cmpq $-2147483648, %rdi # imm = 0x80000000
 ; CHECK-NEXT:    cmovlq %rdx, %rax
 ; CHECK-NEXT:    retq
-;
-; NDD-LABEL: test8:
-; NDD:       # %bb.0:
-; NDD-NEXT:    cmpq $-2147483648, %rdi # encoding: [0x48,0x81,0xff,0x00,0x00,0x00,0x80]
-; NDD-NEXT:    # imm = 0x80000000
-; NDD-NEXT:    cmovgeq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x4d,0xd6]
-; NDD-NEXT:    retq # encoding: [0xc3]
   %4 = icmp sgt i64 %0, -2147483649
   %5 = select i1 %4, i64 %1, i64 %2
   ret i64 %5
@@ -321,14 +218,6 @@ define i32 @smin(i32 %x) {
 ; CHECK-NEXT:    movl $-1, %eax
 ; CHECK-NEXT:    cmovnsl %edi, %eax
 ; CHECK-NEXT:    retq
-;
-; NDD-LABEL: smin:
-; NDD:       # %bb.0:
-; NDD-NEXT:    notl %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xf7,0xd7]
-; NDD-NEXT:    testl %edi, %edi # encoding: [0x85,0xff]
-; NDD-NEXT:    movl $-1, %ecx # encoding: [0xb9,0xff,0xff,0xff,0xff]
-; NDD-NEXT:    cmovsl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x48,0xc1]
-; NDD-NEXT:    retq # encoding: [0xc3]
   %not_x = xor i32 %x, -1
   %1 = icmp slt i32 %not_x, -1
   %sel = select i1 %1, i32 %not_x, i32 -1
@@ -342,13 +231,6 @@ define i32 @pr47049_1(i32 %0) {
 ; CHECK-NEXT:    movl $1, %eax
 ; CHECK-NEXT:    cmovlel %edi, %eax
 ; CHECK-NEXT:    retq
-;
-; NDD-LABEL: pr47049_1:
-; NDD:       # %bb.0:
-; NDD-NEXT:    testl %edi, %edi # encoding: [0x85,0xff]
-; NDD-NEXT:    movl $1, %eax # encoding: [0xb8,0x01,0x00,0x00,0x00]
-; NDD-NEXT:    cmovlel %edi, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x4e,0xc7]
-; NDD-NEXT:    retq # encoding: [0xc3]
   %2 = icmp slt i32 %0, 1
   %3 = select i1 %2, i32 %0, i32 1
   ret i32 %3
@@ -361,13 +243,6 @@ define i32 @pr47049_2(i32 %0) {
 ; CHECK-NEXT:    movl $-1, %eax
 ; CHECK-NEXT:    cmovnsl %edi, %eax
 ; CHECK-NEXT:    retq
-;
-; NDD-LABEL: pr47049_2:
-; NDD:       # %bb.0:
-; NDD-NEXT:    testl %edi, %edi # encoding: [0x85,0xff]
-; NDD-NEXT:    movl $-1, %eax # encoding: [0xb8,0xff,0xff,0xff,0xff]
-; NDD-NEXT:    cmovnsl %edi, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x49,0xc7]
-; NDD-NEXT:    retq # encoding: [0xc3]
   %2 = icmp sgt i32 %0, -1
   %3 = select i1 %2, i32 %0, i32 -1
   ret i32 %3
@@ -380,13 +255,6 @@ define i32 @pr47049_3(i32 %0) {
 ; CHECK-NEXT:    movl $1, %eax
 ; CHECK-NEXT:    cmovgl %edi, %eax
 ; CHECK-NEXT:    retq
-;
-; NDD-LABEL: pr47049_3:
-; NDD:       # %bb.0:
-; NDD-NEXT:    testl %edi, %edi # encoding: [0x85,0xff]
-; NDD-NEXT:    movl $1, %eax # encoding: [0xb8,0x01,0x00,0x00,0x00]
-; NDD-NEXT:    cmovgl %edi, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x4f,0xc7]
-; NDD-NEXT:    retq # encoding: [0xc3]
   %2 = icmp sgt i32 %0, 1
   %3 = select i1 %2, i32 %0, i32 1
   ret i32 %3
@@ -399,13 +267,6 @@ define i32 @pr47049_4(i32 %0) {
 ; CHECK-NEXT:    movl $1, %eax
 ; CHECK-NEXT:    cmovnel %edi, %eax
 ; CHECK-NEXT:    retq
-;
-; NDD-LABEL: pr47049_4:
-; NDD:       # %bb.0:
-; NDD-NEXT:    testl %edi, %edi # encoding: [0x85,0xff]
-; NDD-NEXT:    movl $1, %eax # encoding: [0xb8,0x01,0x00,0x00,0x00]
-; NDD-NEXT:    cmovnel %edi, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x45,0xc7]
-; NDD-NEXT:    retq # encoding: [0xc3]
   %2 = icmp ugt i32 %0, 1
   %3 = select i1 %2, i32 %0, i32 1
   ret i32 %3


        


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