[llvm] [DAG] isKnownNeverZero - add more cases for UDIV, SDIV, SRA, and SRL (PR #89522)

[Simon Pilgrim via llvm-commits]

https://github.com/RKSimon commented:

Maybe split this into separate PRs for each opcode change?

https://github.com/llvm/llvm-project/pull/89522