[llvm] [arm64] Add tan intrinsic lowering (PR #94545)

[David Green via llvm-commits]

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@@ -1171,13 +1172,15 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
   if (Subtarget->isNeonAvailable()) {
     // FIXME: v1f64 shouldn't be legal if we can avoid it, because it leads to
     // silliness like this:
+    // clang-format off
     for (auto Op :
          {ISD::SELECT,         ISD::SELECT_CC,
           ISD::BR_CC,          ISD::FADD,           ISD::FSUB,
           ISD::FMUL,           ISD::FDIV,           ISD::FMA,
           ISD::FNEG,           ISD::FABS,           ISD::FCEIL,
           ISD::FSQRT,          ISD::FFLOOR,         ISD::FNEARBYINT,
-          ISD::FSIN,           ISD::FCOS,           ISD::FPOW,
+          ISD::FSIN,           ISD::FCOS,           ISD::FTAN,
+          ISD::FPOW,
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davemgreen wrote:

Can you rejig this so there isn't a single opcode value on a line?

https://github.com/llvm/llvm-project/pull/94545