[llvm] [RISCV] Combine vXi32 (mul (and (lshr X, 15), 0x10001), 0xffff) -> (bitcast (sra (v2Xi16 (bitcast X)), 15)) (PR #93565)
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Tue May 28 12:29:53 PDT 2024
================
@@ -13704,6 +13704,44 @@ static SDValue expandMul(SDNode *N, SelectionDAG &DAG,
return SDValue();
}
+// Combine vXi32 (mul (and (lshr X, 15), 0x10001), 0xffff) ->
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preames wrote:
One extra possible follow on - this could probably be a generic combine instead.
https://github.com/llvm/llvm-project/pull/93565
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