[llvm] [AMDGPU] Reserved private memory register during PEI (PR #93536)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue May 28 07:36:31 PDT 2024
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@@ -2083,6 +2083,9 @@ bool SIRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
assert(SPAdj == 0 && "unhandled SP adjustment in call sequence?");
+ MachineRegisterInfo &MRI = MF->getRegInfo();
+ assert(MRI.isReserved(MFI->getScratchRSrcReg()));
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arsenm wrote:
Fold the getRegInfo call into the assert, this is unused variable in release
https://github.com/llvm/llvm-project/pull/93536
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