[llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)
via llvm-commits
llvm-commits at lists.llvm.org
Tue May 28 06:09:12 PDT 2024
================
@@ -309,7 +309,7 @@ bool matchSplitStoreZero128(MachineInstr &MI, MachineRegisterInfo &MRI) {
if (!Store.isSimple())
return false;
LLT ValTy = MRI.getType(Store.getValueReg());
- if (!ValTy.isVector() || ValTy.getSizeInBits() != 128)
+ if (!ValTy.isVector() || ValTy.getSizeInBits().getKnownMinValue() != 128)
----------------
Him188 wrote:
Done, reverted this line and added this above instead.
```cpp
if (ValTy.isScalableVector())
return false;
```
https://github.com/llvm/llvm-project/pull/92130
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