[llvm] [WIP] Implemented a patch to optimize SGPR spills. (PR #93509)

[Matt Arsenault via llvm-commits]

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@@ -152,6 +154,14 @@ namespace {
       AU.addRequired<MachineBlockFrequencyInfo>();
       AU.addPreserved<MachineBlockFrequencyInfo>();
       AU.addPreservedID(MachineDominatorsID);
+
+      /// NOTE: As in AMDGPU pass pipeline, reg alloc is spillted into 2 phases
+      /// and StackSlotColoring is invoked after each phase, it becomes
+      /// important to preserve additional analyses result to be used by VGPR
+      /// regAlloc, after being done with SGPR regAlloc and its related passes.
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arsenm wrote:

I think this comment is too detailed, and a bit unnecessary. At most probably should be general and say something about preserve analyses that may be used by later RA passes 

https://github.com/llvm/llvm-project/pull/93509