[llvm] [RISCV] Support postRA vsetvl insertion pass (PR #70549)

Luke Lau via llvm-commits llvm-commits at lists.llvm.org
Fri May 17 01:01:56 PDT 2024


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@@ -140,8 +140,9 @@ define <4 x i1> @buildvec_mask_v4i1() {
 define <4 x i1> @buildvec_mask_nonconst_v4i1(i1 %x, i1 %y) {
 ; CHECK-LABEL: buildvec_mask_nonconst_v4i1:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma
+; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
----------------
lukel97 wrote:

Yeah I was just looking into this. The issue lies with a discrepancy between getDemanded() (used by RISCVCoalesceVSETVLI) and needVSETVLI (used by RISCVInsertVSETVLI). We have rules for relaxing the demanded fields for slides and vmv.v.i/vmv.v.x in the latter but not the former. 

I think we can unify these. The primary reason why they aren't currently is because these rules check the VL operand, and there's a comment in getDemanded() that warns against this:

```
  // Warning: This function has to work on both the lowered (i.e. post
  // emitVSETVLIs) and pre-lowering forms.  The main implication of this is
  // that it can't use the value of a SEW, VL, or Policy operand as they might
  // be stale after lowering.
```

But I don't think this actually applies since we only care about what is demanded for **original** instruction, not what the instruction may currently compute with relaxed vsetvlis. 

I'll try and see if I can relax this. (These rules also relax LMUL, which requires knowledge of what the new LMUL is going to be so we don't accidentally increase it to something that will clobber. May need to shuffle things about.)

https://github.com/llvm/llvm-project/pull/70549


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