[llvm] [AMDGPU] Fix broken MIR generated by gfx11 simulated trap lowering (PR #91652)

[Matt Arsenault via llvm-commits]

================
@@ -2065,14 +2065,26 @@ MachineBasicBlock *SIInstrInfo::insertSimulatedTrap(MachineRegisterInfo &MRI,
       .addImm(AMDGPU::SendMsg::ID_INTERRUPT);
   BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B32), AMDGPU::M0)
       .addUse(AMDGPU::TTMP2);
-  BuildMI(MBB, MI, DL, get(AMDGPU::S_BRANCH)).addMBB(HaltLoop);
+
+  if (MBB.succ_empty()) {
+    BuildMI(MBB, MI, DL, get(AMDGPU::S_BRANCH)).addMBB(HaltLoop);
+  } else {
----------------
arsenm wrote:

Now that I think about it, this should be unnecessary? By default we assume at least one line is active and have to insert branches over special instructions that should do nothing with exec 0, like trap 

https://github.com/llvm/llvm-project/pull/91652