[llvm] [AMDGPU] Fix broken MIR generated by gfx11 simulated trap lowering (PR #91652)

[Emma Pilkington via llvm-commits]

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@@ -2065,14 +2065,26 @@ MachineBasicBlock *SIInstrInfo::insertSimulatedTrap(MachineRegisterInfo &MRI,
       .addImm(AMDGPU::SendMsg::ID_INTERRUPT);
   BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B32), AMDGPU::M0)
       .addUse(AMDGPU::TTMP2);
-  BuildMI(MBB, MI, DL, get(AMDGPU::S_BRANCH)).addMBB(HaltLoop);
+
+  if (MBB.succ_empty()) {
+    BuildMI(MBB, MI, DL, get(AMDGPU::S_BRANCH)).addMBB(HaltLoop);
+  } else {
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epilk wrote:

Ah, so we should be guarding the whole trap sequence with a `c_branch_execnz`? I did this in the update. I think what was confusing me was that the other lowering for the trap intrinsic is an unconditional `s_trap 2`. I guess the argument is that should be okay since we don't delete the guarding `s_cbranch_execz` if it jumps over a trap [here](https://github.com/llvm/llvm-project/blob/8ef2011b2cd3a8fc2ef8d6ea0facb1a39a0dd621/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp#L327)?

https://github.com/llvm/llvm-project/pull/91652