[llvm] 026686b - [RISCV] Don't add getFrameIndexInstrOffset in RISCVRegisterInfo::needsFrameBaseReg.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2024-05-13T11:02:13-07:00
New Revision: 026686bac606ac03d688a44f2ea4cb829d7b08bc

URL: https://github.com/llvm/llvm-project/commit/026686bac606ac03d688a44f2ea4cb829d7b08bc
DIFF: https://github.com/llvm/llvm-project/commit/026686bac606ac03d688a44f2ea4cb829d7b08bc.diff

LOG: [RISCV] Don't add getFrameIndexInstrOffset in RISCVRegisterInfo::needsFrameBaseReg.

It's already added in isFrameOffsetLegal so adding it in needsFrameBaseReg
causes it to be double counted.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
    llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
index 6a48848e20220..c3281e409653b 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
@@ -607,7 +607,6 @@ bool RISCVRegisterInfo::needsFrameBaseReg(MachineInstr *MI,
   const MachineFrameInfo &MFI = MF.getFrameInfo();
   const RISCVFrameLowering *TFI = getFrameLowering(MF);
   const MachineRegisterInfo &MRI = MF.getRegInfo();
-  Offset += getFrameIndexInstrOffset(MI, FIOperandNum);
 
   if (TFI->hasFP(MF) && !shouldRealignStack(MF)) {
     // Estimate the stack size used to store callee saved registers(

diff  --git a/llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll b/llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll
index c34e2bfdca08c..18e7992f30a3e 100644
--- a/llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll
+++ b/llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll
@@ -88,9 +88,8 @@ define void @load_with_offset2() {
 ; RV32I-NEXT:    addi sp, sp, -2048
 ; RV32I-NEXT:    addi sp, sp, -464
 ; RV32I-NEXT:    .cfi_def_cfa_offset 2512
-; RV32I-NEXT:    addi a0, sp, 1412
-; RV32I-NEXT:    lbu a1, 0(a0)
-; RV32I-NEXT:    sb a1, 0(a0)
+; RV32I-NEXT:    lbu a0, 1412(sp)
+; RV32I-NEXT:    sb a0, 1412(sp)
 ; RV32I-NEXT:    addi sp, sp, 2032
 ; RV32I-NEXT:    addi sp, sp, 480
 ; RV32I-NEXT:    ret
@@ -100,9 +99,8 @@ define void @load_with_offset2() {
 ; RV64I-NEXT:    addi sp, sp, -2048
 ; RV64I-NEXT:    addi sp, sp, -464
 ; RV64I-NEXT:    .cfi_def_cfa_offset 2512
-; RV64I-NEXT:    addi a0, sp, 1412
-; RV64I-NEXT:    lbu a1, 0(a0)
-; RV64I-NEXT:    sb a1, 0(a0)
+; RV64I-NEXT:    lbu a0, 1412(sp)
+; RV64I-NEXT:    sb a0, 1412(sp)
 ; RV64I-NEXT:    addi sp, sp, 2032
 ; RV64I-NEXT:    addi sp, sp, 480
 ; RV64I-NEXT:    ret