[llvm] 38c68e0 - [X86] Add icmp i16 test coverage
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 30 09:31:10 PDT 2024
Author: Simon Pilgrim
Date: 2024-04-30T17:30:43+01:00
New Revision: 38c68e0746dc4ee19480dd4c9ee572895eb07136
URL: https://github.com/llvm/llvm-project/commit/38c68e0746dc4ee19480dd4c9ee572895eb07136
DIFF: https://github.com/llvm/llvm-project/commit/38c68e0746dc4ee19480dd4c9ee572895eb07136.diff
LOG: [X86] Add icmp i16 test coverage
Based off #90355 - add basic tests for cases when to extend i16 comparisons to i32
Added:
llvm/test/CodeGen/X86/cmp16.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/cmp16.ll b/llvm/test/CodeGen/X86/cmp16.ll
new file mode 100644
index 00000000000000..760c8e4044994c
--- /dev/null
+++ b/llvm/test/CodeGen/X86/cmp16.ll
@@ -0,0 +1,734 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86,X86-GENERIC
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64,X64-GENERIC
+; RUN: llc < %s -mtriple=i686-- -mcpu=atom | FileCheck %s --check-prefixes=X86,X86-ATOM
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=atom | FileCheck %s --check-prefixes=X64,X64-ATOM
+
+define i1 @cmp16_reg_eq_reg(i16 %a0, i16 %a1) {
+; X86-GENERIC-LABEL: cmp16_reg_eq_reg:
+; X86-GENERIC: # %bb.0:
+; X86-GENERIC-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-GENERIC-NEXT: cmpw {{[0-9]+}}(%esp), %ax
+; X86-GENERIC-NEXT: sete %al
+; X86-GENERIC-NEXT: retl
+;
+; X64-GENERIC-LABEL: cmp16_reg_eq_reg:
+; X64-GENERIC: # %bb.0:
+; X64-GENERIC-NEXT: cmpw %si, %di
+; X64-GENERIC-NEXT: sete %al
+; X64-GENERIC-NEXT: retq
+;
+; X86-ATOM-LABEL: cmp16_reg_eq_reg:
+; X86-ATOM: # %bb.0:
+; X86-ATOM-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-ATOM-NEXT: cmpw {{[0-9]+}}(%esp), %ax
+; X86-ATOM-NEXT: sete %al
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: retl
+;
+; X64-ATOM-LABEL: cmp16_reg_eq_reg:
+; X64-ATOM: # %bb.0:
+; X64-ATOM-NEXT: cmpw %si, %di
+; X64-ATOM-NEXT: sete %al
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: retq
+ %cmp = icmp eq i16 %a0, %a1
+ ret i1 %cmp
+}
+define i1 @cmp16_reg_eq_imm8(i16 %a0) {
+; X86-GENERIC-LABEL: cmp16_reg_eq_imm8:
+; X86-GENERIC: # %bb.0:
+; X86-GENERIC-NEXT: cmpw $15, {{[0-9]+}}(%esp)
+; X86-GENERIC-NEXT: sete %al
+; X86-GENERIC-NEXT: retl
+;
+; X64-GENERIC-LABEL: cmp16_reg_eq_imm8:
+; X64-GENERIC: # %bb.0:
+; X64-GENERIC-NEXT: cmpw $15, %di
+; X64-GENERIC-NEXT: sete %al
+; X64-GENERIC-NEXT: retq
+;
+; X86-ATOM-LABEL: cmp16_reg_eq_imm8:
+; X86-ATOM: # %bb.0:
+; X86-ATOM-NEXT: cmpw $15, {{[0-9]+}}(%esp)
+; X86-ATOM-NEXT: sete %al
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: retl
+;
+; X64-ATOM-LABEL: cmp16_reg_eq_imm8:
+; X64-ATOM: # %bb.0:
+; X64-ATOM-NEXT: cmpw $15, %di
+; X64-ATOM-NEXT: sete %al
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: retq
+ %cmp = icmp eq i16 %a0, 15
+ ret i1 %cmp
+}
+
+define i1 @cmp16_reg_eq_imm16(i16 %a0) {
+; X86-GENERIC-LABEL: cmp16_reg_eq_imm16:
+; X86-GENERIC: # %bb.0:
+; X86-GENERIC-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-GENERIC-NEXT: cmpl $1024, %eax # imm = 0x400
+; X86-GENERIC-NEXT: sete %al
+; X86-GENERIC-NEXT: retl
+;
+; X64-GENERIC-LABEL: cmp16_reg_eq_imm16:
+; X64-GENERIC: # %bb.0:
+; X64-GENERIC-NEXT: movzwl %di, %eax
+; X64-GENERIC-NEXT: cmpl $1024, %eax # imm = 0x400
+; X64-GENERIC-NEXT: sete %al
+; X64-GENERIC-NEXT: retq
+;
+; X86-ATOM-LABEL: cmp16_reg_eq_imm16:
+; X86-ATOM: # %bb.0:
+; X86-ATOM-NEXT: cmpw $1024, {{[0-9]+}}(%esp) # imm = 0x400
+; X86-ATOM-NEXT: sete %al
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: retl
+;
+; X64-ATOM-LABEL: cmp16_reg_eq_imm16:
+; X64-ATOM: # %bb.0:
+; X64-ATOM-NEXT: cmpw $1024, %di # imm = 0x400
+; X64-ATOM-NEXT: sete %al
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: retq
+ %cmp = icmp eq i16 %a0, 1024
+ ret i1 %cmp
+}
+
+define i1 @cmp16_reg_eq_imm16_minsize(i16 %a0) minsize {
+; X86-LABEL: cmp16_reg_eq_imm16_minsize:
+; X86: # %bb.0:
+; X86-NEXT: cmpw $1024, {{[0-9]+}}(%esp) # imm = 0x400
+; X86-NEXT: sete %al
+; X86-NEXT: retl
+;
+; X64-LABEL: cmp16_reg_eq_imm16_minsize:
+; X64: # %bb.0:
+; X64-NEXT: cmpw $1024, %di # imm = 0x400
+; X64-NEXT: sete %al
+; X64-NEXT: retq
+ %cmp = icmp eq i16 %a0, 1024
+ ret i1 %cmp
+}
+
+define i1 @cmp16_reg_eq_imm16_optsize(i16 %a0) optsize {
+; X86-GENERIC-LABEL: cmp16_reg_eq_imm16_optsize:
+; X86-GENERIC: # %bb.0:
+; X86-GENERIC-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-GENERIC-NEXT: cmpl $1024, %eax # imm = 0x400
+; X86-GENERIC-NEXT: sete %al
+; X86-GENERIC-NEXT: retl
+;
+; X64-GENERIC-LABEL: cmp16_reg_eq_imm16_optsize:
+; X64-GENERIC: # %bb.0:
+; X64-GENERIC-NEXT: movzwl %di, %eax
+; X64-GENERIC-NEXT: cmpl $1024, %eax # imm = 0x400
+; X64-GENERIC-NEXT: sete %al
+; X64-GENERIC-NEXT: retq
+;
+; X86-ATOM-LABEL: cmp16_reg_eq_imm16_optsize:
+; X86-ATOM: # %bb.0:
+; X86-ATOM-NEXT: cmpw $1024, {{[0-9]+}}(%esp) # imm = 0x400
+; X86-ATOM-NEXT: sete %al
+; X86-ATOM-NEXT: retl
+;
+; X64-ATOM-LABEL: cmp16_reg_eq_imm16_optsize:
+; X64-ATOM: # %bb.0:
+; X64-ATOM-NEXT: cmpw $1024, %di # imm = 0x400
+; X64-ATOM-NEXT: sete %al
+; X64-ATOM-NEXT: retq
+ %cmp = icmp eq i16 %a0, 1024
+ ret i1 %cmp
+}
+
+define i1 @cmp16_reg_sgt_imm8(i16 %a0) {
+; X86-GENERIC-LABEL: cmp16_reg_sgt_imm8:
+; X86-GENERIC: # %bb.0:
+; X86-GENERIC-NEXT: cmpw $16, {{[0-9]+}}(%esp)
+; X86-GENERIC-NEXT: setge %al
+; X86-GENERIC-NEXT: retl
+;
+; X64-GENERIC-LABEL: cmp16_reg_sgt_imm8:
+; X64-GENERIC: # %bb.0:
+; X64-GENERIC-NEXT: cmpw $16, %di
+; X64-GENERIC-NEXT: setge %al
+; X64-GENERIC-NEXT: retq
+;
+; X86-ATOM-LABEL: cmp16_reg_sgt_imm8:
+; X86-ATOM: # %bb.0:
+; X86-ATOM-NEXT: cmpw $16, {{[0-9]+}}(%esp)
+; X86-ATOM-NEXT: setge %al
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: retl
+;
+; X64-ATOM-LABEL: cmp16_reg_sgt_imm8:
+; X64-ATOM: # %bb.0:
+; X64-ATOM-NEXT: cmpw $16, %di
+; X64-ATOM-NEXT: setge %al
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: retq
+ %cmp = icmp sgt i16 %a0, 15
+ ret i1 %cmp
+}
+
+define i1 @cmp16_reg_sgt_imm16(i16 %a0) {
+; X86-GENERIC-LABEL: cmp16_reg_sgt_imm16:
+; X86-GENERIC: # %bb.0:
+; X86-GENERIC-NEXT: movswl {{[0-9]+}}(%esp), %eax
+; X86-GENERIC-NEXT: cmpl $-1023, %eax # imm = 0xFC01
+; X86-GENERIC-NEXT: setge %al
+; X86-GENERIC-NEXT: retl
+;
+; X64-GENERIC-LABEL: cmp16_reg_sgt_imm16:
+; X64-GENERIC: # %bb.0:
+; X64-GENERIC-NEXT: movswl %di, %eax
+; X64-GENERIC-NEXT: cmpl $-1023, %eax # imm = 0xFC01
+; X64-GENERIC-NEXT: setge %al
+; X64-GENERIC-NEXT: retq
+;
+; X86-ATOM-LABEL: cmp16_reg_sgt_imm16:
+; X86-ATOM: # %bb.0:
+; X86-ATOM-NEXT: cmpw $-1023, {{[0-9]+}}(%esp) # imm = 0xFC01
+; X86-ATOM-NEXT: setge %al
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: retl
+;
+; X64-ATOM-LABEL: cmp16_reg_sgt_imm16:
+; X64-ATOM: # %bb.0:
+; X64-ATOM-NEXT: cmpw $-1023, %di # imm = 0xFC01
+; X64-ATOM-NEXT: setge %al
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: retq
+ %cmp = icmp sgt i16 %a0, -1024
+ ret i1 %cmp
+}
+
+define i1 @cmp16_reg_sgt_imm16_minsize(i16 %a0) minsize {
+; X86-LABEL: cmp16_reg_sgt_imm16_minsize:
+; X86: # %bb.0:
+; X86-NEXT: cmpw $-1023, {{[0-9]+}}(%esp) # imm = 0xFC01
+; X86-NEXT: setge %al
+; X86-NEXT: retl
+;
+; X64-LABEL: cmp16_reg_sgt_imm16_minsize:
+; X64: # %bb.0:
+; X64-NEXT: cmpw $-1023, %di # imm = 0xFC01
+; X64-NEXT: setge %al
+; X64-NEXT: retq
+ %cmp = icmp sgt i16 %a0, -1024
+ ret i1 %cmp
+}
+
+define i1 @cmp16_reg_sgt_imm16_optsize(i16 %a0) optsize {
+; X86-GENERIC-LABEL: cmp16_reg_sgt_imm16_optsize:
+; X86-GENERIC: # %bb.0:
+; X86-GENERIC-NEXT: movswl {{[0-9]+}}(%esp), %eax
+; X86-GENERIC-NEXT: cmpl $-1023, %eax # imm = 0xFC01
+; X86-GENERIC-NEXT: setge %al
+; X86-GENERIC-NEXT: retl
+;
+; X64-GENERIC-LABEL: cmp16_reg_sgt_imm16_optsize:
+; X64-GENERIC: # %bb.0:
+; X64-GENERIC-NEXT: movswl %di, %eax
+; X64-GENERIC-NEXT: cmpl $-1023, %eax # imm = 0xFC01
+; X64-GENERIC-NEXT: setge %al
+; X64-GENERIC-NEXT: retq
+;
+; X86-ATOM-LABEL: cmp16_reg_sgt_imm16_optsize:
+; X86-ATOM: # %bb.0:
+; X86-ATOM-NEXT: cmpw $-1023, {{[0-9]+}}(%esp) # imm = 0xFC01
+; X86-ATOM-NEXT: setge %al
+; X86-ATOM-NEXT: retl
+;
+; X64-ATOM-LABEL: cmp16_reg_sgt_imm16_optsize:
+; X64-ATOM: # %bb.0:
+; X64-ATOM-NEXT: cmpw $-1023, %di # imm = 0xFC01
+; X64-ATOM-NEXT: setge %al
+; X64-ATOM-NEXT: retq
+ %cmp = icmp sgt i16 %a0, -1024
+ ret i1 %cmp
+}
+
+define i1 @cmp16_reg_uge_imm16(i16 %a0) {
+; X86-GENERIC-LABEL: cmp16_reg_uge_imm16:
+; X86-GENERIC: # %bb.0:
+; X86-GENERIC-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-GENERIC-NEXT: cmpl $64512, %eax # imm = 0xFC00
+; X86-GENERIC-NEXT: setae %al
+; X86-GENERIC-NEXT: retl
+;
+; X64-GENERIC-LABEL: cmp16_reg_uge_imm16:
+; X64-GENERIC: # %bb.0:
+; X64-GENERIC-NEXT: movzwl %di, %eax
+; X64-GENERIC-NEXT: cmpl $64512, %eax # imm = 0xFC00
+; X64-GENERIC-NEXT: setae %al
+; X64-GENERIC-NEXT: retq
+;
+; X86-ATOM-LABEL: cmp16_reg_uge_imm16:
+; X86-ATOM: # %bb.0:
+; X86-ATOM-NEXT: cmpw $-1024, {{[0-9]+}}(%esp) # imm = 0xFC00
+; X86-ATOM-NEXT: setae %al
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: retl
+;
+; X64-ATOM-LABEL: cmp16_reg_uge_imm16:
+; X64-ATOM: # %bb.0:
+; X64-ATOM-NEXT: cmpw $-1024, %di # imm = 0xFC00
+; X64-ATOM-NEXT: setae %al
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: retq
+ %cmp = icmp uge i16 %a0, -1024
+ ret i1 %cmp
+}
+
+define i1 @cmp16_reg_uge_imm16_minsize(i16 %a0) minsize {
+; X86-LABEL: cmp16_reg_uge_imm16_minsize:
+; X86: # %bb.0:
+; X86-NEXT: cmpw $-1024, {{[0-9]+}}(%esp) # imm = 0xFC00
+; X86-NEXT: setae %al
+; X86-NEXT: retl
+;
+; X64-LABEL: cmp16_reg_uge_imm16_minsize:
+; X64: # %bb.0:
+; X64-NEXT: cmpw $-1024, %di # imm = 0xFC00
+; X64-NEXT: setae %al
+; X64-NEXT: retq
+ %cmp = icmp uge i16 %a0, -1024
+ ret i1 %cmp
+}
+
+define i1 @cmp16_reg_uge_imm16_optsize(i16 %a0) optsize {
+; X86-GENERIC-LABEL: cmp16_reg_uge_imm16_optsize:
+; X86-GENERIC: # %bb.0:
+; X86-GENERIC-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-GENERIC-NEXT: cmpl $64512, %eax # imm = 0xFC00
+; X86-GENERIC-NEXT: setae %al
+; X86-GENERIC-NEXT: retl
+;
+; X64-GENERIC-LABEL: cmp16_reg_uge_imm16_optsize:
+; X64-GENERIC: # %bb.0:
+; X64-GENERIC-NEXT: movzwl %di, %eax
+; X64-GENERIC-NEXT: cmpl $64512, %eax # imm = 0xFC00
+; X64-GENERIC-NEXT: setae %al
+; X64-GENERIC-NEXT: retq
+;
+; X86-ATOM-LABEL: cmp16_reg_uge_imm16_optsize:
+; X86-ATOM: # %bb.0:
+; X86-ATOM-NEXT: cmpw $-1024, {{[0-9]+}}(%esp) # imm = 0xFC00
+; X86-ATOM-NEXT: setae %al
+; X86-ATOM-NEXT: retl
+;
+; X64-ATOM-LABEL: cmp16_reg_uge_imm16_optsize:
+; X64-ATOM: # %bb.0:
+; X64-ATOM-NEXT: cmpw $-1024, %di # imm = 0xFC00
+; X64-ATOM-NEXT: setae %al
+; X64-ATOM-NEXT: retq
+ %cmp = icmp uge i16 %a0, -1024
+ ret i1 %cmp
+}
+
+define i1 @cmp16_load_ne_load(ptr %p0, ptr %p1) {
+; X86-GENERIC-LABEL: cmp16_load_ne_load:
+; X86-GENERIC: # %bb.0:
+; X86-GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-GENERIC-NEXT: movzwl (%ecx), %ecx
+; X86-GENERIC-NEXT: cmpw (%eax), %cx
+; X86-GENERIC-NEXT: setne %al
+; X86-GENERIC-NEXT: retl
+;
+; X64-GENERIC-LABEL: cmp16_load_ne_load:
+; X64-GENERIC: # %bb.0:
+; X64-GENERIC-NEXT: movzwl (%rdi), %eax
+; X64-GENERIC-NEXT: cmpw (%rsi), %ax
+; X64-GENERIC-NEXT: setne %al
+; X64-GENERIC-NEXT: retq
+;
+; X86-ATOM-LABEL: cmp16_load_ne_load:
+; X86-ATOM: # %bb.0:
+; X86-ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-ATOM-NEXT: movzwl (%ecx), %ecx
+; X86-ATOM-NEXT: cmpw (%eax), %cx
+; X86-ATOM-NEXT: setne %al
+; X86-ATOM-NEXT: retl
+;
+; X64-ATOM-LABEL: cmp16_load_ne_load:
+; X64-ATOM: # %bb.0:
+; X64-ATOM-NEXT: movzwl (%rdi), %eax
+; X64-ATOM-NEXT: cmpw (%rsi), %ax
+; X64-ATOM-NEXT: setne %al
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: retq
+ %ld0 = load i16, ptr %p0
+ %ld1 = load i16, ptr %p1
+ %cmp = icmp ne i16 %ld0, %ld1
+ ret i1 %cmp
+}
+
+define i1 @cmp16_load_ne_imm8(ptr %p0) {
+; X86-GENERIC-LABEL: cmp16_load_ne_imm8:
+; X86-GENERIC: # %bb.0:
+; X86-GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-GENERIC-NEXT: cmpw $15, (%eax)
+; X86-GENERIC-NEXT: setne %al
+; X86-GENERIC-NEXT: retl
+;
+; X64-GENERIC-LABEL: cmp16_load_ne_imm8:
+; X64-GENERIC: # %bb.0:
+; X64-GENERIC-NEXT: cmpw $15, (%rdi)
+; X64-GENERIC-NEXT: setne %al
+; X64-GENERIC-NEXT: retq
+;
+; X86-ATOM-LABEL: cmp16_load_ne_imm8:
+; X86-ATOM: # %bb.0:
+; X86-ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-ATOM-NEXT: cmpw $15, (%eax)
+; X86-ATOM-NEXT: setne %al
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: retl
+;
+; X64-ATOM-LABEL: cmp16_load_ne_imm8:
+; X64-ATOM: # %bb.0:
+; X64-ATOM-NEXT: cmpw $15, (%rdi)
+; X64-ATOM-NEXT: setne %al
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: retq
+ %ld = load i16, ptr %p0
+ %cmp = icmp ne i16 %ld, 15
+ ret i1 %cmp
+}
+
+define i1 @cmp16_load_ne_imm16(ptr %p0) {
+; X86-GENERIC-LABEL: cmp16_load_ne_imm16:
+; X86-GENERIC: # %bb.0:
+; X86-GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-GENERIC-NEXT: movzwl (%eax), %eax
+; X86-GENERIC-NEXT: cmpl $512, %eax # imm = 0x200
+; X86-GENERIC-NEXT: setne %al
+; X86-GENERIC-NEXT: retl
+;
+; X64-GENERIC-LABEL: cmp16_load_ne_imm16:
+; X64-GENERIC: # %bb.0:
+; X64-GENERIC-NEXT: movzwl (%rdi), %eax
+; X64-GENERIC-NEXT: cmpl $512, %eax # imm = 0x200
+; X64-GENERIC-NEXT: setne %al
+; X64-GENERIC-NEXT: retq
+;
+; X86-ATOM-LABEL: cmp16_load_ne_imm16:
+; X86-ATOM: # %bb.0:
+; X86-ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-ATOM-NEXT: cmpw $512, (%eax) # imm = 0x200
+; X86-ATOM-NEXT: setne %al
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: retl
+;
+; X64-ATOM-LABEL: cmp16_load_ne_imm16:
+; X64-ATOM: # %bb.0:
+; X64-ATOM-NEXT: cmpw $512, (%rdi) # imm = 0x200
+; X64-ATOM-NEXT: setne %al
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: retq
+ %ld = load i16, ptr %p0
+ %cmp = icmp ne i16 %ld, 512
+ ret i1 %cmp
+}
+
+define i1 @cmp16_load_slt_imm8(ptr %p0) {
+; X86-GENERIC-LABEL: cmp16_load_slt_imm8:
+; X86-GENERIC: # %bb.0:
+; X86-GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-GENERIC-NEXT: cmpw $15, (%eax)
+; X86-GENERIC-NEXT: setl %al
+; X86-GENERIC-NEXT: retl
+;
+; X64-GENERIC-LABEL: cmp16_load_slt_imm8:
+; X64-GENERIC: # %bb.0:
+; X64-GENERIC-NEXT: cmpw $15, (%rdi)
+; X64-GENERIC-NEXT: setl %al
+; X64-GENERIC-NEXT: retq
+;
+; X86-ATOM-LABEL: cmp16_load_slt_imm8:
+; X86-ATOM: # %bb.0:
+; X86-ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-ATOM-NEXT: cmpw $15, (%eax)
+; X86-ATOM-NEXT: setl %al
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: retl
+;
+; X64-ATOM-LABEL: cmp16_load_slt_imm8:
+; X64-ATOM: # %bb.0:
+; X64-ATOM-NEXT: cmpw $15, (%rdi)
+; X64-ATOM-NEXT: setl %al
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: retq
+ %ld = load i16, ptr %p0
+ %cmp = icmp slt i16 %ld, 15
+ ret i1 %cmp
+}
+
+define i1 @cmp16_load_slt_imm16(ptr %p0) {
+; X86-GENERIC-LABEL: cmp16_load_slt_imm16:
+; X86-GENERIC: # %bb.0:
+; X86-GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-GENERIC-NEXT: movswl (%eax), %eax
+; X86-GENERIC-NEXT: cmpl $512, %eax # imm = 0x200
+; X86-GENERIC-NEXT: setl %al
+; X86-GENERIC-NEXT: retl
+;
+; X64-GENERIC-LABEL: cmp16_load_slt_imm16:
+; X64-GENERIC: # %bb.0:
+; X64-GENERIC-NEXT: movswl (%rdi), %eax
+; X64-GENERIC-NEXT: cmpl $512, %eax # imm = 0x200
+; X64-GENERIC-NEXT: setl %al
+; X64-GENERIC-NEXT: retq
+;
+; X86-ATOM-LABEL: cmp16_load_slt_imm16:
+; X86-ATOM: # %bb.0:
+; X86-ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-ATOM-NEXT: cmpw $512, (%eax) # imm = 0x200
+; X86-ATOM-NEXT: setl %al
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: retl
+;
+; X64-ATOM-LABEL: cmp16_load_slt_imm16:
+; X64-ATOM: # %bb.0:
+; X64-ATOM-NEXT: cmpw $512, (%rdi) # imm = 0x200
+; X64-ATOM-NEXT: setl %al
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: retq
+ %ld = load i16, ptr %p0
+ %cmp = icmp slt i16 %ld, 512
+ ret i1 %cmp
+}
+
+define i1 @cmp16_load_slt_imm16_minsize(ptr %p0) minsize {
+; X86-LABEL: cmp16_load_slt_imm16_minsize:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmpw $512, (%eax) # imm = 0x200
+; X86-NEXT: setl %al
+; X86-NEXT: retl
+;
+; X64-LABEL: cmp16_load_slt_imm16_minsize:
+; X64: # %bb.0:
+; X64-NEXT: cmpw $512, (%rdi) # imm = 0x200
+; X64-NEXT: setl %al
+; X64-NEXT: retq
+ %ld = load i16, ptr %p0
+ %cmp = icmp slt i16 %ld, 512
+ ret i1 %cmp
+}
+
+define i1 @cmp16_load_slt_imm16_optsize(ptr %p0) optsize {
+; X86-GENERIC-LABEL: cmp16_load_slt_imm16_optsize:
+; X86-GENERIC: # %bb.0:
+; X86-GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-GENERIC-NEXT: movswl (%eax), %eax
+; X86-GENERIC-NEXT: cmpl $512, %eax # imm = 0x200
+; X86-GENERIC-NEXT: setl %al
+; X86-GENERIC-NEXT: retl
+;
+; X64-GENERIC-LABEL: cmp16_load_slt_imm16_optsize:
+; X64-GENERIC: # %bb.0:
+; X64-GENERIC-NEXT: movswl (%rdi), %eax
+; X64-GENERIC-NEXT: cmpl $512, %eax # imm = 0x200
+; X64-GENERIC-NEXT: setl %al
+; X64-GENERIC-NEXT: retq
+;
+; X86-ATOM-LABEL: cmp16_load_slt_imm16_optsize:
+; X86-ATOM: # %bb.0:
+; X86-ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-ATOM-NEXT: cmpw $512, (%eax) # imm = 0x200
+; X86-ATOM-NEXT: setl %al
+; X86-ATOM-NEXT: retl
+;
+; X64-ATOM-LABEL: cmp16_load_slt_imm16_optsize:
+; X64-ATOM: # %bb.0:
+; X64-ATOM-NEXT: cmpw $512, (%rdi) # imm = 0x200
+; X64-ATOM-NEXT: setl %al
+; X64-ATOM-NEXT: retq
+ %ld = load i16, ptr %p0
+ %cmp = icmp slt i16 %ld, 512
+ ret i1 %cmp
+}
+
+define i1 @cmp16_load_ule_imm8(ptr %p0) {
+; X86-GENERIC-LABEL: cmp16_load_ule_imm8:
+; X86-GENERIC: # %bb.0:
+; X86-GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-GENERIC-NEXT: cmpw $16, (%eax)
+; X86-GENERIC-NEXT: setb %al
+; X86-GENERIC-NEXT: retl
+;
+; X64-GENERIC-LABEL: cmp16_load_ule_imm8:
+; X64-GENERIC: # %bb.0:
+; X64-GENERIC-NEXT: cmpw $16, (%rdi)
+; X64-GENERIC-NEXT: setb %al
+; X64-GENERIC-NEXT: retq
+;
+; X86-ATOM-LABEL: cmp16_load_ule_imm8:
+; X86-ATOM: # %bb.0:
+; X86-ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-ATOM-NEXT: cmpw $16, (%eax)
+; X86-ATOM-NEXT: setb %al
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: retl
+;
+; X64-ATOM-LABEL: cmp16_load_ule_imm8:
+; X64-ATOM: # %bb.0:
+; X64-ATOM-NEXT: cmpw $16, (%rdi)
+; X64-ATOM-NEXT: setb %al
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: retq
+ %ld = load i16, ptr %p0
+ %cmp = icmp ule i16 %ld, 15
+ ret i1 %cmp
+}
+
+define i1 @cmp16_load_ule_imm16(ptr %p0) {
+; X86-GENERIC-LABEL: cmp16_load_ule_imm16:
+; X86-GENERIC: # %bb.0:
+; X86-GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-GENERIC-NEXT: movzwl (%eax), %eax
+; X86-GENERIC-NEXT: cmpl $513, %eax # imm = 0x201
+; X86-GENERIC-NEXT: setb %al
+; X86-GENERIC-NEXT: retl
+;
+; X64-GENERIC-LABEL: cmp16_load_ule_imm16:
+; X64-GENERIC: # %bb.0:
+; X64-GENERIC-NEXT: movzwl (%rdi), %eax
+; X64-GENERIC-NEXT: cmpl $513, %eax # imm = 0x201
+; X64-GENERIC-NEXT: setb %al
+; X64-GENERIC-NEXT: retq
+;
+; X86-ATOM-LABEL: cmp16_load_ule_imm16:
+; X86-ATOM: # %bb.0:
+; X86-ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-ATOM-NEXT: cmpw $513, (%eax) # imm = 0x201
+; X86-ATOM-NEXT: setb %al
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: nop
+; X86-ATOM-NEXT: retl
+;
+; X64-ATOM-LABEL: cmp16_load_ule_imm16:
+; X64-ATOM: # %bb.0:
+; X64-ATOM-NEXT: cmpw $513, (%rdi) # imm = 0x201
+; X64-ATOM-NEXT: setb %al
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: nop
+; X64-ATOM-NEXT: retq
+ %ld = load i16, ptr %p0
+ %cmp = icmp ule i16 %ld, 512
+ ret i1 %cmp
+}
+
+define i1 @cmp16_load_ule_imm16_minsize(ptr %p0) minsize {
+; X86-LABEL: cmp16_load_ule_imm16_minsize:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmpw $513, (%eax) # imm = 0x201
+; X86-NEXT: setb %al
+; X86-NEXT: retl
+;
+; X64-LABEL: cmp16_load_ule_imm16_minsize:
+; X64: # %bb.0:
+; X64-NEXT: cmpw $513, (%rdi) # imm = 0x201
+; X64-NEXT: setb %al
+; X64-NEXT: retq
+ %ld = load i16, ptr %p0
+ %cmp = icmp ule i16 %ld, 512
+ ret i1 %cmp
+}
+
+define i1 @cmp16_load_ule_imm16_optsize(ptr %p0) optsize {
+; X86-GENERIC-LABEL: cmp16_load_ule_imm16_optsize:
+; X86-GENERIC: # %bb.0:
+; X86-GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-GENERIC-NEXT: movzwl (%eax), %eax
+; X86-GENERIC-NEXT: cmpl $513, %eax # imm = 0x201
+; X86-GENERIC-NEXT: setb %al
+; X86-GENERIC-NEXT: retl
+;
+; X64-GENERIC-LABEL: cmp16_load_ule_imm16_optsize:
+; X64-GENERIC: # %bb.0:
+; X64-GENERIC-NEXT: movzwl (%rdi), %eax
+; X64-GENERIC-NEXT: cmpl $513, %eax # imm = 0x201
+; X64-GENERIC-NEXT: setb %al
+; X64-GENERIC-NEXT: retq
+;
+; X86-ATOM-LABEL: cmp16_load_ule_imm16_optsize:
+; X86-ATOM: # %bb.0:
+; X86-ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-ATOM-NEXT: cmpw $513, (%eax) # imm = 0x201
+; X86-ATOM-NEXT: setb %al
+; X86-ATOM-NEXT: retl
+;
+; X64-ATOM-LABEL: cmp16_load_ule_imm16_optsize:
+; X64-ATOM: # %bb.0:
+; X64-ATOM-NEXT: cmpw $513, (%rdi) # imm = 0x201
+; X64-ATOM-NEXT: setb %al
+; X64-ATOM-NEXT: retq
+ %ld = load i16, ptr %p0
+ %cmp = icmp ule i16 %ld, 512
+ ret i1 %cmp
+}
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