[llvm] [AMDGPU] Enhance s_waitcnt insertion before barrier for gfx12 (PR #90595)

[Pierre van Houtryve via llvm-commits]

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@@ -1386,6 +1386,14 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
   // This is used if an operand is a 32 bit register but needs to be aligned
   // regardless.
   void enforceOperandRCAlignment(MachineInstr &MI, unsigned OpName) const;
+
+  bool isBarrierStart(uint16_t Opcode) const {
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Pierre-vh wrote:

We use unsigned for opcodes in general, I think this should also use unsigned to be consistent (though it doesn't really matter)

https://github.com/llvm/llvm-project/pull/90595