[llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)

[Joshua Cranmer via llvm-commits]

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@@ -626,6 +626,100 @@ Instruction *InstCombinerImpl::foldPowiReassoc(BinaryOperator &I) {
   return nullptr;
 }
 
+static bool isFSqrtDivToFMulLegal(Instruction *X,
+                                  const SmallVectorImpl<Instruction *> &R1,
+                                  const SmallVectorImpl<Instruction *> &R2) {
+  BasicBlock *BBx = X->getParent();
+  BasicBlock *BBr1 = R1[0]->getParent();
+  BasicBlock *BBr2 = R2[0]->getParent();
+  // Check the constaints on instruction X.
+  auto XConstraintsSatisfied = [X]() {
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jcranmer-intel wrote:

This doesn't need to be a lambda function, just write `if (!X->hasAllowReassoc())`

https://github.com/llvm/llvm-project/pull/87474