[llvm] [RISCV] Support postRA vsetvl insertion pass (PR #70549)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 28 21:48:33 PDT 2024
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@@ -1705,11 +1875,16 @@ void RISCVInsertVSETVLI::insertReadVL(MachineBasicBlock &MBB) {
MachineInstr &MI = *I++;
if (RISCV::isFaultFirstLoad(MI)) {
Register VLOutput = MI.getOperand(1).getReg();
- if (!MRI->use_nodbg_empty(VLOutput))
- BuildMI(MBB, I, MI.getDebugLoc(), TII->get(RISCV::PseudoReadVL),
- VLOutput);
+ bool IsVirtual = MI.getOperand(1).getReg().isVirtual();
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lukel97 wrote:
Is the VL output ever not virtual?
https://github.com/llvm/llvm-project/pull/70549
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