[llvm] [RISC-V][ISel] Remove redundant czero.eqz like 'czero.eqz a0, a0, a0' (PR #90208)

Zhijin Zeng via llvm-commits llvm-commits at lists.llvm.org
Sat Apr 27 22:38:15 PDT 2024


zengdage wrote:

> > In RISC-V ISel,the instruction `czero.eqz a0, a0, a0` is meaningless,I think it need to be removed. So I upload the patch to do this job. When the condition is `setcc falseValue, 0, seteq`, the `select `instruction don't need to add a ` czero.eqz` instruciton.
> 
> Be careful not to include the Chinese punctuation in your PR description :)

Thank you. I'll be careful next time.

https://github.com/llvm/llvm-project/pull/90208


More information about the llvm-commits mailing list