[llvm] [RISCV] Support instruction sizes up to 176-bits in disassembler. (PR #90371)

[Craig Topper via llvm-commits]

topperc wrote:

> Are we going to use larger instruction length?

Not that I know of, but when I updated llvm-objdump in #90093 there was concern that I didn't handle 48-bit instructions. So I figured if that was really a concern we need to fix the disassembler too.

https://github.com/llvm/llvm-project/pull/90371