[llvm] [X86] Adding lowerings for vector ISD::LRINT and ISD::LLRINT (PR #90065)

[via llvm-commits]

github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

<details>
<summary>
You can test this locally with the following command:
</summary>

``````````bash
git-clang-format --diff 76a3be7c766bd55221c3d0d0a74c42f82c5d76ed 9b02ca36fde47827d11fef9a849a59b82cb45d40 -- llvm/lib/Target/X86/X86ISelLowering.cpp
``````````

</details>

<details>
<summary>
View the diff from clang-format here.
</summary>

``````````diff
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 9b6deefc52..c149ee289b 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -1737,7 +1737,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
       setOperationAction(ISD::EXTRACT_SUBVECTOR, VT, Custom);
   }
   if (Subtarget.hasDQI() && Subtarget.hasVLX()) {
-    for (MVT VT : { MVT::v4f32, MVT::v8f32, MVT::v2f64, MVT::v4f64 }) {
+    for (MVT VT : {MVT::v4f32, MVT::v8f32, MVT::v2f64, MVT::v4f64}) {
       setOperationAction(ISD::LRINT, VT, Legal);
       setOperationAction(ISD::LLRINT, VT, Legal);
     }

``````````

</details>


https://github.com/llvm/llvm-project/pull/90065