[llvm] 7152194 - [MIPS] match llvm.{min,max}num with {min,max}.fmt for R6 (#89021)
via llvm-commits
llvm-commits at lists.llvm.org
Sat Apr 27 00:53:06 PDT 2024
Author: Cinhi Young
Date: 2024-04-27T15:53:02+08:00
New Revision: 715219482b99ceef9bf83a2ff68c64c8faa930cd
URL: https://github.com/llvm/llvm-project/commit/715219482b99ceef9bf83a2ff68c64c8faa930cd
DIFF: https://github.com/llvm/llvm-project/commit/715219482b99ceef9bf83a2ff68c64c8faa930cd.diff
LOG: [MIPS] match llvm.{min,max}num with {min,max}.fmt for R6 (#89021)
- The behavior is similar to UCOMISD on x86, which is also used to
compare two fp values, specifically on handling of NaNs.
- Update related tests regarding this change.
- The further goal is to implement `llvm.minimum` and `llvm.maximum`
intrinsics for MIPS R6 and Pre-R6.
Part of https://github.com/llvm/llvm-project/issues/64207
Added:
llvm/test/CodeGen/Mips/mipsr6-minmaxnum.ll
Modified:
llvm/lib/Target/Mips/Mips32r6InstrInfo.td
llvm/lib/Target/Mips/MipsISelLowering.cpp
llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/Mips/Mips32r6InstrInfo.td b/llvm/lib/Target/Mips/Mips32r6InstrInfo.td
index bef7607118ce0b..f609305bfee429 100644
--- a/llvm/lib/Target/Mips/Mips32r6InstrInfo.td
+++ b/llvm/lib/Target/Mips/Mips32r6InstrInfo.td
@@ -1117,6 +1117,22 @@ def : MipsPat<(select i32:$cond, immz, i32:$f),
ISA_MIPS32R6;
}
+// llvm.fmin/fmax operations.
+let AdditionalPredicates = [NotInMicroMips] in {
+ def : MipsPat<(fmaxnum f32:$lhs, f32:$rhs),
+ (MAX_S f32:$lhs, f32:$rhs)>,
+ ISA_MIPS32R6;
+ def : MipsPat<(fmaxnum f64:$lhs, f64:$rhs),
+ (MAX_D f64:$lhs, f64:$rhs)>,
+ ISA_MIPS32R6;
+ def : MipsPat<(fminnum f32:$lhs, f32:$rhs),
+ (MIN_S f32:$lhs, f32:$rhs)>,
+ ISA_MIPS32R6;
+ def : MipsPat<(fminnum f64:$lhs, f64:$rhs),
+ (MIN_D f64:$lhs, f64:$rhs)>,
+ ISA_MIPS32R6;
+}
+
// Pseudo instructions
let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, hasDelaySlot = 1,
hasExtraSrcRegAllocReq = 1, isCTI = 1, Defs = [AT], hasPostISelHook = 1 in {
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index 7bc66b2d9f4b1b..8f7c47370ee51b 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -358,6 +358,15 @@ MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,
setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom);
setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom);
+ // Lower fmin and fmax operations for MIPS R6.
+ // Instructions are defined but never used.
+ if (Subtarget.hasMips32r6() || Subtarget.hasMips64r6()) {
+ setOperationAction(ISD::FMINNUM, MVT::f32, Legal);
+ setOperationAction(ISD::FMINNUM, MVT::f64, Legal);
+ setOperationAction(ISD::FMAXNUM, MVT::f32, Legal);
+ setOperationAction(ISD::FMAXNUM, MVT::f64, Legal);
+ }
+
if (Subtarget.isGP64bit()) {
setOperationAction(ISD::GlobalAddress, MVT::i64, Custom);
setOperationAction(ISD::BlockAddress, MVT::i64, Custom);
diff --git a/llvm/test/CodeGen/Mips/mipsr6-minmaxnum.ll b/llvm/test/CodeGen/Mips/mipsr6-minmaxnum.ll
new file mode 100644
index 00000000000000..e14e89916e6dc1
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/mipsr6-minmaxnum.ll
@@ -0,0 +1,69 @@
+; RUN: llc %s -mtriple=mipsisa32r6el-linux-gnu -o - | \
+; RUN: FileCheck %s --check-prefix=MIPS32R6EL
+; RUN: llc %s -mtriple=mipsisa64r6el-linux-gnuabi64 -o - | \
+; RUN: FileCheck %s --check-prefix=MIPS64R6EL
+
+define float @mins(float %x, float %y) {
+; MIPS32R6EL-LABEL: mins
+; MIPS32R6EL: # %bb.0:
+; MIPS32R6EL-NEXT: jr $ra
+; MIPS32R6EL-NEXT: min.s $f0, $f12, $f14
+;
+; MIPS64R6EL-LABEL: mins
+; MIPS64R6EL: # %bb.0:
+; MIPS64R6EL-NEXT: jr $ra
+; MIPS64R6EL-NEXT: min.s $f0, $f12, $f13
+
+ %r = tail call float @llvm.minnum.f32(float %x, float %y)
+ ret float %r
+}
+
+define float @maxs(float %x, float %y) {
+; MIPS32R6EL-LABEL: maxs
+; MIPS32R6EL: # %bb.0:
+; MIPS32R6EL-NEXT: jr $ra
+; MIPS32R6EL-NEXT: max.s $f0, $f12, $f14
+;
+; MIPS64R6EL-LABEL: maxs
+; MIPS64R6EL: # %bb.0:
+; MIPS64R6EL-NEXT: jr $ra
+; MIPS64R6EL-NEXT: max.s $f0, $f12, $f13
+
+ %r = tail call float @llvm.maxnum.f32(float %x, float %y)
+ ret float %r
+}
+
+define double @mind(double %x, double %y) {
+; MIPS32R6EL-LABEL: mind
+; MIPS32R6EL: # %bb.0:
+; MIPS32R6EL-NEXT: jr $ra
+; MIPS32R6EL-NEXT: min.d $f0, $f12, $f14
+;
+; MIPS64R6EL-LABEL: mind
+; MIPS64R6EL: # %bb.0:
+; MIPS64R6EL-NEXT: jr $ra
+; MIPS64R6EL-NEXT: min.d $f0, $f12, $f13
+
+ %r = tail call double @llvm.minnum.f64(double %x, double %y)
+ ret double %r
+}
+
+define double @maxd(double %x, double %y) {
+; MIPS32R6EL-LABEL: maxd
+; MIPS32R6EL: # %bb.0:
+; MIPS32R6EL-NEXT: jr $ra
+; MIPS32R6EL-NEXT: max.d $f0, $f12, $f14
+;
+; MIPS64R6EL-LABEL: maxd
+; MIPS64R6EL: # %bb.0:
+; MIPS64R6EL-NEXT: jr $ra
+; MIPS64R6EL-NEXT: max.d $f0, $f12, $f13
+
+ %r = tail call double @llvm.maxnum.f64(double %x, double %y)
+ ret double %r
+}
+
+declare float @llvm.minnum.f32(float, float)
+declare float @llvm.maxnum.f32(float, float)
+declare double @llvm.minnum.f64(double, double)
+declare double @llvm.maxnum.f64(double, double)
diff --git a/llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll b/llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll
index 45c7ab980edd64..fe68bee408fc89 100644
--- a/llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll
+++ b/llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll
@@ -2365,101 +2365,159 @@ entry:
declare float @llvm.minnum.f32(float %Val, float %b)
define void @fminnum(float %b) {
-; MIPS32-LABEL: fminnum:
-; MIPS32: # %bb.0: # %entry
-; MIPS32-NEXT: lui $2, %hi(_gp_disp)
-; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
-; MIPS32-NEXT: addiu $sp, $sp, -24
-; MIPS32-NEXT: .cfi_def_cfa_offset 24
-; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
-; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
-; MIPS32-NEXT: .cfi_offset 31, -4
-; MIPS32-NEXT: .cfi_offset 16, -8
-; MIPS32-NEXT: addu $gp, $2, $25
-; MIPS32-NEXT: mov.s $f14, $f12
-; MIPS32-NEXT: lw $16, %got(g)($gp)
-; MIPS32-NEXT: lh $1, 0($16)
-; MIPS32-NEXT: fill.h $w0, $1
-; MIPS32-NEXT: fexupr.w $w0, $w0
-; MIPS32-NEXT: copy_s.w $1, $w0[0]
-; MIPS32-NEXT: lw $25, %call16(fminf)($gp)
-; MIPS32-NEXT: jalr $25
-; MIPS32-NEXT: mtc1 $1, $f12
-; MIPS32-NEXT: mfc1 $1, $f0
-; MIPS32-NEXT: fill.w $w0, $1
-; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
-; MIPS32-NEXT: copy_u.h $1, $w0[0]
-; MIPS32-NEXT: sh $1, 0($16)
-; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
-; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
-; MIPS32-NEXT: jr $ra
-; MIPS32-NEXT: addiu $sp, $sp, 24
+; MIPS32-O32-LABEL: fminnum:
+; MIPS32-O32: # %bb.0: # %entry
+; MIPS32-O32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-O32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-O32-NEXT: addiu $sp, $sp, -24
+; MIPS32-O32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-O32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-O32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-O32-NEXT: .cfi_offset 31, -4
+; MIPS32-O32-NEXT: .cfi_offset 16, -8
+; MIPS32-O32-NEXT: addu $gp, $2, $25
+; MIPS32-O32-NEXT: mov.s $f14, $f12
+; MIPS32-O32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-O32-NEXT: lh $1, 0($16)
+; MIPS32-O32-NEXT: fill.h $w0, $1
+; MIPS32-O32-NEXT: fexupr.w $w0, $w0
+; MIPS32-O32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-O32-NEXT: lw $25, %call16(fminf)($gp)
+; MIPS32-O32-NEXT: jalr $25
+; MIPS32-O32-NEXT: mtc1 $1, $f12
+; MIPS32-O32-NEXT: mfc1 $1, $f0
+; MIPS32-O32-NEXT: fill.w $w0, $1
+; MIPS32-O32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-O32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-O32-NEXT: sh $1, 0($16)
+; MIPS32-O32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-O32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-O32-NEXT: jr $ra
+; MIPS32-O32-NEXT: addiu $sp, $sp, 24
;
-; MIPS64-N32-LABEL: fminnum:
-; MIPS64-N32: # %bb.0: # %entry
-; MIPS64-N32-NEXT: addiu $sp, $sp, -32
-; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
-; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
-; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
-; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
-; MIPS64-N32-NEXT: .cfi_offset 31, -8
-; MIPS64-N32-NEXT: .cfi_offset 28, -16
-; MIPS64-N32-NEXT: .cfi_offset 16, -24
-; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fminnum)))
-; MIPS64-N32-NEXT: addu $1, $1, $25
-; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(fminnum)))
-; MIPS64-N32-NEXT: mov.s $f13, $f12
-; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
-; MIPS64-N32-NEXT: lh $1, 0($16)
-; MIPS64-N32-NEXT: fill.h $w0, $1
-; MIPS64-N32-NEXT: fexupr.w $w0, $w0
-; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
-; MIPS64-N32-NEXT: lw $25, %call16(fminf)($gp)
-; MIPS64-N32-NEXT: jalr $25
-; MIPS64-N32-NEXT: mtc1 $1, $f12
-; MIPS64-N32-NEXT: mfc1 $1, $f0
-; MIPS64-N32-NEXT: fill.w $w0, $1
-; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
-; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
-; MIPS64-N32-NEXT: sh $1, 0($16)
-; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
-; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
-; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
-; MIPS64-N32-NEXT: jr $ra
-; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+; MIPS64R5-N32-LABEL: fminnum:
+; MIPS64R5-N32: # %bb.0: # %entry
+; MIPS64R5-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64R5-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64R5-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64R5-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64R5-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64R5-N32-NEXT: .cfi_offset 31, -8
+; MIPS64R5-N32-NEXT: .cfi_offset 28, -16
+; MIPS64R5-N32-NEXT: .cfi_offset 16, -24
+; MIPS64R5-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fminnum)))
+; MIPS64R5-N32-NEXT: addu $1, $1, $25
+; MIPS64R5-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(fminnum)))
+; MIPS64R5-N32-NEXT: mov.s $f13, $f12
+; MIPS64R5-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64R5-N32-NEXT: lh $1, 0($16)
+; MIPS64R5-N32-NEXT: fill.h $w0, $1
+; MIPS64R5-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64R5-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64R5-N32-NEXT: lw $25, %call16(fminf)($gp)
+; MIPS64R5-N32-NEXT: jalr $25
+; MIPS64R5-N32-NEXT: mtc1 $1, $f12
+; MIPS64R5-N32-NEXT: mfc1 $1, $f0
+; MIPS64R5-N32-NEXT: fill.w $w0, $1
+; MIPS64R5-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64R5-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64R5-N32-NEXT: sh $1, 0($16)
+; MIPS64R5-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64R5-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64R5-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64R5-N32-NEXT: jr $ra
+; MIPS64R5-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64R5-N64-LABEL: fminnum:
+; MIPS64R5-N64: # %bb.0: # %entry
+; MIPS64R5-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64R5-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64R5-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64R5-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64R5-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64R5-N64-NEXT: .cfi_offset 31, -8
+; MIPS64R5-N64-NEXT: .cfi_offset 28, -16
+; MIPS64R5-N64-NEXT: .cfi_offset 16, -24
+; MIPS64R5-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fminnum)))
+; MIPS64R5-N64-NEXT: daddu $1, $1, $25
+; MIPS64R5-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(fminnum)))
+; MIPS64R5-N64-NEXT: mov.s $f13, $f12
+; MIPS64R5-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64R5-N64-NEXT: lh $1, 0($16)
+; MIPS64R5-N64-NEXT: fill.h $w0, $1
+; MIPS64R5-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64R5-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64R5-N64-NEXT: ld $25, %call16(fminf)($gp)
+; MIPS64R5-N64-NEXT: jalr $25
+; MIPS64R5-N64-NEXT: mtc1 $1, $f12
+; MIPS64R5-N64-NEXT: mfc1 $1, $f0
+; MIPS64R5-N64-NEXT: fill.w $w0, $1
+; MIPS64R5-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64R5-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64R5-N64-NEXT: sh $1, 0($16)
+; MIPS64R5-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64R5-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64R5-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64R5-N64-NEXT: jr $ra
+; MIPS64R5-N64-NEXT: daddiu $sp, $sp, 32
+;
+; MIPSR6-O32-LABEL: fminnum:
+; MIPSR6-O32: # %bb.0: # %entry
+; MIPSR6-O32-NEXT: lui $2, %hi(_gp_disp)
+; MIPSR6-O32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPSR6-O32-NEXT: addu $1, $2, $25
+; MIPSR6-O32-NEXT: lw $1, %got(g)($1)
+; MIPSR6-O32-NEXT: lh $2, 0($1)
+; MIPSR6-O32-NEXT: fill.h $w0, $2
+; MIPSR6-O32-NEXT: fexupr.w $w0, $w0
+; MIPSR6-O32-NEXT: copy_s.w $2, $w0[0]
+; MIPSR6-O32-NEXT: mtc1 $2, $f0
+; MIPSR6-O32-NEXT: min.s $f0, $f0, $f12
+; MIPSR6-O32-NEXT: mfc1 $2, $f0
+; MIPSR6-O32-NEXT: fill.w $w0, $2
+; MIPSR6-O32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPSR6-O32-NEXT: copy_u.h $2, $w0[0]
+; MIPSR6-O32-NEXT: jr $ra
+; MIPSR6-O32-NEXT: sh $2, 0($1)
+;
+; MIPSR6-N32-LABEL: fminnum:
+; MIPSR6-N32: # %bb.0: # %entry
+; MIPSR6-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fminnum)))
+; MIPSR6-N32-NEXT: addu $1, $1, $25
+; MIPSR6-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(fminnum)))
+; MIPSR6-N32-NEXT: lw $1, %got_disp(g)($1)
+; MIPSR6-N32-NEXT: lh $2, 0($1)
+; MIPSR6-N32-NEXT: fill.h $w0, $2
+; MIPSR6-N32-NEXT: fexupr.w $w0, $w0
+; MIPSR6-N32-NEXT: copy_s.w $2, $w0[0]
+; MIPSR6-N32-NEXT: mtc1 $2, $f0
+; MIPSR6-N32-NEXT: min.s $f0, $f0, $f12
+; MIPSR6-N32-NEXT: mfc1 $2, $f0
+; MIPSR6-N32-NEXT: fill.w $w0, $2
+; MIPSR6-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPSR6-N32-NEXT: copy_u.h $2, $w0[0]
+; MIPSR6-N32-NEXT: jr $ra
+; MIPSR6-N32-NEXT: sh $2, 0($1)
+;
+; MIPSR6-N64-LABEL: fminnum:
+; MIPSR6-N64: # %bb.0: # %entry
+; MIPSR6-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fminnum)))
+; MIPSR6-N64-NEXT: daddu $1, $1, $25
+; MIPSR6-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(fminnum)))
+; MIPSR6-N64-NEXT: ld $1, %got_disp(g)($1)
+; MIPSR6-N64-NEXT: lh $2, 0($1)
+; MIPSR6-N64-NEXT: fill.h $w0, $2
+; MIPSR6-N64-NEXT: fexupr.w $w0, $w0
+; MIPSR6-N64-NEXT: copy_s.w $2, $w0[0]
+; MIPSR6-N64-NEXT: mtc1 $2, $f0
+; MIPSR6-N64-NEXT: min.s $f0, $f0, $f12
+; MIPSR6-N64-NEXT: mfc1 $2, $f0
+; MIPSR6-N64-NEXT: fill.w $w0, $2
+; MIPSR6-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPSR6-N64-NEXT: copy_u.h $2, $w0[0]
+; MIPSR6-N64-NEXT: jr $ra
+; MIPSR6-N64-NEXT: sh $2, 0($1)
;
-; MIPS64-N64-LABEL: fminnum:
-; MIPS64-N64: # %bb.0: # %entry
-; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
-; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
-; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
-; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
-; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
-; MIPS64-N64-NEXT: .cfi_offset 31, -8
-; MIPS64-N64-NEXT: .cfi_offset 28, -16
-; MIPS64-N64-NEXT: .cfi_offset 16, -24
-; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fminnum)))
-; MIPS64-N64-NEXT: daddu $1, $1, $25
-; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(fminnum)))
-; MIPS64-N64-NEXT: mov.s $f13, $f12
-; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
-; MIPS64-N64-NEXT: lh $1, 0($16)
-; MIPS64-N64-NEXT: fill.h $w0, $1
-; MIPS64-N64-NEXT: fexupr.w $w0, $w0
-; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
-; MIPS64-N64-NEXT: ld $25, %call16(fminf)($gp)
-; MIPS64-N64-NEXT: jalr $25
-; MIPS64-N64-NEXT: mtc1 $1, $f12
-; MIPS64-N64-NEXT: mfc1 $1, $f0
-; MIPS64-N64-NEXT: fill.w $w0, $1
-; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
-; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
-; MIPS64-N64-NEXT: sh $1, 0($16)
-; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
-; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
-; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
-; MIPS64-N64-NEXT: jr $ra
-; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
%0 = load i16, ptr @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
@@ -2477,101 +2535,158 @@ entry:
declare float @llvm.maxnum.f32(float %Val, float %b)
define void @fmaxnum(float %b) {
-; MIPS32-LABEL: fmaxnum:
-; MIPS32: # %bb.0: # %entry
-; MIPS32-NEXT: lui $2, %hi(_gp_disp)
-; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
-; MIPS32-NEXT: addiu $sp, $sp, -24
-; MIPS32-NEXT: .cfi_def_cfa_offset 24
-; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
-; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
-; MIPS32-NEXT: .cfi_offset 31, -4
-; MIPS32-NEXT: .cfi_offset 16, -8
-; MIPS32-NEXT: addu $gp, $2, $25
-; MIPS32-NEXT: mov.s $f14, $f12
-; MIPS32-NEXT: lw $16, %got(g)($gp)
-; MIPS32-NEXT: lh $1, 0($16)
-; MIPS32-NEXT: fill.h $w0, $1
-; MIPS32-NEXT: fexupr.w $w0, $w0
-; MIPS32-NEXT: copy_s.w $1, $w0[0]
-; MIPS32-NEXT: lw $25, %call16(fmaxf)($gp)
-; MIPS32-NEXT: jalr $25
-; MIPS32-NEXT: mtc1 $1, $f12
-; MIPS32-NEXT: mfc1 $1, $f0
-; MIPS32-NEXT: fill.w $w0, $1
-; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
-; MIPS32-NEXT: copy_u.h $1, $w0[0]
-; MIPS32-NEXT: sh $1, 0($16)
-; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
-; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
-; MIPS32-NEXT: jr $ra
-; MIPS32-NEXT: addiu $sp, $sp, 24
+; MIPS32-O32-LABEL: fmaxnum:
+; MIPS32-O32: # %bb.0: # %entry
+; MIPS32-O32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-O32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-O32-NEXT: addiu $sp, $sp, -24
+; MIPS32-O32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-O32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-O32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-O32-NEXT: .cfi_offset 31, -4
+; MIPS32-O32-NEXT: .cfi_offset 16, -8
+; MIPS32-O32-NEXT: addu $gp, $2, $25
+; MIPS32-O32-NEXT: mov.s $f14, $f12
+; MIPS32-O32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-O32-NEXT: lh $1, 0($16)
+; MIPS32-O32-NEXT: fill.h $w0, $1
+; MIPS32-O32-NEXT: fexupr.w $w0, $w0
+; MIPS32-O32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-O32-NEXT: lw $25, %call16(fmaxf)($gp)
+; MIPS32-O32-NEXT: jalr $25
+; MIPS32-O32-NEXT: mtc1 $1, $f12
+; MIPS32-O32-NEXT: mfc1 $1, $f0
+; MIPS32-O32-NEXT: fill.w $w0, $1
+; MIPS32-O32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-O32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-O32-NEXT: sh $1, 0($16)
+; MIPS32-O32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-O32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-O32-NEXT: jr $ra
+; MIPS32-O32-NEXT: addiu $sp, $sp, 24
;
-; MIPS64-N32-LABEL: fmaxnum:
-; MIPS64-N32: # %bb.0: # %entry
-; MIPS64-N32-NEXT: addiu $sp, $sp, -32
-; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
-; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
-; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
-; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
-; MIPS64-N32-NEXT: .cfi_offset 31, -8
-; MIPS64-N32-NEXT: .cfi_offset 28, -16
-; MIPS64-N32-NEXT: .cfi_offset 16, -24
-; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fmaxnum)))
-; MIPS64-N32-NEXT: addu $1, $1, $25
-; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(fmaxnum)))
-; MIPS64-N32-NEXT: mov.s $f13, $f12
-; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
-; MIPS64-N32-NEXT: lh $1, 0($16)
-; MIPS64-N32-NEXT: fill.h $w0, $1
-; MIPS64-N32-NEXT: fexupr.w $w0, $w0
-; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
-; MIPS64-N32-NEXT: lw $25, %call16(fmaxf)($gp)
-; MIPS64-N32-NEXT: jalr $25
-; MIPS64-N32-NEXT: mtc1 $1, $f12
-; MIPS64-N32-NEXT: mfc1 $1, $f0
-; MIPS64-N32-NEXT: fill.w $w0, $1
-; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
-; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
-; MIPS64-N32-NEXT: sh $1, 0($16)
-; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
-; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
-; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
-; MIPS64-N32-NEXT: jr $ra
-; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+; MIPS64R5-N32-LABEL: fmaxnum:
+; MIPS64R5-N32: # %bb.0: # %entry
+; MIPS64R5-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64R5-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64R5-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64R5-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64R5-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64R5-N32-NEXT: .cfi_offset 31, -8
+; MIPS64R5-N32-NEXT: .cfi_offset 28, -16
+; MIPS64R5-N32-NEXT: .cfi_offset 16, -24
+; MIPS64R5-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fmaxnum)))
+; MIPS64R5-N32-NEXT: addu $1, $1, $25
+; MIPS64R5-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(fmaxnum)))
+; MIPS64R5-N32-NEXT: mov.s $f13, $f12
+; MIPS64R5-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64R5-N32-NEXT: lh $1, 0($16)
+; MIPS64R5-N32-NEXT: fill.h $w0, $1
+; MIPS64R5-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64R5-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64R5-N32-NEXT: lw $25, %call16(fmaxf)($gp)
+; MIPS64R5-N32-NEXT: jalr $25
+; MIPS64R5-N32-NEXT: mtc1 $1, $f12
+; MIPS64R5-N32-NEXT: mfc1 $1, $f0
+; MIPS64R5-N32-NEXT: fill.w $w0, $1
+; MIPS64R5-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64R5-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64R5-N32-NEXT: sh $1, 0($16)
+; MIPS64R5-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64R5-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64R5-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64R5-N32-NEXT: jr $ra
+; MIPS64R5-N32-NEXT: addiu $sp, $sp, 32
;
-; MIPS64-N64-LABEL: fmaxnum:
-; MIPS64-N64: # %bb.0: # %entry
-; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
-; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
-; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
-; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
-; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
-; MIPS64-N64-NEXT: .cfi_offset 31, -8
-; MIPS64-N64-NEXT: .cfi_offset 28, -16
-; MIPS64-N64-NEXT: .cfi_offset 16, -24
-; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fmaxnum)))
-; MIPS64-N64-NEXT: daddu $1, $1, $25
-; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(fmaxnum)))
-; MIPS64-N64-NEXT: mov.s $f13, $f12
-; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
-; MIPS64-N64-NEXT: lh $1, 0($16)
-; MIPS64-N64-NEXT: fill.h $w0, $1
-; MIPS64-N64-NEXT: fexupr.w $w0, $w0
-; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
-; MIPS64-N64-NEXT: ld $25, %call16(fmaxf)($gp)
-; MIPS64-N64-NEXT: jalr $25
-; MIPS64-N64-NEXT: mtc1 $1, $f12
-; MIPS64-N64-NEXT: mfc1 $1, $f0
-; MIPS64-N64-NEXT: fill.w $w0, $1
-; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
-; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
-; MIPS64-N64-NEXT: sh $1, 0($16)
-; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
-; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
-; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
-; MIPS64-N64-NEXT: jr $ra
-; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
+; MIPS64R5-N64-LABEL: fmaxnum:
+; MIPS64R5-N64: # %bb.0: # %entry
+; MIPS64R5-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64R5-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64R5-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64R5-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64R5-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64R5-N64-NEXT: .cfi_offset 31, -8
+; MIPS64R5-N64-NEXT: .cfi_offset 28, -16
+; MIPS64R5-N64-NEXT: .cfi_offset 16, -24
+; MIPS64R5-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fmaxnum)))
+; MIPS64R5-N64-NEXT: daddu $1, $1, $25
+; MIPS64R5-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(fmaxnum)))
+; MIPS64R5-N64-NEXT: mov.s $f13, $f12
+; MIPS64R5-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64R5-N64-NEXT: lh $1, 0($16)
+; MIPS64R5-N64-NEXT: fill.h $w0, $1
+; MIPS64R5-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64R5-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64R5-N64-NEXT: ld $25, %call16(fmaxf)($gp)
+; MIPS64R5-N64-NEXT: jalr $25
+; MIPS64R5-N64-NEXT: mtc1 $1, $f12
+; MIPS64R5-N64-NEXT: mfc1 $1, $f0
+; MIPS64R5-N64-NEXT: fill.w $w0, $1
+; MIPS64R5-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64R5-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64R5-N64-NEXT: sh $1, 0($16)
+; MIPS64R5-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64R5-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64R5-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64R5-N64-NEXT: jr $ra
+; MIPS64R5-N64-NEXT: daddiu $sp, $sp, 32
+;
+; MIPSR6-O32-LABEL: fmaxnum:
+; MIPSR6-O32: # %bb.0:
+; MIPSR6-O32-NEXT: lui $2, %hi(_gp_disp)
+; MIPSR6-O32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPSR6-O32-NEXT: addu $1, $2, $25
+; MIPSR6-O32-NEXT: lw $1, %got(g)($1)
+; MIPSR6-O32-NEXT: lh $2, 0($1)
+; MIPSR6-O32-NEXT: fill.h $w0, $2
+; MIPSR6-O32-NEXT: fexupr.w $w0, $w0
+; MIPSR6-O32-NEXT: copy_s.w $2, $w0[0]
+; MIPSR6-O32-NEXT: mtc1 $2, $f0
+; MIPSR6-O32-NEXT: max.s $f0, $f0, $f12
+; MIPSR6-O32-NEXT: mfc1 $2, $f0
+; MIPSR6-O32-NEXT: fill.w $w0, $2
+; MIPSR6-O32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPSR6-O32-NEXT: copy_u.h $2, $w0[0]
+; MIPSR6-O32-NEXT: jr $ra
+; MIPSR6-O32-NEXT: sh $2, 0($1)
+;
+; MIPSR6-N32-LABEL: fmaxnum:
+; MIPSR6-N32: # %bb.0:
+; MIPSR6-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fmaxnum)))
+; MIPSR6-N32-NEXT: addu $1, $1, $25
+; MIPSR6-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(fmaxnum)))
+; MIPSR6-N32-NEXT: lw $1, %got_disp(g)($1)
+; MIPSR6-N32-NEXT: lh $2, 0($1)
+; MIPSR6-N32-NEXT: fill.h $w0, $2
+; MIPSR6-N32-NEXT: fexupr.w $w0, $w0
+; MIPSR6-N32-NEXT: copy_s.w $2, $w0[0]
+; MIPSR6-N32-NEXT: mtc1 $2, $f0
+; MIPSR6-N32-NEXT: max.s $f0, $f0, $f12
+; MIPSR6-N32-NEXT: mfc1 $2, $f0
+; MIPSR6-N32-NEXT: fill.w $w0, $2
+; MIPSR6-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPSR6-N32-NEXT: copy_u.h $2, $w0[0]
+; MIPSR6-N32-NEXT: jr $ra
+; MIPSR6-N32-NEXT: sh $2, 0($1)
+;
+; MIPSR6-N64-LABEL: fmaxnum:
+; MIPSR6-N64: # %bb.0:
+; MIPSR6-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fmaxnum)))
+; MIPSR6-N64-NEXT: daddu $1, $1, $25
+; MIPSR6-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(fmaxnum)))
+; MIPSR6-N64-NEXT: ld $1, %got_disp(g)($1)
+; MIPSR6-N64-NEXT: lh $2, 0($1)
+; MIPSR6-N64-NEXT: fill.h $w0, $2
+; MIPSR6-N64-NEXT: fexupr.w $w0, $w0
+; MIPSR6-N64-NEXT: copy_s.w $2, $w0[0]
+; MIPSR6-N64-NEXT: mtc1 $2, $f0
+; MIPSR6-N64-NEXT: max.s $f0, $f0, $f12
+; MIPSR6-N64-NEXT: mfc1 $2, $f0
+; MIPSR6-N64-NEXT: fill.w $w0, $2
+; MIPSR6-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPSR6-N64-NEXT: copy_u.h $2, $w0[0]
+; MIPSR6-N64-NEXT: jr $ra
+; MIPSR6-N64-NEXT: sh $2, 0($1)
entry:
%0 = load i16, ptr @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
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