[llvm] 022dc6b - [NFC] [HWASan] factor out debug record annotation (#90252)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 26 13:11:16 PDT 2024
Author: Florian Mayer
Date: 2024-04-26T13:11:12-07:00
New Revision: 022dc6bab5c47dfd18cde87f36e8fece43328fdf
URL: https://github.com/llvm/llvm-project/commit/022dc6bab5c47dfd18cde87f36e8fece43328fdf
DIFF: https://github.com/llvm/llvm-project/commit/022dc6bab5c47dfd18cde87f36e8fece43328fdf.diff
LOG: [NFC] [HWASan] factor out debug record annotation (#90252)
This will also be used by stack MTE
Added:
Modified:
llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h b/llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
index fb3ab33a0629da..16589a605e609b 100644
--- a/llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
+++ b/llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
@@ -86,6 +86,8 @@ Value *getFP(IRBuilder<> &IRB);
Value *getPC(const Triple &TargetTriple, IRBuilder<> &IRB);
Value *getAndroidSlotPtr(IRBuilder<> &IRB, int Slot);
+void annotateDebugRecords(AllocaInfo &Info, unsigned int Tag);
+
} // namespace memtag
} // namespace llvm
diff --git a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
index 88b85234034038..fa661b17c13a90 100644
--- a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
@@ -1385,14 +1385,6 @@ bool HWAddressSanitizer::instrumentLandingPads(
return true;
}
-static DbgAssignIntrinsic *DynCastToDbgAssign(DbgVariableIntrinsic *DVI) {
- return dyn_cast<DbgAssignIntrinsic>(DVI);
-}
-
-static DbgVariableRecord *DynCastToDbgAssign(DbgVariableRecord *DVR) {
- return DVR->isDbgAssign() ? DVR : nullptr;
-}
-
bool HWAddressSanitizer::instrumentStack(memtag::StackInfo &SInfo,
Value *StackTag, Value *UARTag,
const DominatorTree &DT,
@@ -1448,28 +1440,7 @@ bool HWAddressSanitizer::instrumentStack(memtag::StackInfo &SInfo,
!memtag::isLifetimeIntrinsic(User);
});
- // Helper utility for adding DW_OP_LLVM_tag_offset to debug-info records,
- // abstracted over whether they're intrinsic-stored or DbgVariableRecord
- // stored.
- auto AnnotateDbgRecord = [&](auto *DPtr) {
- // Prepend "tag_offset, N" to the dwarf expression.
- // Tag offset logically applies to the alloca pointer, and it makes sense
- // to put it at the beginning of the expression.
- SmallVector<uint64_t, 8> NewOps = {dwarf::DW_OP_LLVM_tag_offset,
- retagMask(N)};
- for (size_t LocNo = 0; LocNo < DPtr->getNumVariableLocationOps(); ++LocNo)
- if (DPtr->getVariableLocationOp(LocNo) == AI)
- DPtr->setExpression(DIExpression::appendOpsToArg(
- DPtr->getExpression(), NewOps, LocNo));
- if (auto *DAI = DynCastToDbgAssign(DPtr)) {
- if (DAI->getAddress() == AI)
- DAI->setAddressExpression(DIExpression::prependOpcodes(
- DAI->getAddressExpression(), NewOps));
- }
- };
-
- llvm::for_each(Info.DbgVariableIntrinsics, AnnotateDbgRecord);
- llvm::for_each(Info.DbgVariableRecords, AnnotateDbgRecord);
+ memtag::annotateDebugRecords(Info, retagMask(N));
auto TagEnd = [&](Instruction *Node) {
IRB.SetInsertPoint(Node);
diff --git a/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp b/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
index 7b1eb70168d894..0464ba5e181178 100644
--- a/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
+++ b/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
@@ -17,6 +17,7 @@
#include "llvm/Analysis/PostDominators.h"
#include "llvm/Analysis/StackSafetyAnalysis.h"
#include "llvm/Analysis/ValueTracking.h"
+#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/IRBuilder.h"
#include "llvm/IR/IntrinsicInst.h"
@@ -283,5 +284,37 @@ Value *getAndroidSlotPtr(IRBuilder<> &IRB, int Slot) {
IRB.CreateCall(ThreadPointerFunc), 8 * Slot);
}
+static DbgAssignIntrinsic *DynCastToDbgAssign(DbgVariableIntrinsic *DVI) {
+ return dyn_cast<DbgAssignIntrinsic>(DVI);
+}
+
+static DbgVariableRecord *DynCastToDbgAssign(DbgVariableRecord *DVR) {
+ return DVR->isDbgAssign() ? DVR : nullptr;
+}
+
+void annotateDebugRecords(AllocaInfo &Info, unsigned int Tag) {
+ // Helper utility for adding DW_OP_LLVM_tag_offset to debug-info records,
+ // abstracted over whether they're intrinsic-stored or DbgVariableRecord
+ // stored.
+ auto AnnotateDbgRecord = [&](auto *DPtr) {
+ // Prepend "tag_offset, N" to the dwarf expression.
+ // Tag offset logically applies to the alloca pointer, and it makes sense
+ // to put it at the beginning of the expression.
+ SmallVector<uint64_t, 8> NewOps = {dwarf::DW_OP_LLVM_tag_offset, Tag};
+ for (size_t LocNo = 0; LocNo < DPtr->getNumVariableLocationOps(); ++LocNo)
+ if (DPtr->getVariableLocationOp(LocNo) == Info.AI)
+ DPtr->setExpression(
+ DIExpression::appendOpsToArg(DPtr->getExpression(), NewOps, LocNo));
+ if (auto *DAI = DynCastToDbgAssign(DPtr)) {
+ if (DAI->getAddress() == Info.AI)
+ DAI->setAddressExpression(
+ DIExpression::prependOpcodes(DAI->getAddressExpression(), NewOps));
+ }
+ };
+
+ llvm::for_each(Info.DbgVariableIntrinsics, AnnotateDbgRecord);
+ llvm::for_each(Info.DbgVariableRecords, AnnotateDbgRecord);
+}
+
} // namespace memtag
} // namespace llvm
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