[llvm] [AArch64][SVE] Handle consecutive Predicates in CC_AArch64_Custom_Block (PR #90122)

[Zhaoshi Zheng via llvm-commits]

zhaoshiz wrote:

> Thanks for the patch.
> 
> I was wondering where this code kicks in for Z regs as I couldn't see any tests with arrays, but it's used for tuples of scalable vectors like in `@foo1` in `llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll`.
> 
> LGTM cheers, but I'll add another reviewer since I don't work on the backend much at the moment. So please wait before landing.

Thanks for reviewing. I'm working on scalable vectorizing linalg.reduce in MLIR and run into this case when I try to generate SVE instructions with mask types like <2x[4]xi1>. Without this fix, a mask of such type is assigned to Z registers and the backend crashes later.

https://github.com/llvm/llvm-project/pull/90122