[llvm] [RISCV][TableGen] Get right experimental extension name (PR #90185)

[Pengcheng Wang via llvm-commits]

wangpc-pp wrote:

> Alternatively, should we reject processor definitions that have experimental extensions? Are we sure that processors with experimental extensions interact properly with the gating of experimental extensions behind -menable-experimental-extensions for user facing tools like clang?

I found this issue (if it is an issue) in #90187 as `Ssnpm`, which is a mandatory extension, is an experimental extension.
I think we shouldn't have experimental extensions in precessor definitions, but there are some intermediate periods that we don't have other choices. For example, `Zicond` is experimental in LLVM 17, but it hasn't been changed for a long time and we moved it from experimental in LLVM 18. For downstreams, there is a period of half a year that experimental extensions exist in processor definitions (these definitions are just used for pre-silicon tests).

https://github.com/llvm/llvm-project/pull/90185