[llvm] [DAG] SelectionDAG.computeKnownBits - add NSW/NUW flags support to ISD::SHL handling (PR #89877)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 26 03:37:40 PDT 2024
https://github.com/zxc12523 updated https://github.com/llvm/llvm-project/pull/89877
>From ea74bf2ac356923965211188f86a46075d736bb9 Mon Sep 17 00:00:00 2001
From: zxc12523 <danzxc910624 at gmail.com>
Date: Wed, 24 Apr 2024 13:57:23 +0800
Subject: [PATCH 1/2] feat: add NSW & NUW & ShAmtNonZero
---
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 0ab5142ab81676..2e1d225052c7de 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -3475,16 +3475,23 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
Known.Zero.setBitsFrom(1);
break;
}
- case ISD::SHL:
+ case ISD::SHL: {
Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
- Known = KnownBits::shl(Known, Known2);
+
+ bool NUW = Op.getNode()->Flags.hasNoUnsignedWrap();
+ bool NSW = Op.getNode()->Flags.hasNoSignedWrap();
+
+ bool ShAmtNonZero = Known2.isNonZero();
+
+ Known = KnownBits::shl(Known, Known2, NUW, NSW, ShAmtNonZero);
// Minimum shift low bits are known zero.
if (const APInt *ShMinAmt =
getValidMinimumShiftAmountConstant(Op, DemandedElts))
Known.Zero.setLowBits(ShMinAmt->getZExtValue());
break;
+ }
case ISD::SRL:
Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
>From 1b5d17771995ffda95d3351d791646027f25b9f2 Mon Sep 17 00:00:00 2001
From: zxc12523 <danzxc910624 at gmail.com>
Date: Fri, 26 Apr 2024 18:37:20 +0800
Subject: [PATCH 2/2] add new codegen
---
.../X86/fold-int-pow2-with-fmul-or-fdiv.ll | 111 ++++++------------
1 file changed, 39 insertions(+), 72 deletions(-)
diff --git a/llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll b/llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
index 8f875c70a25f6d..4ee479bbfbbdf4 100644
--- a/llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
+++ b/llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
@@ -840,88 +840,55 @@ define double @fmul_pow_shl_cnt_fail_maybe_non_pow2(i64 %v, i64 %cnt) nounwind {
define <2 x float> @fmul_pow_shl_cnt_vec_fail_expensive_cast(<2 x i64> %cnt) nounwind {
; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec_fail_expensive_cast:
; CHECK-SSE: # %bb.0:
-; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,2,3]
-; CHECK-SSE-NEXT: movdqa {{.*#+}} xmm3 = [2,2]
-; CHECK-SSE-NEXT: movdqa %xmm3, %xmm1
-; CHECK-SSE-NEXT: psllq %xmm2, %xmm1
-; CHECK-SSE-NEXT: psllq %xmm0, %xmm3
-; CHECK-SSE-NEXT: movq %xmm3, %rax
-; CHECK-SSE-NEXT: testq %rax, %rax
-; CHECK-SSE-NEXT: js .LBB12_1
-; CHECK-SSE-NEXT: # %bb.2:
-; CHECK-SSE-NEXT: xorps %xmm0, %xmm0
-; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm0
-; CHECK-SSE-NEXT: jmp .LBB12_3
-; CHECK-SSE-NEXT: .LBB12_1:
-; CHECK-SSE-NEXT: movq %rax, %rcx
-; CHECK-SSE-NEXT: shrq %rcx
-; CHECK-SSE-NEXT: andl $1, %eax
-; CHECK-SSE-NEXT: orq %rcx, %rax
-; CHECK-SSE-NEXT: xorps %xmm0, %xmm0
-; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm0
-; CHECK-SSE-NEXT: addss %xmm0, %xmm0
-; CHECK-SSE-NEXT: .LBB12_3:
-; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
-; CHECK-SSE-NEXT: movq %xmm1, %rax
-; CHECK-SSE-NEXT: testq %rax, %rax
-; CHECK-SSE-NEXT: js .LBB12_4
-; CHECK-SSE-NEXT: # %bb.5:
-; CHECK-SSE-NEXT: xorps %xmm1, %xmm1
-; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm1
-; CHECK-SSE-NEXT: jmp .LBB12_6
-; CHECK-SSE-NEXT: .LBB12_4:
-; CHECK-SSE-NEXT: movq %rax, %rcx
-; CHECK-SSE-NEXT: shrq %rcx
-; CHECK-SSE-NEXT: andl $1, %eax
-; CHECK-SSE-NEXT: orq %rcx, %rax
-; CHECK-SSE-NEXT: xorps %xmm1, %xmm1
-; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm1
-; CHECK-SSE-NEXT: addss %xmm1, %xmm1
-; CHECK-SSE-NEXT: .LBB12_6:
-; CHECK-SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; CHECK-SSE-NEXT: movdqa {{.*#+}} xmm2 = [2,2]
+; CHECK-SSE-NEXT: movdqa %xmm2, %xmm3
+; CHECK-SSE-NEXT: psllq %xmm1, %xmm3
+; CHECK-SSE-NEXT: psllq %xmm0, %xmm2
+; CHECK-SSE-NEXT: movq %xmm2, %rax
+; CHECK-SSE-NEXT: xorps %xmm0, %xmm0
+; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm0
+; CHECK-SSE-NEXT: pshufd $238, %xmm3, %xmm1 # xmm1 = xmm3[2,3,2,3]
+; CHECK-SSE-NEXT: movq %xmm1, %rax
+; CHECK-SSE-NEXT: xorps %xmm1, %xmm1
+; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm1
+; CHECK-SSE-NEXT: unpcklps %xmm1, %xmm0 # xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; CHECK-SSE-NEXT: mulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_vec_fail_expensive_cast:
; CHECK-AVX2: # %bb.0:
-; CHECK-AVX2-NEXT: vpmovsxbq {{.*#+}} xmm1 = [2,2]
-; CHECK-AVX2-NEXT: vpsllvq %xmm0, %xmm1, %xmm0
-; CHECK-AVX2-NEXT: vpsrlq $1, %xmm0, %xmm1
-; CHECK-AVX2-NEXT: vblendvpd %xmm0, %xmm1, %xmm0, %xmm1
-; CHECK-AVX2-NEXT: vpextrq $1, %xmm1, %rax
-; CHECK-AVX2-NEXT: vcvtsi2ss %rax, %xmm2, %xmm2
-; CHECK-AVX2-NEXT: vmovq %xmm1, %rax
-; CHECK-AVX2-NEXT: vcvtsi2ss %rax, %xmm3, %xmm1
-; CHECK-AVX2-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],zero,zero
-; CHECK-AVX2-NEXT: vaddps %xmm1, %xmm1, %xmm2
-; CHECK-AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3
-; CHECK-AVX2-NEXT: vpcmpgtq %xmm0, %xmm3, %xmm0
-; CHECK-AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
-; CHECK-AVX2-NEXT: vblendvps %xmm0, %xmm2, %xmm1, %xmm0
-; CHECK-AVX2-NEXT: vbroadcastss {{.*#+}} xmm1 = [1.5E+1,1.5E+1,1.5E+1,1.5E+1]
-; CHECK-AVX2-NEXT: vmulps %xmm1, %xmm0, %xmm0
-; CHECK-AVX2-NEXT: retq
+; CHECK-AVX2-NEXT: vpmovsxbq {{.*#+}} xmm1 = [2,2]
+; CHECK-AVX2-NEXT: vpsllvq %xmm0, %xmm1, %xmm0
+; CHECK-AVX2-NEXT: vpextrq $1, %xmm0, %rax
+; CHECK-AVX2-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1
+; CHECK-AVX2-NEXT: vmovq %xmm0, %rax
+; CHECK-AVX2-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
+; CHECK-AVX2-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
+; CHECK-AVX2-NEXT: vbroadcastss {{.*#+}} xmm1 = [1.5E+1,1.5E+1,1.5E+1,1.5E+1]
+; CHECK-AVX2-NEXT: vmulps %xmm1, %xmm0, %xmm0
+; CHECK-AVX2-NEXT: retq
;
; CHECK-NO-FASTFMA-LABEL: fmul_pow_shl_cnt_vec_fail_expensive_cast:
; CHECK-NO-FASTFMA: # %bb.0:
-; CHECK-NO-FASTFMA-NEXT: vpmovsxbq {{.*#+}} xmm1 = [2,2]
-; CHECK-NO-FASTFMA-NEXT: vpsllvq %xmm0, %xmm1, %xmm0
-; CHECK-NO-FASTFMA-NEXT: vpextrq $1, %xmm0, %rax
-; CHECK-NO-FASTFMA-NEXT: vcvtusi2ss %rax, %xmm2, %xmm1
-; CHECK-NO-FASTFMA-NEXT: vmovq %xmm0, %rax
-; CHECK-NO-FASTFMA-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0
-; CHECK-NO-FASTFMA-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
-; CHECK-NO-FASTFMA-NEXT: vbroadcastss {{.*#+}} xmm1 = [1.5E+1,1.5E+1,1.5E+1,1.5E+1]
-; CHECK-NO-FASTFMA-NEXT: vmulps %xmm1, %xmm0, %xmm0
-; CHECK-NO-FASTFMA-NEXT: retq
+; CHECK-NO-FASTFMA-NEXT: vpmovsxbq {{.*#+}} xmm1 = [2,2]
+; CHECK-NO-FASTFMA-NEXT: vpsllvq %xmm0, %xmm1, %xmm0
+; CHECK-NO-FASTFMA-NEXT: vpextrq $1, %xmm0, %rax
+; CHECK-NO-FASTFMA-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1
+; CHECK-NO-FASTFMA-NEXT: vmovq %xmm0, %rax
+; CHECK-NO-FASTFMA-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
+; CHECK-NO-FASTFMA-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
+; CHECK-NO-FASTFMA-NEXT: vbroadcastss {{.*#+}} xmm1 = [1.5E+1,1.5E+1,1.5E+1,1.5E+1]
+; CHECK-NO-FASTFMA-NEXT: vmulps %xmm1, %xmm0, %xmm0
+; CHECK-NO-FASTFMA-NEXT: retq
;
; CHECK-FMA-LABEL: fmul_pow_shl_cnt_vec_fail_expensive_cast:
; CHECK-FMA: # %bb.0:
-; CHECK-FMA-NEXT: vpbroadcastq {{.*#+}} xmm1 = [2,2]
-; CHECK-FMA-NEXT: vpsllvq %xmm0, %xmm1, %xmm0
-; CHECK-FMA-NEXT: vcvtuqq2ps %xmm0, %xmm0
-; CHECK-FMA-NEXT: vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
-; CHECK-FMA-NEXT: retq
+; CHECK-FMA-NEXT: vpbroadcastq {{.*#+}} xmm1 = [2,2]
+; CHECK-FMA-NEXT: vpsllvq %xmm0, %xmm1, %xmm0
+; CHECK-FMA-NEXT: vcvtqq2ps %xmm0, %xmm0
+; CHECK-FMA-NEXT: vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
+; CHECK-FMA-NEXT: retq
%shl = shl nsw nuw <2 x i64> <i64 2, i64 2>, %cnt
%conv = uitofp <2 x i64> %shl to <2 x float>
%mul = fmul <2 x float> <float 15.000000e+00, float 15.000000e+00>, %conv
@@ -986,7 +953,7 @@ define <4 x float> @fmul_pow_shl_cnt_vec_preserve_fma(<4 x i32> %cnt, <4 x float
; CHECK-FMA: # %bb.0:
; CHECK-FMA-NEXT: vpbroadcastd {{.*#+}} xmm2 = [2,2,2,2]
; CHECK-FMA-NEXT: vpsllvd %xmm0, %xmm2, %xmm0
-; CHECK-FMA-NEXT: vcvtudq2ps %xmm0, %xmm0
+; CHECK-FMA-NEXT: vcvtdq2ps %xmm0, %xmm0
; CHECK-FMA-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * mem) + xmm1
; CHECK-FMA-NEXT: retq
%shl = shl nsw nuw <4 x i32> <i32 2, i32 2, i32 2, i32 2>, %cnt
More information about the llvm-commits
mailing list