[llvm] [AArch64][SVE2] SVE2 NBSL instruction lowering. (PR #89732)

[Dinar Temirbulatov via llvm-commits]

================
@@ -733,6 +733,8 @@ def AArch64vsli : SDNode<"AArch64ISD::VSLI", SDT_AArch64vshiftinsert>;
 def AArch64vsri : SDNode<"AArch64ISD::VSRI", SDT_AArch64vshiftinsert>;
 
 def AArch64bsp: SDNode<"AArch64ISD::BSP", SDT_AArch64trivec>;
+def AArch64nbsl: PatFrag<(ops node:$Op1, node:$Op2, node:$Op3),
+                        (vnot (AArch64bsp node:$Op1, node:$Op2, node:$Op3))>;
----------------
dtemirbulatov wrote:

Done.

https://github.com/llvm/llvm-project/pull/89732