[llvm] [AMDGPU][RFC] Combine asm and disasm tests. (PR #90179)

[Stanislav Mekhanoshin via llvm-commits]

rampitec wrote:

> I like the general idea. We will always need some separate disassembler tests to check how the disassembler handles byte sequences that the assembler never generates (e.g. invalid encodings).
> 
> Instead of teaching the disassembler to extract hex bytes from `encoding: [...]`, I think I'd prefer creating a new assembler option `-filetype=hex` (subject to bikeshedding) that would produce output in the form that the disassembler expects:
> 
> ```
> $ llvm-mc -filetype=hex file.s
> 0x01,0x02,0x03,0x04
> $ llvm-mc -filetype=hex file.s | llvm-mv -disassemble
> ...
> ```
> 
> One more thing we could check is a form of round tripping. If you assemble an instruction to an encoding, then disassembling+assembling that encoding should round-trip perfectly. I.e. `asm file.s` should produce identical output to `asm file.s | dis | asm`.
> 
> The converse should probably be true, i.e. `dis file.txt` should produce identical output to `dis file.txt | asm | dis`.

In general our dis tests are 99% roundtrip in their intent, except when we test 'do not care bits'. But there is one thing to note: we are using suffixes which instprinter produces. But then we want asm tests to consume instructions without suffixes and properly deduce encoding from the operands. Given that a proper round tripping does not work. In addition we print assumed fields for dpp for example. I.e. string on input will not match string on output. Plus there are instruction and register aliases which are canonicalized on printing. I.e. double tripping should work, but single tripping does not.

https://github.com/llvm/llvm-project/pull/90179