[llvm] 1a343c9 - [X86] LowerVectorCTLZInRegLUT - fix: typo "CLTZ"-> "CTLZ" (#90051)

[via llvm-commits]

Author: zxc12523
Date: 2024-04-26T09:46:21+01:00
New Revision: 1a343c9b0ff0b38d841a54bdbef130dbdc624451

URL: https://github.com/llvm/llvm-project/commit/1a343c9b0ff0b38d841a54bdbef130dbdc624451
DIFF: https://github.com/llvm/llvm-project/commit/1a343c9b0ff0b38d841a54bdbef130dbdc624451.diff

LOG: [X86] LowerVectorCTLZInRegLUT - fix: typo "CLTZ"-> "CTLZ" (#90051)

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index bb43cbe15f5225..f0cec6224e84e4 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -27896,7 +27896,7 @@ static SDValue LowerVectorCTLZInRegLUT(SDValue Op, const SDLoc &DL,
   SDValue InRegLUT = DAG.getBuildVector(CurrVT, DL, LUTVec);
 
   // Begin by bitcasting the input to byte vector, then split those bytes
-  // into lo/hi nibbles and use the PSHUFB LUT to perform CLTZ on each of them.
+  // into lo/hi nibbles and use the PSHUFB LUT to perform CTLZ on each of them.
   // If the hi input nibble is zero then we add both results together, otherwise
   // we just take the hi result (by masking the lo result to zero before the
   // add).