[llvm] f758bb6 - [SLP]Fix PR89988: do extra analysis of the icmp args to correctly handle signed/unsigned comparison.
Alexey Bataev via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 25 16:14:24 PDT 2024
Author: Alexey Bataev
Date: 2024-04-25T16:10:24-07:00
New Revision: f758bb66e8acfe0daa1725ab4d87ae944a4c53d2
URL: https://github.com/llvm/llvm-project/commit/f758bb66e8acfe0daa1725ab4d87ae944a4c53d2
DIFF: https://github.com/llvm/llvm-project/commit/f758bb66e8acfe0daa1725ab4d87ae944a4c53d2.diff
LOG: [SLP]Fix PR89988: do extra analysis of the icmp args to correctly handle signed/unsigned comparison.
If operands of icmp has different signedness, need to consider extending
unsigned operands to correctly handle comparison with the signed
operands.
Added:
Modified:
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
llvm/test/Transforms/SLPVectorizer/RISCV/unsigned-icmp-signed-op.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index a1a28076881cb5..0cd7bd77722260 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -15072,11 +15072,16 @@ void BoUpSLP::computeMinimumValueSizes() {
IsSignedCmp =
NodeIdx < VectorizableTree.size() &&
any_of(VectorizableTree[NodeIdx]->UserTreeIndices,
- [](const EdgeInfo &EI) {
+ [&](const EdgeInfo &EI) {
return EI.UserTE->getOpcode() == Instruction::ICmp &&
- any_of(EI.UserTE->Scalars, [](Value *V) {
+ any_of(EI.UserTE->Scalars, [&](Value *V) {
auto *IC = dyn_cast<ICmpInst>(V);
- return IC && IC->isSigned();
+ return IC &&
+ (IC->isSigned() ||
+ !isKnownNonNegative(IC->getOperand(0),
+ SimplifyQuery(*DL)) ||
+ !isKnownNonNegative(IC->getOperand(1),
+ SimplifyQuery(*DL)));
});
});
}
diff --git a/llvm/test/Transforms/SLPVectorizer/RISCV/unsigned-icmp-signed-op.ll b/llvm/test/Transforms/SLPVectorizer/RISCV/unsigned-icmp-signed-op.ll
index bfeb7805ae9f5c..5ec6b4f1040d81 100644
--- a/llvm/test/Transforms/SLPVectorizer/RISCV/unsigned-icmp-signed-op.ll
+++ b/llvm/test/Transforms/SLPVectorizer/RISCV/unsigned-icmp-signed-op.ll
@@ -8,7 +8,9 @@ define i32 @test(ptr %f, i16 %0) {
; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[F]], align 2
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i16> <i16 0, i16 poison, i16 0, i16 0>, i16 [[TMP0]], i32 1
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i16> <i16 0, i16 poison, i16 0, i16 0>, i16 [[TMP1]], i32 1
-; CHECK-NEXT: [[TMP4:%.*]] = icmp ule <4 x i16> [[TMP3]], [[TMP2]]
+; CHECK-NEXT: [[TMP6:%.*]] = zext <4 x i16> [[TMP3]] to <4 x i32>
+; CHECK-NEXT: [[TMP7:%.*]] = sext <4 x i16> [[TMP2]] to <4 x i32>
+; CHECK-NEXT: [[TMP4:%.*]] = icmp ule <4 x i32> [[TMP6]], [[TMP7]]
; CHECK-NEXT: [[TMP5:%.*]] = call i1 @llvm.vector.reduce.and.v4i1(<4 x i1> [[TMP4]])
; CHECK-NEXT: [[ZEXT_4:%.*]] = zext i1 [[TMP5]] to i32
; CHECK-NEXT: ret i32 [[ZEXT_4]]
More information about the llvm-commits
mailing list