[lld] [llvm] [RISCV] Add an instruction PrettyPrinter to llvm-objdump (PR #90093)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 25 10:29:56 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-mc
Author: Craig Topper (topperc)
<details>
<summary>Changes</summary>
This prints the opcode bytes in the same order as GNU objdump without a space between them.
---
Patch is 507.59 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/90093.diff
64 Files Affected:
- (modified) lld/test/ELF/riscv-branch.s (+8-8)
- (modified) lld/test/ELF/riscv-call.s (+8-8)
- (modified) lld/test/ELF/riscv-hi20-lo12.s (+12-12)
- (modified) lld/test/ELF/riscv-jal.s (+8-8)
- (modified) llvm/test/MC/RISCV/XTHeadVdot-valid.s (+14-14)
- (modified) llvm/test/MC/RISCV/align.s (+4-4)
- (modified) llvm/test/MC/RISCV/compress-cjal.s (+1-1)
- (modified) llvm/test/MC/RISCV/compress-rv32d.s (+4-4)
- (modified) llvm/test/MC/RISCV/compress-rv32f.s (+4-4)
- (modified) llvm/test/MC/RISCV/compress-rv32i.s (+35-35)
- (modified) llvm/test/MC/RISCV/compress-rv64i.s (+8-8)
- (modified) llvm/test/MC/RISCV/nop-slide.s (+11-11)
- (modified) llvm/test/MC/RISCV/option-pushpop.s (+4-4)
- (modified) llvm/test/MC/RISCV/option-rvc.s (+10-10)
- (modified) llvm/test/MC/RISCV/rv32e-invalid.s (+32-32)
- (modified) llvm/test/MC/RISCV/rvv/add.s (+59-59)
- (modified) llvm/test/MC/RISCV/rvv/and.s (+6-6)
- (modified) llvm/test/MC/RISCV/rvv/clip.s (+12-12)
- (modified) llvm/test/MC/RISCV/rvv/compare.s (+83-83)
- (modified) llvm/test/MC/RISCV/rvv/convert.s (+43-43)
- (modified) llvm/test/MC/RISCV/rvv/div.s (+16-16)
- (modified) llvm/test/MC/RISCV/rvv/ext.s (+12-12)
- (modified) llvm/test/MC/RISCV/rvv/fadd.s (+12-12)
- (modified) llvm/test/MC/RISCV/rvv/fcompare.s (+25-25)
- (modified) llvm/test/MC/RISCV/rvv/fdiv.s (+6-6)
- (modified) llvm/test/MC/RISCV/rvv/fmacc.s (+48-48)
- (modified) llvm/test/MC/RISCV/rvv/fminmax.s (+8-8)
- (modified) llvm/test/MC/RISCV/rvv/fmul.s (+8-8)
- (modified) llvm/test/MC/RISCV/rvv/fmv.s (+3-3)
- (modified) llvm/test/MC/RISCV/rvv/fothers.s (+13-13)
- (modified) llvm/test/MC/RISCV/rvv/freduction.s (+13-13)
- (modified) llvm/test/MC/RISCV/rvv/fsub.s (+14-14)
- (modified) llvm/test/MC/RISCV/rvv/load.s (+64-64)
- (modified) llvm/test/MC/RISCV/rvv/macc.s (+30-30)
- (modified) llvm/test/MC/RISCV/rvv/mask.s (+26-26)
- (modified) llvm/test/MC/RISCV/rvv/minmax.s (+16-16)
- (modified) llvm/test/MC/RISCV/rvv/mul.s (+32-32)
- (modified) llvm/test/MC/RISCV/rvv/mv.s (+9-9)
- (modified) llvm/test/MC/RISCV/rvv/or.s (+6-6)
- (modified) llvm/test/MC/RISCV/rvv/others.s (+24-24)
- (modified) llvm/test/MC/RISCV/rvv/reduction.s (+21-21)
- (modified) llvm/test/MC/RISCV/rvv/shift.s (+43-43)
- (modified) llvm/test/MC/RISCV/rvv/sign-injection.s (+12-12)
- (modified) llvm/test/MC/RISCV/rvv/snippet.s (+12-12)
- (modified) llvm/test/MC/RISCV/rvv/store.s (+42-42)
- (modified) llvm/test/MC/RISCV/rvv/sub.s (+50-50)
- (modified) llvm/test/MC/RISCV/rvv/vsetvl.s (+25-25)
- (modified) llvm/test/MC/RISCV/rvv/xor.s (+8-8)
- (modified) llvm/test/MC/RISCV/rvv/xsfvcp.s (+28-28)
- (modified) llvm/test/MC/RISCV/rvv/xsfvfnrclip.s (+4-4)
- (modified) llvm/test/MC/RISCV/rvv/xsfvfwmacc.s (+1-1)
- (modified) llvm/test/MC/RISCV/rvv/xsfvqmacc.s (+8-8)
- (modified) llvm/test/MC/RISCV/rvv/zvbb.s (+7-7)
- (modified) llvm/test/MC/RISCV/rvv/zvbc.s (+4-4)
- (modified) llvm/test/MC/RISCV/rvv/zvfbfmin.s (+4-4)
- (modified) llvm/test/MC/RISCV/rvv/zvfbfwma.s (+8-8)
- (modified) llvm/test/MC/RISCV/rvv/zvkb.s (+9-9)
- (modified) llvm/test/MC/RISCV/rvv/zvkg.s (+2-2)
- (modified) llvm/test/MC/RISCV/rvv/zvkned.s (+13-13)
- (modified) llvm/test/MC/RISCV/rvv/zvknh.s (+3-3)
- (modified) llvm/test/MC/RISCV/rvv/zvksed.s (+4-4)
- (modified) llvm/test/MC/RISCV/rvv/zvksh.s (+3-3)
- (modified) llvm/test/MC/RISCV/rvv/zvlsseg.s (+513-513)
- (modified) llvm/tools/llvm-objdump/llvm-objdump.cpp (+50)
``````````diff
diff --git a/lld/test/ELF/riscv-branch.s b/lld/test/ELF/riscv-branch.s
index dbf39dc0bb8f25..1a2b446b5a43b3 100644
--- a/lld/test/ELF/riscv-branch.s
+++ b/lld/test/ELF/riscv-branch.s
@@ -7,19 +7,19 @@
# RUN: ld.lld %t.rv64.o --defsym foo=_start+4 --defsym bar=_start -o %t.rv64
# RUN: llvm-objdump -d %t.rv32 | FileCheck %s --check-prefix=CHECK-32
# RUN: llvm-objdump -d %t.rv64 | FileCheck %s --check-prefix=CHECK-64
-# CHECK-32: 63 02 00 00 beqz zero, 0x110b8
-# CHECK-32: e3 1e 00 fe bnez zero, 0x110b4
-# CHECK-64: 63 02 00 00 beqz zero, 0x11124
-# CHECK-64: e3 1e 00 fe bnez zero, 0x11120
+# CHECK-32: 00000263 beqz zero, 0x110b8
+# CHECK-32: fe001ee3 bnez zero, 0x110b4
+# CHECK-64: 00000263 beqz zero, 0x11124
+# CHECK-64: fe001ee3 bnez zero, 0x11120
#
# RUN: ld.lld %t.rv32.o --defsym foo=_start+0xffe --defsym bar=_start+4-0x1000 -o %t.rv32.limits
# RUN: ld.lld %t.rv64.o --defsym foo=_start+0xffe --defsym bar=_start+4-0x1000 -o %t.rv64.limits
# RUN: llvm-objdump -d %t.rv32.limits | FileCheck --check-prefix=LIMITS-32 %s
# RUN: llvm-objdump -d %t.rv64.limits | FileCheck --check-prefix=LIMITS-64 %s
-# LIMITS-32: e3 0f 00 7e beqz zero, 0x120b2
-# LIMITS-32-NEXT: 63 10 00 80 bnez zero, 0x100b8
-# LIMITS-64: e3 0f 00 7e beqz zero, 0x1211e
-# LIMITS-64-NEXT: 63 10 00 80 bnez zero, 0x10124
+# LIMITS-32: 7e000fe3 beqz zero, 0x120b2
+# LIMITS-32-NEXT: 80001063 bnez zero, 0x100b8
+# LIMITS-64: 7e000fe3 beqz zero, 0x1211e
+# LIMITS-64-NEXT: 80001063 bnez zero, 0x10124
# RUN: not ld.lld %t.rv32.o --defsym foo=_start+0x1000 --defsym bar=_start+4-0x1002 -o /dev/null 2>&1 | FileCheck --check-prefix=ERROR-RANGE %s
# RUN: not ld.lld %t.rv64.o --defsym foo=_start+0x1000 --defsym bar=_start+4-0x1002 -o /dev/null 2>&1 | FileCheck --check-prefix=ERROR-RANGE %s
diff --git a/lld/test/ELF/riscv-call.s b/lld/test/ELF/riscv-call.s
index 5fef156df0bb77..fbf7cd7083c6ba 100644
--- a/lld/test/ELF/riscv-call.s
+++ b/lld/test/ELF/riscv-call.s
@@ -7,19 +7,19 @@
# RUN: ld.lld %t.rv64.o --defsym foo=_start+8 --defsym bar=_start -o %t.rv64
# RUN: llvm-objdump -d %t.rv32 | FileCheck %s
# RUN: llvm-objdump -d %t.rv64 | FileCheck %s
-# CHECK: 97 00 00 00 auipc ra, 0x0
-# CHECK-NEXT: e7 80 80 00 jalr 0x8(ra)
-# CHECK: 97 00 00 00 auipc ra, 0x0
-# CHECK-NEXT: e7 80 80 ff jalr -0x8(ra)
+# CHECK: 09700000 auipc ra, 0x0
+# CHECK-NEXT: 0e780800 jalr 0x8(ra)
+# CHECK: 09700000 auipc ra, 0x0
+# CHECK-NEXT: fe78080f jalr -0x8(ra)
# RUN: ld.lld %t.rv32.o --defsym foo=_start+0x7ffff7ff --defsym bar=_start+8-0x80000800 -o %t.rv32.limits
# RUN: ld.lld %t.rv64.o --defsym foo=_start+0x7ffff7ff --defsym bar=_start+8-0x80000800 -o %t.rv64.limits
# RUN: llvm-objdump -d %t.rv32.limits | FileCheck --check-prefix=LIMITS %s
# RUN: llvm-objdump -d %t.rv64.limits | FileCheck --check-prefix=LIMITS %s
-# LIMITS: 97 f0 ff 7f auipc ra, 0x7ffff
-# LIMITS-NEXT: e7 80 f0 7f jalr 0x7ff(ra)
-# LIMITS-NEXT: 97 00 00 80 auipc ra, 0x80000
-# LIMITS-NEXT: e7 80 00 80 jalr -0x800(ra)
+# LIMITS: 79fff07f auipc ra, 0x7ffff
+# LIMITS-NEXT: 7ef0807f jalr 0x7ff(ra)
+# LIMITS-NEXT: 89000070 auipc ra, 0x80000
+# LIMITS-NEXT: 8e008070 jalr -0x800(ra)
# RUN: ld.lld %t.rv32.o --defsym foo=_start+0x7ffff800 --defsym bar=_start+8-0x80000801 -o %t
# RUN: not ld.lld %t.rv64.o --defsym foo=_start+0x7ffff800 --defsym bar=_start+8-0x80000801 -o /dev/null 2>&1 | \
diff --git a/lld/test/ELF/riscv-hi20-lo12.s b/lld/test/ELF/riscv-hi20-lo12.s
index 85861432db0bdf..66a9d4af82e9e8 100644
--- a/lld/test/ELF/riscv-hi20-lo12.s
+++ b/lld/test/ELF/riscv-hi20-lo12.s
@@ -7,23 +7,23 @@
# RUN: ld.lld %t.rv64.o --defsym foo=0 --defsym bar=42 -o %t.rv64
# RUN: llvm-objdump -d %t.rv32 | FileCheck %s
# RUN: llvm-objdump -d %t.rv64 | FileCheck %s
-# CHECK: 37 05 00 00 lui a0, 0x0
-# CHECK-NEXT: 13 05 05 00 mv a0, a0
-# CHECK-NEXT: 23 20 a5 00 sw a0, 0x0(a0)
-# CHECK-NEXT: b7 05 00 00 lui a1, 0x0
-# CHECK-NEXT: 93 85 a5 02 addi a1, a1, 0x2a
-# CHECK-NEXT: 23 a5 b5 02 sw a1, 0x2a(a1)
+# CHECK: 03705000 lui a0, 0x0
+# CHECK-NEXT: 01305050 mv a0, a0
+# CHECK-NEXT: 02320a50 sw a0, 0x0(a0)
+# CHECK-NEXT: 0b705000 lui a1, 0x0
+# CHECK-NEXT: 09385a52 addi a1, a1, 0x2a
+# CHECK-NEXT: 023a5b52 sw a1, 0x2a(a1)
# RUN: ld.lld %t.rv32.o --defsym foo=0x7ffff7ff --defsym bar=0x7ffff800 -o %t.rv32.limits
# RUN: ld.lld %t.rv64.o --defsym foo=0x7ffff7ff --defsym bar=0xffffffff7ffff800 -o %t.rv64.limits
# RUN: llvm-objdump -d %t.rv32.limits | FileCheck --check-prefix=LIMITS %s
# RUN: llvm-objdump -d %t.rv64.limits | FileCheck --check-prefix=LIMITS %s
-# LIMITS: 37 f5 ff 7f lui a0, 0x7ffff
-# LIMITS-NEXT: 13 05 f5 7f addi a0, a0, 0x7ff
-# LIMITS-NEXT: a3 2f a5 7e sw a0, 0x7ff(a0)
-# LIMITS-NEXT: b7 05 00 80 lui a1, 0x80000
-# LIMITS-NEXT: 93 85 05 80 addi a1, a1, -0x800
-# LIMITS-NEXT: 23 a0 b5 80 sw a1, -0x800(a1)
+# LIMITS: 73fff57f lui a0, 0x7ffff
+# LIMITS-NEXT: 71f5053f addi a0, a0, 0x7ff
+# LIMITS-NEXT: 7aa52f3e sw a0, 0x7ff(a0)
+# LIMITS-NEXT: 8b000570 lui a1, 0x80000
+# LIMITS-NEXT: 89058530 addi a1, a1, -0x800
+# LIMITS-NEXT: 82b5a030 sw a1, -0x800(a1)
# RUN: not ld.lld %t.rv64.o --defsym foo=0x7ffff800 --defsym bar=0xffffffff7ffff7ff -o /dev/null 2>&1 | FileCheck --check-prefix ERROR %s
# ERROR: relocation R_RISCV_HI20 out of range: 524288 is not in [-524288, 524287]; references 'foo'
diff --git a/lld/test/ELF/riscv-jal.s b/lld/test/ELF/riscv-jal.s
index cd3b842aad6089..ee35667815482a 100644
--- a/lld/test/ELF/riscv-jal.s
+++ b/lld/test/ELF/riscv-jal.s
@@ -7,19 +7,19 @@
# RUN: ld.lld %t.rv64.o --defsym foo=_start+4 --defsym bar=_start -o %t.rv64
# RUN: llvm-objdump -d %t.rv32 | FileCheck %s --check-prefix=CHECK-32
# RUN: llvm-objdump -d %t.rv64 | FileCheck %s --check-prefix=CHECK-64
-# CHECK-32: 6f 00 40 00 j 0x110b8
-# CHECK-32: ef f0 df ff jal 0x110b4
-# CHECK-64: 6f 00 40 00 j 0x11124
-# CHECK-64: ef f0 df ff jal 0x11120
+# CHECK-32: 064000f0 j 0x110b8
+# CHECK-32: fedff0ff jal 0x110b4
+# CHECK-64: 064000f0 j 0x11124
+# CHECK-64: fedff0ff jal 0x11120
# RUN: ld.lld %t.rv32.o --defsym foo=_start+0xffffe --defsym bar=_start+4-0x100000 -o %t.rv32.limits
# RUN: ld.lld %t.rv64.o --defsym foo=_start+0xffffe --defsym bar=_start+4-0x100000 -o %t.rv64.limits
# RUN: llvm-objdump -d %t.rv32.limits | FileCheck --check-prefix=LIMITS-32 %s
# RUN: llvm-objdump -d %t.rv64.limits | FileCheck --check-prefix=LIMITS-64 %s
-# LIMITS-32: 6f f0 ff 7f j 0x1110b2
-# LIMITS-32-NEXT: ef 00 00 80 jal 0xfff110b8
-# LIMITS-64: 6f f0 ff 7f j 0x11111e
-# LIMITS-64-NEXT: ef 00 00 80 jal 0xfffffffffff11124
+# LIMITS-32: 76fff0ff j 0x1110b2
+# LIMITS-32-NEXT: 8e0000f0 jal 0xfff110b8
+# LIMITS-64: 76fff0ff j 0x11111e
+# LIMITS-64-NEXT: 8e0000f0 jal 0xfffffffffff11124
# RUN: not ld.lld %t.rv32.o --defsym foo=_start+0x100000 --defsym bar=_start+4-0x100002 -o /dev/null 2>&1 | FileCheck --check-prefix=ERROR-RANGE %s
# RUN: not ld.lld %t.rv64.o --defsym foo=_start+0x100000 --defsym bar=_start+4-0x100002 -o /dev/null 2>&1 | FileCheck --check-prefix=ERROR-RANGE %s
diff --git a/llvm/test/MC/RISCV/XTHeadVdot-valid.s b/llvm/test/MC/RISCV/XTHeadVdot-valid.s
index 2e00bd1cac3eeb..ab411dfac7308a 100644
--- a/llvm/test/MC/RISCV/XTHeadVdot-valid.s
+++ b/llvm/test/MC/RISCV/XTHeadVdot-valid.s
@@ -12,82 +12,82 @@ th.vmaqau.vv v8, v20, v4, v0.t
# CHECK-INST: th.vmaqau.vv v8, v20, v4, v0.t
# CHECK-ENCODING: [0x0b,0x64,0x4a,0x88]
# CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}}
-# CHECK-UNKNOWN: 0b 64 4a 88 <unknown>
+# CHECK-UNKNOWN: 884a640b <unknown>
th.vmaqau.vv v8, v20, v4
# CHECK-INST: th.vmaqau.vv v8, v20, v4
# CHECK-ENCODING: [0x0b,0x64,0x4a,0x8a]
# CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}}
-# CHECK-UNKNOWN: 0b 64 4a 8a <unknown>
+# CHECK-UNKNOWN: 8a4a640b <unknown>
th.vmaqau.vx v8, a0, v4, v0.t
# CHECK-INST: th.vmaqau.vx v8, a0, v4, v0.t
# CHECK-ENCODING: [0x0b,0x64,0x45,0x8c]
# CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}}
-# CHECK-UNKNOWN: 0b 64 45 8c <unknown>
+# CHECK-UNKNOWN: 8c45640b <unknown>
th.vmaqau.vx v8, a0, v4
# CHECK-INST: th.vmaqau.vx v8, a0, v4
# CHECK-ENCODING: [0x0b,0x64,0x45,0x8e]
# CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}}
-# CHECK-UNKNOWN: 0b 64 45 8e <unknown>
+# CHECK-UNKNOWN: 8e45640b <unknown>
th.vmaqa.vv v8, v20, v4, v0.t
# CHECK-INST: th.vmaqa.vv v8, v20, v4, v0.t
# CHECK-ENCODING: [0x0b,0x64,0x4a,0x80]
# CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}}
-# CHECK-UNKNOWN: 0b 64 4a 80 <unknown>
+# CHECK-UNKNOWN: 804a640b <unknown>
th.vmaqa.vv v8, v20, v4
# CHECK-INST: th.vmaqa.vv v8, v20, v4
# CHECK-ENCODING: [0x0b,0x64,0x4a,0x82]
# CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}}
-# CHECK-UNKNOWN: 0b 64 4a 82 <unknown>
+# CHECK-UNKNOWN: 824a640b <unknown>
th.vmaqa.vx v8, a0, v4, v0.t
# CHECK-INST: th.vmaqa.vx v8, a0, v4, v0.t
# CHECK-ENCODING: [0x0b,0x64,0x45,0x84]
# CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}}
-# CHECK-UNKNOWN: 0b 64 45 84 <unknown>
+# CHECK-UNKNOWN: 8445640b <unknown>
th.vmaqa.vx v8, a0, v4
# CHECK-INST: th.vmaqa.vx v8, a0, v4
# CHECK-ENCODING: [0x0b,0x64,0x45,0x86]
# CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}}
-# CHECK-UNKNOWN: 0b 64 45 86 <unknown>
+# CHECK-UNKNOWN: 8645640b <unknown>
th.vmaqasu.vv v8, v20, v4, v0.t
# CHECK-INST: th.vmaqasu.vv v8, v20, v4, v0.t
# CHECK-ENCODING: [0x0b,0x64,0x4a,0x90]
# CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}}
-# CHECK-UNKNOWN: 0b 64 4a 90 <unknown>
+# CHECK-UNKNOWN: 904a640b <unknown>
th.vmaqasu.vv v8, v20, v4
# CHECK-INST: th.vmaqasu.vv v8, v20, v4
# CHECK-ENCODING: [0x0b,0x64,0x4a,0x92]
# CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}}
-# CHECK-UNKNOWN: 0b 64 4a 92 <unknown>
+# CHECK-UNKNOWN: 924a640b <unknown>
th.vmaqasu.vx v8, a0, v4, v0.t
# CHECK-INST: th.vmaqasu.vx v8, a0, v4, v0.t
# CHECK-ENCODING: [0x0b,0x64,0x45,0x94]
# CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}}
-# CHECK-UNKNOWN: 0b 64 45 94 <unknown>
+# CHECK-UNKNOWN: 9445640b <unknown>
th.vmaqasu.vx v8, a0, v4
# CHECK-INST: th.vmaqasu.vx v8, a0, v4
# CHECK-ENCODING: [0x0b,0x64,0x45,0x96]
# CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}}
-# CHECK-UNKNOWN: 0b 64 45 96 <unknown>
+# CHECK-UNKNOWN: 9645640b <unknown>
th.vmaqaus.vx v8, a0, v4, v0.t
# CHECK-INST: th.vmaqaus.vx v8, a0, v4, v0.t
# CHECK-ENCODING: [0x0b,0x64,0x45,0x9c]
# CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}}
-# CHECK-UNKNOWN: 0b 64 45 9c <unknown>
+# CHECK-UNKNOWN: 9c45640b <unknown>
th.vmaqaus.vx v8, a0, v4
# CHECK-INST: th.vmaqaus.vx v8, a0, v4
# CHECK-ENCODING: [0x0b,0x64,0x45,0x9e]
# CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}}
-# CHECK-UNKNOWN: 0b 64 45 9e <unknown>
+# CHECK-UNKNOWN: 9e45640b <unknown>
diff --git a/llvm/test/MC/RISCV/align.s b/llvm/test/MC/RISCV/align.s
index 2eb7186d0de959..32cc071b613cb3 100644
--- a/llvm/test/MC/RISCV/align.s
+++ b/llvm/test/MC/RISCV/align.s
@@ -98,11 +98,11 @@ test:
# The behavior is the same as GNU assembler.
.p2align 4, 1
# RELAX-RELOC-NOT: R_RISCV_ALIGN - 0xC
-# RELAX-INST: 01 01
-# RELAX-INST: 01 01
+# RELAX-INST: 0101
+# RELAX-INST: 0101
# C-OR-ZCA-EXT-RELAX-RELOC-NOT: R_RISCV_ALIGN - 0xE
-# C-OR-ZCA-EXT-RELAX-INST: 01 01
-# C-EXT-INST: 01 01
+# C-OR-ZCA-EXT-RELAX-INST: 0101
+# C-EXT-INST: 0101
ret
# NORELAX-RELOC-NOT: R_RISCV
# C-OR-ZCA-EXT-NORELAX-RELOC-NOT: R_RISCV
diff --git a/llvm/test/MC/RISCV/compress-cjal.s b/llvm/test/MC/RISCV/compress-cjal.s
index 31b9c30c2b016c..d55586b005c7b4 100644
--- a/llvm/test/MC/RISCV/compress-cjal.s
+++ b/llvm/test/MC/RISCV/compress-cjal.s
@@ -11,7 +11,7 @@
# c.jal is an rv32 only instruction.
jal ra, 2046
-# CHECK-BYTES: fd 2f
+# CHECK-BYTES: 2ffd
# CHECK-ALIASOBJ: jal 0x7fe
# CHECK-ALIAS: jal 2046
# CHECK-INST: c.jal 2046
diff --git a/llvm/test/MC/RISCV/compress-rv32d.s b/llvm/test/MC/RISCV/compress-rv32d.s
index bebc78ef86907c..c41a0889286249 100644
--- a/llvm/test/MC/RISCV/compress-rv32d.s
+++ b/llvm/test/MC/RISCV/compress-rv32d.s
@@ -43,22 +43,22 @@
# Tests double precision floating point instructions available in rv32 and in rv64.
fld ft0, 64(sp)
-# CHECK-BYTES: 06 20
+# CHECK-BYTES: 2006
# CHECK-ALIAS: fld ft0, 64(sp)
# CHECK-INST: c.fldsp ft0, 64(sp)
# CHECK: # encoding: [0x06,0x20]
fsd ft0, 64(sp)
-# CHECK-BYTES: 82 a0
+# CHECK-BYTES: a082
# CHECK-ALIAS: fsd ft0, 64(sp)
# CHECK-INST: c.fsdsp ft0, 64(sp)
# CHECK: # encoding: [0x82,0xa0]
fld fs0, 248(s0)
-# CHECK-BYTES: 60 3c
+# CHECK-BYTES: 3c60
# CHECK-ALIAS: fld fs0, 248(s0)
# CHECK-INST: c.fld fs0, 248(s0)
# CHECK: # encoding: [0x60,0x3c]
fsd fs0, 248(s0)
-# CHECK-BYTES: 60 bc
+# CHECK-BYTES: bc60
# CHECK-ALIAS: fsd fs0, 248(s0)
# CHECK-INST: c.fsd fs0, 248(s0)
# CHECK: # encoding: [0x60,0xbc]
diff --git a/llvm/test/MC/RISCV/compress-rv32f.s b/llvm/test/MC/RISCV/compress-rv32f.s
index 3f0c69fb989323..afe15c598bb65e 100644
--- a/llvm/test/MC/RISCV/compress-rv32f.s
+++ b/llvm/test/MC/RISCV/compress-rv32f.s
@@ -21,22 +21,22 @@
# Instructions that are 32 bit only.
flw ft0, 124(sp)
-# CHECK-BYTES: 76 70
+# CHECK-BYTES: 7076
# CHECK-ALIAS: flw ft0, 124(sp)
# CHECK-INST: c.flwsp ft0, 124(sp)
# CHECK: # encoding: [0x76,0x70]
fsw ft0, 124(sp)
-# CHECK-BYTES: 82 fe
+# CHECK-BYTES: fe82
# CHECK-ALIAS: fsw ft0, 124(sp)
# CHECK-INST: c.fswsp ft0, 124(sp)
# CHECK: # encoding: [0x82,0xfe]
flw fs0, 124(s0)
-# CHECK-BYTES: 60 7c
+# CHECK-BYTES: 7c60
# CHECK-ALIAS: flw fs0, 124(s0)
# CHECK-INST: c.flw fs0, 124(s0)
# CHECK: # encoding: [0x60,0x7c]
fsw fs0, 124(s0)
-# CHECK-BYTES: 60 fc
+# CHECK-BYTES: fc60
# CHECK-ALIAS: fsw fs0, 124(s0)
# CHECK-INST: c.fsw fs0, 124(s0)
# CHECK: # encoding: [0x60,0xfc]
diff --git a/llvm/test/MC/RISCV/compress-rv32i.s b/llvm/test/MC/RISCV/compress-rv32i.s
index b4fd72a0f81c4d..a75bea32ac0cf1 100644
--- a/llvm/test/MC/RISCV/compress-rv32i.s
+++ b/llvm/test/MC/RISCV/compress-rv32i.s
@@ -20,121 +20,121 @@
# RUN: | llvm-objdump --triple=riscv64 --mattr=+c --no-print-imm-hex -d -M no-aliases - \
# RUN: | FileCheck -check-prefixes=CHECK-BYTES,CHECK-INST,CHECK-INSTOBJ64 %s
-# CHECK-BYTES: 2e 85
+# CHECK-BYTES: 852e
# CHECK-ALIAS: mv a0, a1
# CHECK-INST: c.mv a0, a1
# CHECK: # encoding: [0x2e,0x85]
addi a0, a1, 0
-# CHECK-BYTES: e0 1f
+# CHECK-BYTES: 1fe0
# CHECK-ALIAS: addi s0, sp, 1020
# CHECK-INST: c.addi4spn s0, sp, 1020
# CHECK: # encoding: [0xe0,0x1f]
addi s0, sp, 1020
-# CHECK-BYTES: e0 5f
+# CHECK-BYTES: 5fe0
# CHECK-ALIAS: lw s0, 124(a5)
# CHECK-INST: c.lw s0, 124(a5)
# CHECK: # encoding: [0xe0,0x5f]
lw s0, 124(a5)
-# CHECK-BYTES: e0 df
+# CHECK-BYTES: dfe0
# CHECK-ALIAS: sw s0, 124(a5)
# CHECK-INST: c.sw s0, 124(a5)
# CHECK: # encoding: [0xe0,0xdf]
sw s0, 124(a5)
-# CHECK-BYTES: 01 00
+# CHECK-BYTES: 0001
# CHECK-ALIAS: nop
# CHECK-INST: c.nop
# CHECK: # encoding: [0x01,0x00]
nop
-# CHECK-BYTES: 81 10
+# CHECK-BYTES: 1081
# CHECK-ALIAS: addi ra, ra, -32
# CHECK-INST: c.addi ra, -32
# CHECK: # encoding: [0x81,0x10]
addi ra, ra, -32
-# CHECK-BYTES: 85 50
+# CHECK-BYTES: 5085
# CHECK-ALIAS: li ra, -31
# CHECK-INST: c.li ra, -31
# CHECK: # encoding: [0x85,0x50]
li ra, -31
-# CHECK-BYTES: 39 71
+# CHECK-BYTES: 7139
# CHECK-ALIAS: addi sp, sp, -64
# CHECK-INST: c.addi16sp sp, -64
# CHECK: # encoding: [0x39,0x71]
addi sp, sp, -64
-# CHECK-BYTES: fd 61
+# CHECK-BYTES: 61fd
# CHECK-ALIAS: lui gp, 31
# CHECK-INST: c.lui gp, 31
# CHECK: # encoding: [0xfd,0x61]
lui gp, 31
-# CHECK-BYTES: 7d 80
+# CHECK-BYTES: 807d
# CHECK-ALIAS: srli s0, s0, 31
# CHECK-INST: c.srli s0, 31
# CHECK: # encoding: [0x7d,0x80]
srli s0, s0, 31
-# CHECK-BYTES: 7d 84
+# CHECK-BYTES: 847d
# CHECK-ALIAS: srai s0, s0, 31
# CHECK-INST: c.srai s0, 31
# CHECK: # encoding: [0x7d,0x84]
srai s0, s0, 31
-# CHECK-BYTES: 7d 88
+# CHECK-BYTES: 887d
# CHECK-ALIAS: andi s0, s0, 31
# CHECK-INST: c.andi s0, 31
# CHECK: # encoding: [0x7d,0x88]
andi s0, s0, 31
-# CHECK-BYTES: 1d 8c
+# CHECK-BYTES: 8c1d
# CHECK-ALIAS: sub s0, s0, a5
# CHECK-INST: c.sub s0, a5
# CHECK: # encoding: [0x1d,0x8c]
sub s0, s0, a5
-# CHECK-BYTES: 3d 8c
+# CHECK-BYTES: 8c3d
# CHECK-ALIAS: xor s0, s0, a5
# CHECK-INST: c.xor s0, a5
# CHECK: # encoding: [0x3d,0x8c]
xor s0, s0, a5
-# CHECK-BYTES: 3d 8c
+# CHECK-BYTES: 8c3d
# CHECK-ALIAS: xor s0, s0, a5
# CHECK-INST: c.xor s0, a5
# CHECK: # encoding: [0x3d,0x8c]
xor s0, a5, s0
-# CHECK-BYTES: 5d 8c
+# CHECK-BYTES: 8c5d
# CHECK-ALIAS: or s0, s0, a5
# CHECK-INST: c.or s0, a5
# CHECK: # encoding: [0x5d,0x8c]
or s0, s0, a5
-# CHECK-BYTES: 45 8c
+# CHECK-BYTES: 8c45
# CHECK-ALIAS: or s0, s0, s1
# CHECK-INST: c.or s0, s1
# CHECK: # encoding: [0x45,0x8c]
or s0, s1, s0
-# CHECK-BYTES: 7d 8c
+# CHECK-BYTES: 8c7d
# CHECK-ALIAS: and s0, s0, a5
# CHECK-INST: c.and s0, a5
# CHECK: # encoding: [0x7d,0x8c]
and s0, s0, a5
-# CHECK-BYTES: 7d 8c
+# CHECK-BYTES: 8c7d
# CHECK-ALIAS: and s0, s0, a5
# CHECK-INST: c.and s0, a5
# CHECK: # encoding: [0x7d,0x8c]
and s0, a5, s0
-# CHECK-BYTES: 01 b0
+# CHECK-BYTES: b001
# CHECK-ALIASASM: j -2048
# CHECK-ALIASOBJ32: j 0xfffff826
# CHECK-ALIASOBJ64: j 0xfffffffffffff826
@@ -144,7 +144,7 @@ and s0, a5, s0
# CHECK: # encoding: [0x01,0xb0]
jal zero, -2048
-# CHECK-BYTES: 01 d0
+# CHECK-BYTES: d001
# CHECK-ALIASASM: beqz s0, -256
# CHECK-ALIASOBJ32: beqz s0, 0xffffff28
# CHECK-ALIASOBJ64: beqz s0, 0xffffffffffffff28
@@ -154,7 +154,7 @@ jal zero, -2048
# CHECK: # encoding: [0x01,0xd0]
beq s0, zero, -256
-# CHECK-BYTES: 01 d0
+# CHECK-BYTES: d001
# CHECK-ALIASASM: beqz s0, -256
# CHECK-ALIASOBJ32: beqz s0, 0xffffff2a
# CHECK-ALIASOBJ64: beqz s0, 0xffffffffffffff2a
@@ -164,7 +164,7 @@ beq s0, zero, -256
# CHECK: # encoding: [0x01,0xd0]
beq zero, s0, -256
-# CHECK-BYTES: 7d ec
+# CHECK-BYTES: ec7d
# CHECK-ALIASASM: bnez s0, 254
# CHECK-ALIASOBJ32: bnez s0, 0x12a
# CHECK-ALIASOBJ64: bnez s0, 0x12a
@@ -174,7 +174,7 @@ beq zero, s0, -256
# CHECK: # encoding: [0x7d,0xec]
bne s0, zero, 254
-# CHECK-BYTES: 7d ec
+# CHECK-BYTES: ec7d
# CHECK-ALIASASM: bnez s0, 254
# CHECK-ALIASOBJ32: bnez s0, 0x12c
# CHECK-ALIASOBJ64: bnez s0, 0x12c
@@ -184,67 +184,67 @@ bne s0, zero, 254
# CHECK: # encoding: [0x7d,0xec]
bne zero, s0, 254
-# CHECK-BYTES: 7e 04
+# CHECK-BYTES: 047e
# CHECK-ALIAS: slli s0, s0, 31
# CHECK-INST: c.slli s0, 31
# CHECK: # encoding: [0x7e,0x04]
slli s0, s0, 31
-# CHECK-BYTES: fe 50
+# CHECK-BYTES: 50fe
# CHECK-ALIAS: lw ra, 252(sp)
# CHECK-INST: c.lwsp ra, 252(sp)
# CHECK: # encoding: [0xfe,0x50]
lw ra, 252(sp)
-# CHECK-BYTES: 82 80
+# CHECK-BYTES: 8082
# CHECK-ALIAS: ret
# CHECK-INST: c.jr ra
# CHECK: # encoding: [0x82,0x80]
jalr zero, 0(ra)
-# CHECK-BYTES: 92 80
+# CHECK-BYTES: 8092
# CHECK-ALIAS: mv ra, tp
# CHECK-INST: c.mv ra, tp
# CHECK: # encoding: [0x92,0x80]
add ra, zero, tp
-# CHECK-BYTES: 92 80
+# CHECK-BYTES: 8092
# CHECK-ALIAS: mv ra, tp
# CHECK-INST: c.mv ra, tp
# CHECK: # encoding: [0x92,0x80]
add ra, tp, zero
-# CHECK-BYTES: 02 90
+# CHECK-BYTES: 9002
# CHECK-ALIAS: ebreak
# CHECK-INST: c.ebreak
# CHECK: # encoding: [0x02,0x90]
ebreak
-# CHECK-BYTES: 02 94
+# CHECK-BYTES: 9402
# CHECK-ALIAS: jalr s0
# CHECK-INST: c.jalr s0
# CHECK: # encoding: [0x02,0x94]
jalr ra, 0(s0)
-...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/90093
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