[llvm] [AArch64][SVE2] SVE2 NBSL instruction lowering. (PR #89732)

[Dinar Temirbulatov via llvm-commits]

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@@ -41,3 +41,18 @@ define <vscale x 4 x i32> @no_bsl_fold(<vscale x 4 x i32> %a, <vscale x 4 x i32>
   %c = or <vscale x 4 x i32> %1, %2
   ret <vscale x 4 x i32> %c
 }
+
+define <vscale x 4 x i32> @nbsl(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
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dtemirbulatov wrote:

Done.

https://github.com/llvm/llvm-project/pull/89732