[llvm] [AArch64] Combine getActiveLaneMask with vector_extract (PR #81139)

[Paul Walker via llvm-commits]

================
@@ -20481,6 +20481,61 @@ static SDValue convertMergedOpToPredOp(SDNode *N, unsigned Opc,
   return SDValue();
 }
 
+static SDValue tryCombineWhileLo(SDNode *N,
+                                 TargetLowering::DAGCombinerInfo &DCI,
+                                 const AArch64Subtarget *Subtarget) {
+  if (DCI.isBeforeLegalize())
+    return SDValue();
+
+  if (!Subtarget->hasSVE2p1())
+    return SDValue();
+
+  if (!N->hasNUsesOfValue(2, 0))
+    return SDValue();
+
+  const uint64_t HalfSize = N->getValueType(0).getVectorMinNumElements() / 2;
+  if (HalfSize < 2)
+    return SDValue();
+
+  auto It = N->use_begin();
+  SDNode *Lo = *It++;
+  SDNode *Hi = *It;
+
+  if (Lo->getOpcode() != ISD::EXTRACT_SUBVECTOR ||
+      Hi->getOpcode() != ISD::EXTRACT_SUBVECTOR)
+    return SDValue();
+
+  uint64_t OffLo = Lo->getConstantOperandVal(1);
+  uint64_t OffHi = Hi->getConstantOperandVal(1);
----------------
paulwalker-arm wrote:

The return type of `ISD::EXTRACT_SUBVECTOR` is also important.  Consider:
```
A = whilelo_nvx16i1(X,Y)
B = extract_subvector_nxv4i1(A, 0)
C = extract_subvector_nxv4i1(A, 8)
```
If you agree, then we'll need some extra test coverage as well.

https://github.com/llvm/llvm-project/pull/81139