[llvm] [RISCV] Generate RISCVISAInfo table from RISCVFeatures.td. (PR #89955)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 24 21:48:31 PDT 2024
https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/89955
>From 5c5a56ea569dd63fea9eeeb705239b840ded1436 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Tue, 23 Apr 2024 15:56:33 -0700
Subject: [PATCH 1/3] [RISCV] Generate RISCVISAInfo table from
RISCVFeatures.td.
This generates the SupportedExtensions and ImpliedExts information
from the RISCVExtension records found in RISCVFeatures.td.
Some implied extension strings aren't quite in the same order, in
the individual implication tables. But the list of strings was
checked to be the same.
I've added the new information to the existing RISCVTargetParserDef.inc
and RISCVTargetDefEmitter.cpp so we don't need to re-parse the entirety
of RISCV.td a second time for a new file.
---
llvm/lib/TargetParser/RISCVISAInfo.cpp | 323 +-----------------
llvm/utils/TableGen/RISCVTargetDefEmitter.cpp | 103 +++++-
2 files changed, 106 insertions(+), 320 deletions(-)
diff --git a/llvm/lib/TargetParser/RISCVISAInfo.cpp b/llvm/lib/TargetParser/RISCVISAInfo.cpp
index 39cb3f2c2fe178..5db94c5322796a 100644
--- a/llvm/lib/TargetParser/RISCVISAInfo.cpp
+++ b/llvm/lib/TargetParser/RISCVISAInfo.cpp
@@ -47,204 +47,8 @@ static const char *RISCVGImplications[] = {
"i", "m", "a", "f", "d", "zicsr", "zifencei"
};
-// NOTE: This table should be sorted alphabetically by extension name.
-static const RISCVSupportedExtension SupportedExtensions[] = {
- {"a", {2, 1}},
- {"c", {2, 0}},
- {"d", {2, 2}},
- {"e", {2, 0}},
- {"f", {2, 2}},
- {"h", {1, 0}},
- {"i", {2, 1}},
- {"m", {2, 0}},
-
- {"shcounterenw", {1, 0}},
- {"shgatpa", {1, 0}},
- {"shtvala", {1, 0}},
- {"shvsatpa", {1, 0}},
- {"shvstvala", {1, 0}},
- {"shvstvecd", {1, 0}},
- {"smaia", {1, 0}},
- {"smepmp", {1, 0}},
- {"ssaia", {1, 0}},
- {"ssccptr", {1, 0}},
- {"sscofpmf", {1, 0}},
- {"sscounterenw", {1, 0}},
- {"ssstateen", {1, 0}},
- {"ssstrict", {1, 0}},
- {"sstc", {1, 0}},
- {"sstvala", {1, 0}},
- {"sstvecd", {1, 0}},
- {"ssu64xl", {1, 0}},
- {"svade", {1, 0}},
- {"svadu", {1, 0}},
- {"svbare", {1, 0}},
- {"svinval", {1, 0}},
- {"svnapot", {1, 0}},
- {"svpbmt", {1, 0}},
-
- {"v", {1, 0}},
-
- // vendor-defined ('X') extensions
- {"xcvalu", {1, 0}},
- {"xcvbi", {1, 0}},
- {"xcvbitmanip", {1, 0}},
- {"xcvelw", {1, 0}},
- {"xcvmac", {1, 0}},
- {"xcvmem", {1, 0}},
- {"xcvsimd", {1, 0}},
- {"xsfcease", {1, 0}},
- {"xsfvcp", {1, 0}},
- {"xsfvfnrclipxfqf", {1, 0}},
- {"xsfvfwmaccqqq", {1, 0}},
- {"xsfvqmaccdod", {1, 0}},
- {"xsfvqmaccqoq", {1, 0}},
- {"xsifivecdiscarddlone", {1, 0}},
- {"xsifivecflushdlone", {1, 0}},
- {"xtheadba", {1, 0}},
- {"xtheadbb", {1, 0}},
- {"xtheadbs", {1, 0}},
- {"xtheadcmo", {1, 0}},
- {"xtheadcondmov", {1, 0}},
- {"xtheadfmemidx", {1, 0}},
- {"xtheadmac", {1, 0}},
- {"xtheadmemidx", {1, 0}},
- {"xtheadmempair", {1, 0}},
- {"xtheadsync", {1, 0}},
- {"xtheadvdot", {1, 0}},
- {"xventanacondops", {1, 0}},
-
- {"za128rs", {1, 0}},
- {"za64rs", {1, 0}},
- {"zacas", {1, 0}},
- {"zama16b", {1, 0}},
- {"zawrs", {1, 0}},
-
- {"zba", {1, 0}},
- {"zbb", {1, 0}},
- {"zbc", {1, 0}},
- {"zbkb", {1, 0}},
- {"zbkc", {1, 0}},
- {"zbkx", {1, 0}},
- {"zbs", {1, 0}},
-
- {"zca", {1, 0}},
- {"zcb", {1, 0}},
- {"zcd", {1, 0}},
- {"zce", {1, 0}},
- {"zcf", {1, 0}},
- {"zcmop", {1, 0}},
- {"zcmp", {1, 0}},
- {"zcmt", {1, 0}},
-
- {"zdinx", {1, 0}},
-
- {"zfa", {1, 0}},
- {"zfh", {1, 0}},
- {"zfhmin", {1, 0}},
- {"zfinx", {1, 0}},
-
- {"zhinx", {1, 0}},
- {"zhinxmin", {1, 0}},
-
- {"zic64b", {1, 0}},
- {"zicbom", {1, 0}},
- {"zicbop", {1, 0}},
- {"zicboz", {1, 0}},
- {"ziccamoa", {1, 0}},
- {"ziccif", {1, 0}},
- {"zicclsm", {1, 0}},
- {"ziccrse", {1, 0}},
- {"zicntr", {2, 0}},
- {"zicond", {1, 0}},
- {"zicsr", {2, 0}},
- {"zifencei", {2, 0}},
- {"zihintntl", {1, 0}},
- {"zihintpause", {2, 0}},
- {"zihpm", {2, 0}},
- {"zimop", {1, 0}},
-
- {"zk", {1, 0}},
- {"zkn", {1, 0}},
- {"zknd", {1, 0}},
- {"zkne", {1, 0}},
- {"zknh", {1, 0}},
- {"zkr", {1, 0}},
- {"zks", {1, 0}},
- {"zksed", {1, 0}},
- {"zksh", {1, 0}},
- {"zkt", {1, 0}},
-
- {"zmmul", {1, 0}},
-
- {"zvbb", {1, 0}},
- {"zvbc", {1, 0}},
-
- {"zve32f", {1, 0}},
- {"zve32x", {1, 0}},
- {"zve64d", {1, 0}},
- {"zve64f", {1, 0}},
- {"zve64x", {1, 0}},
-
- {"zvfh", {1, 0}},
- {"zvfhmin", {1, 0}},
-
- // vector crypto
- {"zvkb", {1, 0}},
- {"zvkg", {1, 0}},
- {"zvkn", {1, 0}},
- {"zvknc", {1, 0}},
- {"zvkned", {1, 0}},
- {"zvkng", {1, 0}},
- {"zvknha", {1, 0}},
- {"zvknhb", {1, 0}},
- {"zvks", {1, 0}},
- {"zvksc", {1, 0}},
- {"zvksed", {1, 0}},
- {"zvksg", {1, 0}},
- {"zvksh", {1, 0}},
- {"zvkt", {1, 0}},
-
- {"zvl1024b", {1, 0}},
- {"zvl128b", {1, 0}},
- {"zvl16384b", {1, 0}},
- {"zvl2048b", {1, 0}},
- {"zvl256b", {1, 0}},
- {"zvl32768b", {1, 0}},
- {"zvl32b", {1, 0}},
- {"zvl4096b", {1, 0}},
- {"zvl512b", {1, 0}},
- {"zvl64b", {1, 0}},
- {"zvl65536b", {1, 0}},
- {"zvl8192b", {1, 0}},
-};
-
-// NOTE: This table should be sorted alphabetically by extension name.
-// clang-format off
-static const RISCVSupportedExtension SupportedExperimentalExtensions[] = {
- {"smmpm", {0, 8}},
- {"smnpm", {0, 8}},
- {"ssnpm", {0, 8}},
- {"sspm", {0, 8}},
- {"ssqosid", {1, 0}},
- {"supm", {0, 8}},
-
- {"zaamo", {0, 2}},
- {"zabha", {1, 0}},
- {"zalasr", {0, 1}},
- {"zalrsc", {0, 2}},
-
- {"zfbfmin", {1, 0}},
-
- {"zicfilp", {0, 4}},
- {"zicfiss", {0, 4}},
-
- {"ztso", {0, 1}},
-
- {"zvfbfmin", {1, 0}},
- {"zvfbfwma", {1, 0}},
-};
-// clang-format on
+#define GET_SUPPORTED_EXTENSIONS
+#include "llvm/TargetParser//RISCVTargetParserDef.inc"
static constexpr RISCVProfile SupportedProfiles[] = {
{"rvi20u32", "rv32i"},
@@ -1041,66 +845,6 @@ Error RISCVISAInfo::checkDependency() {
return Error::success();
}
-static const char *ImpliedExtsD[] = {"f"};
-static const char *ImpliedExtsF[] = {"zicsr"};
-static const char *ImpliedExtsV[] = {"zvl128b", "zve64d"};
-static const char *ImpliedExtsXSfvcp[] = {"zve32x"};
-static const char *ImpliedExtsXSfvfnrclipxfqf[] = {"zve32f"};
-static const char *ImpliedExtsXSfvfwmaccqqq[] = {"zvfbfmin"};
-static const char *ImpliedExtsXSfvqmaccdod[] = {"zve32x"};
-static const char *ImpliedExtsXSfvqmaccqoq[] = {"zve32x"};
-static const char *ImpliedExtsXTHeadVdot[] = {"v"};
-static const char *ImpliedExtsZcb[] = {"zca"};
-static const char *ImpliedExtsZcd[] = {"d", "zca"};
-static const char *ImpliedExtsZce[] = {"zcb", "zcmp", "zcmt"};
-static const char *ImpliedExtsZcf[] = {"f", "zca"};
-static const char *ImpliedExtsZcmop[] = {"zca"};
-static const char *ImpliedExtsZcmp[] = {"zca"};
-static const char *ImpliedExtsZcmt[] = {"zca", "zicsr"};
-static const char *ImpliedExtsZdinx[] = {"zfinx"};
-static const char *ImpliedExtsZfa[] = {"f"};
-static const char *ImpliedExtsZfbfmin[] = {"f"};
-static const char *ImpliedExtsZfh[] = {"zfhmin"};
-static const char *ImpliedExtsZfhmin[] = {"f"};
-static const char *ImpliedExtsZfinx[] = {"zicsr"};
-static const char *ImpliedExtsZhinx[] = {"zhinxmin"};
-static const char *ImpliedExtsZhinxmin[] = {"zfinx"};
-static const char *ImpliedExtsZicfiss[] = {"zicsr", "zimop"};
-static const char *ImpliedExtsZicntr[] = {"zicsr"};
-static const char *ImpliedExtsZihpm[] = {"zicsr"};
-static const char *ImpliedExtsZk[] = {"zkn", "zkt", "zkr"};
-static const char *ImpliedExtsZkn[] = {"zbkb", "zbkc", "zbkx",
- "zkne", "zknd", "zknh"};
-static const char *ImpliedExtsZks[] = {"zbkb", "zbkc", "zbkx", "zksed", "zksh"};
-static const char *ImpliedExtsZvbb[] = {"zvkb"};
-static const char *ImpliedExtsZve32f[] = {"zve32x", "f"};
-static const char *ImpliedExtsZve32x[] = {"zvl32b", "zicsr"};
-static const char *ImpliedExtsZve64d[] = {"zve64f", "d"};
-static const char *ImpliedExtsZve64f[] = {"zve64x", "zve32f"};
-static const char *ImpliedExtsZve64x[] = {"zve32x", "zvl64b"};
-static const char *ImpliedExtsZvfbfmin[] = {"zve32f"};
-static const char *ImpliedExtsZvfbfwma[] = {"zvfbfmin", "zfbfmin"};
-static const char *ImpliedExtsZvfh[] = {"zvfhmin", "zfhmin"};
-static const char *ImpliedExtsZvfhmin[] = {"zve32f"};
-static const char *ImpliedExtsZvkn[] = {"zvkb", "zvkned", "zvknhb", "zvkt"};
-static const char *ImpliedExtsZvknc[] = {"zvbc", "zvkn"};
-static const char *ImpliedExtsZvkng[] = {"zvkg", "zvkn"};
-static const char *ImpliedExtsZvknhb[] = {"zve64x"};
-static const char *ImpliedExtsZvks[] = {"zvkb", "zvksed", "zvksh", "zvkt"};
-static const char *ImpliedExtsZvksc[] = {"zvbc", "zvks"};
-static const char *ImpliedExtsZvksg[] = {"zvkg", "zvks"};
-static const char *ImpliedExtsZvl1024b[] = {"zvl512b"};
-static const char *ImpliedExtsZvl128b[] = {"zvl64b"};
-static const char *ImpliedExtsZvl16384b[] = {"zvl8192b"};
-static const char *ImpliedExtsZvl2048b[] = {"zvl1024b"};
-static const char *ImpliedExtsZvl256b[] = {"zvl128b"};
-static const char *ImpliedExtsZvl32768b[] = {"zvl16384b"};
-static const char *ImpliedExtsZvl4096b[] = {"zvl2048b"};
-static const char *ImpliedExtsZvl512b[] = {"zvl256b"};
-static const char *ImpliedExtsZvl64b[] = {"zvl32b"};
-static const char *ImpliedExtsZvl65536b[] = {"zvl32768b"};
-static const char *ImpliedExtsZvl8192b[] = {"zvl4096b"};
-
struct ImpliedExtsEntry {
StringLiteral Name;
ArrayRef<const char *> Exts;
@@ -1112,67 +856,8 @@ struct ImpliedExtsEntry {
bool operator<(StringRef Other) const { return Name < Other; }
};
-// Note: The table needs to be sorted by name.
-static constexpr ImpliedExtsEntry ImpliedExts[] = {
- {{"d"}, {ImpliedExtsD}},
- {{"f"}, {ImpliedExtsF}},
- {{"v"}, {ImpliedExtsV}},
- {{"xsfvcp"}, {ImpliedExtsXSfvcp}},
- {{"xsfvfnrclipxfqf"}, {ImpliedExtsXSfvfnrclipxfqf}},
- {{"xsfvfwmaccqqq"}, {ImpliedExtsXSfvfwmaccqqq}},
- {{"xsfvqmaccdod"}, {ImpliedExtsXSfvqmaccdod}},
- {{"xsfvqmaccqoq"}, {ImpliedExtsXSfvqmaccqoq}},
- {{"xtheadvdot"}, {ImpliedExtsXTHeadVdot}},
- {{"zcb"}, {ImpliedExtsZcb}},
- {{"zcd"}, {ImpliedExtsZcd}},
- {{"zce"}, {ImpliedExtsZce}},
- {{"zcf"}, {ImpliedExtsZcf}},
- {{"zcmop"}, {ImpliedExtsZcmop}},
- {{"zcmp"}, {ImpliedExtsZcmp}},
- {{"zcmt"}, {ImpliedExtsZcmt}},
- {{"zdinx"}, {ImpliedExtsZdinx}},
- {{"zfa"}, {ImpliedExtsZfa}},
- {{"zfbfmin"}, {ImpliedExtsZfbfmin}},
- {{"zfh"}, {ImpliedExtsZfh}},
- {{"zfhmin"}, {ImpliedExtsZfhmin}},
- {{"zfinx"}, {ImpliedExtsZfinx}},
- {{"zhinx"}, {ImpliedExtsZhinx}},
- {{"zhinxmin"}, {ImpliedExtsZhinxmin}},
- {{"zicfiss"}, {ImpliedExtsZicfiss}},
- {{"zicntr"}, {ImpliedExtsZicntr}},
- {{"zihpm"}, {ImpliedExtsZihpm}},
- {{"zk"}, {ImpliedExtsZk}},
- {{"zkn"}, {ImpliedExtsZkn}},
- {{"zks"}, {ImpliedExtsZks}},
- {{"zvbb"}, {ImpliedExtsZvbb}},
- {{"zve32f"}, {ImpliedExtsZve32f}},
- {{"zve32x"}, {ImpliedExtsZve32x}},
- {{"zve64d"}, {ImpliedExtsZve64d}},
- {{"zve64f"}, {ImpliedExtsZve64f}},
- {{"zve64x"}, {ImpliedExtsZve64x}},
- {{"zvfbfmin"}, {ImpliedExtsZvfbfmin}},
- {{"zvfbfwma"}, {ImpliedExtsZvfbfwma}},
- {{"zvfh"}, {ImpliedExtsZvfh}},
- {{"zvfhmin"}, {ImpliedExtsZvfhmin}},
- {{"zvkn"}, {ImpliedExtsZvkn}},
- {{"zvknc"}, {ImpliedExtsZvknc}},
- {{"zvkng"}, {ImpliedExtsZvkng}},
- {{"zvknhb"}, {ImpliedExtsZvknhb}},
- {{"zvks"}, {ImpliedExtsZvks}},
- {{"zvksc"}, {ImpliedExtsZvksc}},
- {{"zvksg"}, {ImpliedExtsZvksg}},
- {{"zvl1024b"}, {ImpliedExtsZvl1024b}},
- {{"zvl128b"}, {ImpliedExtsZvl128b}},
- {{"zvl16384b"}, {ImpliedExtsZvl16384b}},
- {{"zvl2048b"}, {ImpliedExtsZvl2048b}},
- {{"zvl256b"}, {ImpliedExtsZvl256b}},
- {{"zvl32768b"}, {ImpliedExtsZvl32768b}},
- {{"zvl4096b"}, {ImpliedExtsZvl4096b}},
- {{"zvl512b"}, {ImpliedExtsZvl512b}},
- {{"zvl64b"}, {ImpliedExtsZvl64b}},
- {{"zvl65536b"}, {ImpliedExtsZvl65536b}},
- {{"zvl8192b"}, {ImpliedExtsZvl8192b}},
-};
+#define GET_IMPLIED_EXTENSIONS
+#include "llvm/TargetParser/RISCVTargetParserDef.inc"
void RISCVISAInfo::updateImplication() {
bool HasE = Exts.count("e") != 0;
diff --git a/llvm/utils/TableGen/RISCVTargetDefEmitter.cpp b/llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
index 26034e31ad8d19..4e1b23b2214df4 100644
--- a/llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
+++ b/llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
@@ -17,6 +17,102 @@
using namespace llvm;
+static StringRef getExtensionName(const Record *R) {
+ StringRef Name = R->getValueAsString("Name");
+ Name.consume_front("experimental-");
+ return Name;
+}
+
+namespace {
+
+struct LessRecordExtensionName {
+ bool operator()(const Record *Rec1, const Record *Rec2) const {
+ return getExtensionName(Rec1) < getExtensionName(Rec2);
+ }
+};
+
+} // end anonymous namespace
+
+static void printExtensionTable(raw_ostream &OS,
+ const std::vector<Record *> &Extensions,
+ bool Experimental) {
+ OS << "static const RISCVSupportedExtension Supported";
+ if (Experimental)
+ OS << "Experimental";
+ OS << "Extensions[] = {\n";
+
+ for (Record *R : Extensions) {
+ if (R->getValueAsBit("Experimental") != Experimental)
+ continue;
+
+ OS << " {\"" << getExtensionName(R) << "\", {"
+ << R->getValueAsInt("MajorVersion") << ", "
+ << R->getValueAsInt("MinorVersion") << "}},\n";
+ }
+
+ OS << "};\n\n";
+}
+
+// Get the extension name from the Record name. This gives the canonical
+// capitalization.
+static StringRef getExtensionNameFromRecordName(const Record *R) {
+ StringRef Name = R->getName();
+ if (!Name.consume_front("FeatureStdExt"))
+ Name.consume_front("FeatureVendor");
+
+ return Name;
+}
+
+static void emitRISCVExtensions(RecordKeeper &Records, raw_ostream &OS) {
+ OS << "#ifdef GET_SUPPORTED_EXTENSIONS\n";
+ OS << "#undef GET_SUPPORTED_EXTENSIONS\n";
+
+ std::vector<Record *> Extensions =
+ Records.getAllDerivedDefinitions("RISCVExtension");
+ llvm::sort(Extensions, LessRecordExtensionName());
+
+ printExtensionTable(OS, Extensions, /*Experimental=*/false);
+ printExtensionTable(OS, Extensions, /*Experimental=*/true);
+
+ OS << "#endif // GET_SUPPORTED_EXTENSIONS\n\n";
+
+ OS << "#ifdef GET_IMPLIED_EXTENSIONS\n";
+ OS << "#undef GET_IMPLIED_EXTENSIONS\n";
+
+ for (Record *Ext : Extensions) {
+ auto ImpliesList = Ext->getValueAsListOfDefs("Implies");
+ if (ImpliesList.empty())
+ continue;
+
+ OS << "static const char *ImpliedExts"
+ << getExtensionNameFromRecordName(Ext) << "[] = {";
+
+ ListSeparator LS(", ");
+ for (auto *ImpliedExt : ImpliesList) {
+ if (!ImpliedExt->isSubClassOf("RISCVExtension"))
+ continue;
+
+ OS << LS << '"' << getExtensionName(ImpliedExt) << '"';
+ }
+
+ OS << "};\n";
+ }
+
+ OS << "\nstatic constexpr ImpliedExtsEntry ImpliedExts[] = {\n";
+ for (Record *Ext : Extensions) {
+ auto ImpliesList = Ext->getValueAsListOfDefs("Implies");
+ if (ImpliesList.empty())
+ continue;
+
+ OS << " {{\"" << getExtensionName(Ext) << "\"}, {ImpliedExts"
+ << getExtensionNameFromRecordName(Ext) << "}},\n";
+ }
+
+ OS << "};\n\n";
+
+ OS << "#endif // GET_IMPLIED_EXTENSIONS\n\n";
+}
+
// We can generate march string from target features as what has been described
// in RISC-V ISA specification (version 20191213) 'Chapter 27. ISA Extension
// Naming Conventions'.
@@ -54,7 +150,7 @@ static void printMArch(raw_ostream &OS, const Record &Rec) {
OS << LS << Ext.first << Ext.second.Major << 'p' << Ext.second.Minor;
}
-static void EmitRISCVTargetDef(RecordKeeper &RK, raw_ostream &OS) {
+static void emitRISCVProcs(RecordKeeper &RK, raw_ostream &OS) {
OS << "#ifndef PROC\n"
<< "#define PROC(ENUM, NAME, DEFAULT_MARCH, FAST_UNALIGNED_ACCESS)\n"
<< "#endif\n\n";
@@ -101,5 +197,10 @@ static void EmitRISCVTargetDef(RecordKeeper &RK, raw_ostream &OS) {
OS << "\n#undef TUNE_PROC\n";
}
+static void EmitRISCVTargetDef(RecordKeeper &RK, raw_ostream &OS) {
+ emitRISCVExtensions(RK, OS);
+ emitRISCVProcs(RK, OS);
+}
+
static TableGen::Emitter::Opt X("gen-riscv-target-def", EmitRISCVTargetDef,
"Generate the list of CPU for RISCV");
>From 627f445d3def745eb1b1fe3120022c305812ae5c Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Wed, 24 Apr 2024 10:58:34 -0700
Subject: [PATCH 2/3] fixup! fix typo in include path
---
llvm/lib/TargetParser/RISCVISAInfo.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/lib/TargetParser/RISCVISAInfo.cpp b/llvm/lib/TargetParser/RISCVISAInfo.cpp
index 5db94c5322796a..ea0b56b9a1339b 100644
--- a/llvm/lib/TargetParser/RISCVISAInfo.cpp
+++ b/llvm/lib/TargetParser/RISCVISAInfo.cpp
@@ -48,7 +48,7 @@ static const char *RISCVGImplications[] = {
};
#define GET_SUPPORTED_EXTENSIONS
-#include "llvm/TargetParser//RISCVTargetParserDef.inc"
+#include "llvm/TargetParser/RISCVTargetParserDef.inc"
static constexpr RISCVProfile SupportedProfiles[] = {
{"rvi20u32", "rv32i"},
>From 6c917d1152d27761ad7d64687fb9f5c5289ac65d Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Wed, 24 Apr 2024 21:36:48 -0700
Subject: [PATCH 3/3] fixup! Update description and comments.
---
llvm/utils/TableGen/RISCVTargetDefEmitter.cpp | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/llvm/utils/TableGen/RISCVTargetDefEmitter.cpp b/llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
index 4e1b23b2214df4..e1f43eb3bc3aa4 100644
--- a/llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
+++ b/llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
@@ -6,8 +6,8 @@
//
//===----------------------------------------------------------------------===//
//
-// This tablegen backend emits the include file needed by the target
-// parser to parse the RISC-V CPUs.
+// This tablegen backend emits the include file needed by RISCVTargetParser.cpp
+// and RISCVISAInfo.cpp to parse the RISC-V CPUs and extensions.
//
//===----------------------------------------------------------------------===//
@@ -203,4 +203,5 @@ static void EmitRISCVTargetDef(RecordKeeper &RK, raw_ostream &OS) {
}
static TableGen::Emitter::Opt X("gen-riscv-target-def", EmitRISCVTargetDef,
- "Generate the list of CPU for RISCV");
+ "Generate the list of CPUs and extensions for "
+ "RISC-V");
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