[llvm] [RISCV] Codegen support for XCVbi extension (PR #89719)

[Liao Chunyu via llvm-commits]

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@@ -17741,7 +17749,7 @@ static MachineBasicBlock *emitSelectPseudo(MachineInstr &MI,
   auto InsertionPoint = TailMBB->begin();
   while (SelectMBBI != SelectEnd) {
     auto Next = std::next(SelectMBBI);
-    if (isSelectPseudo(*SelectMBBI)) {
+    if (isSelectPseudo(*SelectMBBI) || MI.getOperand(2).isImm()) {
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ChunyuLiao wrote:

try to generate the phi node. RISCV::Select_GPR_Using_CC_Imm is added to the isSelectPseudo function now.

https://github.com/llvm/llvm-project/pull/89719